1 /*
2 * ImgTec IR Hardware Decoder found in PowerDown Controller.
3 *
4 * Copyright 2010-2014 Imagination Technologies Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12 #ifndef _IMG_IR_HW_H_
13 #define _IMG_IR_HW_H_
14
15 #include <linux/kernel.h>
16 #include <media/rc-core.h>
17
18 /* constants */
19
20 #define IMG_IR_CODETYPE_PULSELEN 0x0 /* Sony */
21 #define IMG_IR_CODETYPE_PULSEDIST 0x1 /* NEC, Toshiba, Micom, Sharp */
22 #define IMG_IR_CODETYPE_BIPHASE 0x2 /* RC-5/6 */
23 #define IMG_IR_CODETYPE_2BITPULSEPOS 0x3 /* RC-MM */
24
25
26 /* Timing information */
27
28 /**
29 * struct img_ir_control - Decoder control settings
30 * @decoden: Primary decoder enable
31 * @code_type: Decode type (see IMG_IR_CODETYPE_*)
32 * @hdrtog: Detect header toggle symbol after leader symbol
33 * @ldrdec: Don't discard leader if maximum width reached
34 * @decodinpol: Decoder input polarity (1=active high)
35 * @bitorien: Bit orientation (1=MSB first)
36 * @d1validsel: Decoder 2 takes over if it detects valid data
37 * @bitinv: Bit inversion switch (1=don't invert)
38 * @decodend2: Secondary decoder enable (no leader symbol)
39 * @bitoriend2: Bit orientation (1=MSB first)
40 * @bitinvd2: Secondary decoder bit inversion switch (1=don't invert)
41 */
42 struct img_ir_control {
43 unsigned decoden:1;
44 unsigned code_type:2;
45 unsigned hdrtog:1;
46 unsigned ldrdec:1;
47 unsigned decodinpol:1;
48 unsigned bitorien:1;
49 unsigned d1validsel:1;
50 unsigned bitinv:1;
51 unsigned decodend2:1;
52 unsigned bitoriend2:1;
53 unsigned bitinvd2:1;
54 };
55
56 /**
57 * struct img_ir_timing_range - range of timing values
58 * @min: Minimum timing value
59 * @max: Maximum timing value (if < @min, this will be set to @min during
60 * preprocessing step, so it is normally not explicitly initialised
61 * and is taken care of by the tolerance)
62 */
63 struct img_ir_timing_range {
64 u16 min;
65 u16 max;
66 };
67
68 /**
69 * struct img_ir_symbol_timing - timing data for a symbol
70 * @pulse: Timing range for the length of the pulse in this symbol
71 * @space: Timing range for the length of the space in this symbol
72 */
73 struct img_ir_symbol_timing {
74 struct img_ir_timing_range pulse;
75 struct img_ir_timing_range space;
76 };
77
78 /**
79 * struct img_ir_free_timing - timing data for free time symbol
80 * @minlen: Minimum number of bits of data
81 * @maxlen: Maximum number of bits of data
82 * @ft_min: Minimum free time after message
83 */
84 struct img_ir_free_timing {
85 /* measured in bits */
86 u8 minlen;
87 u8 maxlen;
88 u16 ft_min;
89 };
90
91 /**
92 * struct img_ir_timings - Timing values.
93 * @ldr: Leader symbol timing data
94 * @s00: Zero symbol timing data for primary decoder
95 * @s01: One symbol timing data for primary decoder
96 * @s10: Zero symbol timing data for secondary (no leader symbol) decoder
97 * @s11: One symbol timing data for secondary (no leader symbol) decoder
98 * @ft: Free time symbol timing data
99 */
100 struct img_ir_timings {
101 struct img_ir_symbol_timing ldr, s00, s01, s10, s11;
102 struct img_ir_free_timing ft;
103 };
104
105 /**
106 * struct img_ir_filter - Filter IR events.
107 * @data: Data to match.
108 * @mask: Mask of bits to compare.
109 * @minlen: Additional minimum number of bits.
110 * @maxlen: Additional maximum number of bits.
111 */
112 struct img_ir_filter {
113 u64 data;
114 u64 mask;
115 u8 minlen;
116 u8 maxlen;
117 };
118
119 /**
120 * struct img_ir_timing_regvals - Calculated timing register values.
121 * @ldr: Leader symbol timing register value
122 * @s00: Zero symbol timing register value for primary decoder
123 * @s01: One symbol timing register value for primary decoder
124 * @s10: Zero symbol timing register value for secondary decoder
125 * @s11: One symbol timing register value for secondary decoder
126 * @ft: Free time symbol timing register value
127 */
128 struct img_ir_timing_regvals {
129 u32 ldr, s00, s01, s10, s11, ft;
130 };
131
132 #define IMG_IR_SCANCODE 0 /* new scancode */
133 #define IMG_IR_REPEATCODE 1 /* repeat the previous code */
134
135 /**
136 * struct img_ir_decoder - Decoder settings for an IR protocol.
137 * @type: Protocol types bitmap.
138 * @tolerance: Timing tolerance as a percentage (default 10%).
139 * @unit: Unit of timings in nanoseconds (default 1 us).
140 * @timings: Primary timings
141 * @rtimings: Additional override timings while waiting for repeats.
142 * @repeat: Maximum repeat interval (always in milliseconds).
143 * @control: Control flags.
144 *
145 * @scancode: Pointer to function to convert the IR data into a scancode (it
146 * must be safe to execute in interrupt context).
147 * Returns IMG_IR_SCANCODE to emit new scancode.
148 * Returns IMG_IR_REPEATCODE to repeat previous code.
149 * Returns -errno (e.g. -EINVAL) on error.
150 * @filter: Pointer to function to convert scancode filter to raw hardware
151 * filter. The minlen and maxlen fields will have been initialised
152 * to the maximum range.
153 */
154 struct img_ir_decoder {
155 /* core description */
156 u64 type;
157 unsigned int tolerance;
158 unsigned int unit;
159 struct img_ir_timings timings;
160 struct img_ir_timings rtimings;
161 unsigned int repeat;
162 struct img_ir_control control;
163
164 /* scancode logic */
165 int (*scancode)(int len, u64 raw, enum rc_type *protocol,
166 u32 *scancode, u64 enabled_protocols);
167 int (*filter)(const struct rc_scancode_filter *in,
168 struct img_ir_filter *out, u64 protocols);
169 };
170
171 extern struct img_ir_decoder img_ir_nec;
172 extern struct img_ir_decoder img_ir_jvc;
173 extern struct img_ir_decoder img_ir_sony;
174 extern struct img_ir_decoder img_ir_sharp;
175 extern struct img_ir_decoder img_ir_sanyo;
176
177 /**
178 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
179 * @ctrl: Processed control register value.
180 * @timings: Processed primary timings.
181 * @rtimings: Processed repeat timings.
182 */
183 struct img_ir_reg_timings {
184 u32 ctrl;
185 struct img_ir_timing_regvals timings;
186 struct img_ir_timing_regvals rtimings;
187 };
188
189 int img_ir_register_decoder(struct img_ir_decoder *dec);
190 void img_ir_unregister_decoder(struct img_ir_decoder *dec);
191
192 struct img_ir_priv;
193
194 #ifdef CONFIG_IR_IMG_HW
195
196 enum img_ir_mode {
197 IMG_IR_M_NORMAL,
198 IMG_IR_M_REPEATING,
199 #ifdef CONFIG_PM_SLEEP
200 IMG_IR_M_WAKE,
201 #endif
202 };
203
204 /**
205 * struct img_ir_priv_hw - Private driver data for hardware decoder.
206 * @ct_quirks: Quirk bits for each code type.
207 * @rdev: Remote control device
208 * @clk_nb: Notifier block for clock notify events.
209 * @end_timer: Timer until repeat timeout.
210 * @decoder: Current decoder settings.
211 * @enabled_protocols: Currently enabled protocols.
212 * @clk_hz: Current core clock rate in Hz.
213 * @reg_timings: Timing reg values for decoder at clock rate.
214 * @flags: IMG_IR_F_*.
215 * @filters: HW filters (derived from scancode filters).
216 * @mode: Current decode mode.
217 * @stopping: Indicates that decoder is being taken down and timers
218 * should not be restarted.
219 * @suspend_irqen: Saved IRQ enable mask over suspend.
220 */
221 struct img_ir_priv_hw {
222 unsigned int ct_quirks[4];
223 struct rc_dev *rdev;
224 struct notifier_block clk_nb;
225 struct timer_list end_timer;
226 const struct img_ir_decoder *decoder;
227 u64 enabled_protocols;
228 unsigned long clk_hz;
229 struct img_ir_reg_timings reg_timings;
230 unsigned int flags;
231 struct img_ir_filter filters[RC_FILTER_MAX];
232
233 enum img_ir_mode mode;
234 bool stopping;
235 u32 suspend_irqen;
236 };
237
img_ir_hw_enabled(struct img_ir_priv_hw * hw)238 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
239 {
240 return hw->rdev;
241 };
242
243 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status);
244 void img_ir_setup_hw(struct img_ir_priv *priv);
245 int img_ir_probe_hw(struct img_ir_priv *priv);
246 void img_ir_remove_hw(struct img_ir_priv *priv);
247
248 #ifdef CONFIG_PM_SLEEP
249 int img_ir_suspend(struct device *dev);
250 int img_ir_resume(struct device *dev);
251 #else
252 #define img_ir_suspend NULL
253 #define img_ir_resume NULL
254 #endif
255
256 #else
257
258 struct img_ir_priv_hw {
259 };
260
img_ir_hw_enabled(struct img_ir_priv_hw * hw)261 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
262 {
263 return false;
264 };
img_ir_isr_hw(struct img_ir_priv * priv,u32 irq_status)265 static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
266 {
267 }
img_ir_setup_hw(struct img_ir_priv * priv)268 static inline void img_ir_setup_hw(struct img_ir_priv *priv)
269 {
270 }
img_ir_probe_hw(struct img_ir_priv * priv)271 static inline int img_ir_probe_hw(struct img_ir_priv *priv)
272 {
273 return -ENODEV;
274 }
img_ir_remove_hw(struct img_ir_priv * priv)275 static inline void img_ir_remove_hw(struct img_ir_priv *priv)
276 {
277 }
278
279 #define img_ir_suspend NULL
280 #define img_ir_resume NULL
281
282 #endif /* CONFIG_IR_IMG_HW */
283
284 #endif /* _IMG_IR_HW_H_ */
285