1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 0
42 #define DRV_VERSION_BUILD 11
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 /* required last entry */
78 {0, }
79 };
80 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
81
82 #define I40E_MAX_VF_COUNT 128
83 static int debug = -1;
84 module_param(debug, int, 0);
85 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
86
87 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
88 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
91
92 /**
93 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
94 * @hw: pointer to the HW structure
95 * @mem: ptr to mem struct to fill out
96 * @size: size of memory requested
97 * @alignment: what to align the allocation to
98 **/
i40e_allocate_dma_mem_d(struct i40e_hw * hw,struct i40e_dma_mem * mem,u64 size,u32 alignment)99 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
100 u64 size, u32 alignment)
101 {
102 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
103
104 mem->size = ALIGN(size, alignment);
105 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
106 &mem->pa, GFP_KERNEL);
107 if (!mem->va)
108 return -ENOMEM;
109
110 return 0;
111 }
112
113 /**
114 * i40e_free_dma_mem_d - OS specific memory free for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to free
117 **/
i40e_free_dma_mem_d(struct i40e_hw * hw,struct i40e_dma_mem * mem)118 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
119 {
120 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
121
122 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
123 mem->va = NULL;
124 mem->pa = 0;
125 mem->size = 0;
126
127 return 0;
128 }
129
130 /**
131 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to fill out
134 * @size: size of memory requested
135 **/
i40e_allocate_virt_mem_d(struct i40e_hw * hw,struct i40e_virt_mem * mem,u32 size)136 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
137 u32 size)
138 {
139 mem->size = size;
140 mem->va = kzalloc(size, GFP_KERNEL);
141
142 if (!mem->va)
143 return -ENOMEM;
144
145 return 0;
146 }
147
148 /**
149 * i40e_free_virt_mem_d - OS specific memory free for shared code
150 * @hw: pointer to the HW structure
151 * @mem: ptr to mem struct to free
152 **/
i40e_free_virt_mem_d(struct i40e_hw * hw,struct i40e_virt_mem * mem)153 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
154 {
155 /* it's ok to kfree a NULL pointer */
156 kfree(mem->va);
157 mem->va = NULL;
158 mem->size = 0;
159
160 return 0;
161 }
162
163 /**
164 * i40e_get_lump - find a lump of free generic resource
165 * @pf: board private structure
166 * @pile: the pile of resource to search
167 * @needed: the number of items needed
168 * @id: an owner id to stick on the items assigned
169 *
170 * Returns the base item index of the lump, or negative for error
171 *
172 * The search_hint trick and lack of advanced fit-finding only work
173 * because we're highly likely to have all the same size lump requests.
174 * Linear search time and any fragmentation should be minimal.
175 **/
i40e_get_lump(struct i40e_pf * pf,struct i40e_lump_tracking * pile,u16 needed,u16 id)176 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
177 u16 needed, u16 id)
178 {
179 int ret = -ENOMEM;
180 int i, j;
181
182 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
183 dev_info(&pf->pdev->dev,
184 "param err: pile=%p needed=%d id=0x%04x\n",
185 pile, needed, id);
186 return -EINVAL;
187 }
188
189 /* start the linear search with an imperfect hint */
190 i = pile->search_hint;
191 while (i < pile->num_entries) {
192 /* skip already allocated entries */
193 if (pile->list[i] & I40E_PILE_VALID_BIT) {
194 i++;
195 continue;
196 }
197
198 /* do we have enough in this lump? */
199 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
200 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
201 break;
202 }
203
204 if (j == needed) {
205 /* there was enough, so assign it to the requestor */
206 for (j = 0; j < needed; j++)
207 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
208 ret = i;
209 pile->search_hint = i + j;
210 break;
211 } else {
212 /* not enough, so skip over it and continue looking */
213 i += j;
214 }
215 }
216
217 return ret;
218 }
219
220 /**
221 * i40e_put_lump - return a lump of generic resource
222 * @pile: the pile of resource to search
223 * @index: the base item index
224 * @id: the owner id of the items assigned
225 *
226 * Returns the count of items in the lump
227 **/
i40e_put_lump(struct i40e_lump_tracking * pile,u16 index,u16 id)228 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
229 {
230 int valid_id = (id | I40E_PILE_VALID_BIT);
231 int count = 0;
232 int i;
233
234 if (!pile || index >= pile->num_entries)
235 return -EINVAL;
236
237 for (i = index;
238 i < pile->num_entries && pile->list[i] == valid_id;
239 i++) {
240 pile->list[i] = 0;
241 count++;
242 }
243
244 if (count && index < pile->search_hint)
245 pile->search_hint = index;
246
247 return count;
248 }
249
250 /**
251 * i40e_service_event_schedule - Schedule the service task to wake up
252 * @pf: board private structure
253 *
254 * If not already scheduled, this puts the task into the work queue
255 **/
i40e_service_event_schedule(struct i40e_pf * pf)256 static void i40e_service_event_schedule(struct i40e_pf *pf)
257 {
258 if (!test_bit(__I40E_DOWN, &pf->state) &&
259 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
260 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
261 schedule_work(&pf->service_task);
262 }
263
264 /**
265 * i40e_tx_timeout - Respond to a Tx Hang
266 * @netdev: network interface device structure
267 *
268 * If any port has noticed a Tx timeout, it is likely that the whole
269 * device is munged, not just the one netdev port, so go for the full
270 * reset.
271 **/
272 #ifdef I40E_FCOE
i40e_tx_timeout(struct net_device * netdev)273 void i40e_tx_timeout(struct net_device *netdev)
274 #else
275 static void i40e_tx_timeout(struct net_device *netdev)
276 #endif
277 {
278 struct i40e_netdev_priv *np = netdev_priv(netdev);
279 struct i40e_vsi *vsi = np->vsi;
280 struct i40e_pf *pf = vsi->back;
281
282 pf->tx_timeout_count++;
283
284 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
285 pf->tx_timeout_recovery_level = 1;
286 pf->tx_timeout_last_recovery = jiffies;
287 netdev_info(netdev, "tx_timeout recovery level %d\n",
288 pf->tx_timeout_recovery_level);
289
290 switch (pf->tx_timeout_recovery_level) {
291 case 0:
292 /* disable and re-enable queues for the VSI */
293 if (in_interrupt()) {
294 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
295 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
296 } else {
297 i40e_vsi_reinit_locked(vsi);
298 }
299 break;
300 case 1:
301 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
302 break;
303 case 2:
304 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
305 break;
306 case 3:
307 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
308 break;
309 default:
310 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
311 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
312 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
313 break;
314 }
315 i40e_service_event_schedule(pf);
316 pf->tx_timeout_recovery_level++;
317 }
318
319 /**
320 * i40e_release_rx_desc - Store the new tail and head values
321 * @rx_ring: ring to bump
322 * @val: new head index
323 **/
i40e_release_rx_desc(struct i40e_ring * rx_ring,u32 val)324 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
325 {
326 rx_ring->next_to_use = val;
327
328 /* Force memory writes to complete before letting h/w
329 * know there are new descriptors to fetch. (Only
330 * applicable for weak-ordered memory model archs,
331 * such as IA-64).
332 */
333 wmb();
334 writel(val, rx_ring->tail);
335 }
336
337 /**
338 * i40e_get_vsi_stats_struct - Get System Network Statistics
339 * @vsi: the VSI we care about
340 *
341 * Returns the address of the device statistics structure.
342 * The statistics are actually updated from the service task.
343 **/
i40e_get_vsi_stats_struct(struct i40e_vsi * vsi)344 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
345 {
346 return &vsi->net_stats;
347 }
348
349 /**
350 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
351 * @netdev: network interface device structure
352 *
353 * Returns the address of the device statistics structure.
354 * The statistics are actually updated from the service task.
355 **/
356 #ifdef I40E_FCOE
i40e_get_netdev_stats_struct(struct net_device * netdev,struct rtnl_link_stats64 * stats)357 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
358 struct net_device *netdev,
359 struct rtnl_link_stats64 *stats)
360 #else
361 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
362 struct net_device *netdev,
363 struct rtnl_link_stats64 *stats)
364 #endif
365 {
366 struct i40e_netdev_priv *np = netdev_priv(netdev);
367 struct i40e_ring *tx_ring, *rx_ring;
368 struct i40e_vsi *vsi = np->vsi;
369 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
370 int i;
371
372 if (test_bit(__I40E_DOWN, &vsi->state))
373 return stats;
374
375 if (!vsi->tx_rings)
376 return stats;
377
378 rcu_read_lock();
379 for (i = 0; i < vsi->num_queue_pairs; i++) {
380 u64 bytes, packets;
381 unsigned int start;
382
383 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
384 if (!tx_ring)
385 continue;
386
387 do {
388 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
389 packets = tx_ring->stats.packets;
390 bytes = tx_ring->stats.bytes;
391 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
392
393 stats->tx_packets += packets;
394 stats->tx_bytes += bytes;
395 rx_ring = &tx_ring[1];
396
397 do {
398 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
399 packets = rx_ring->stats.packets;
400 bytes = rx_ring->stats.bytes;
401 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
402
403 stats->rx_packets += packets;
404 stats->rx_bytes += bytes;
405 }
406 rcu_read_unlock();
407
408 /* following stats updated by i40e_watchdog_subtask() */
409 stats->multicast = vsi_stats->multicast;
410 stats->tx_errors = vsi_stats->tx_errors;
411 stats->tx_dropped = vsi_stats->tx_dropped;
412 stats->rx_errors = vsi_stats->rx_errors;
413 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
414 stats->rx_length_errors = vsi_stats->rx_length_errors;
415
416 return stats;
417 }
418
419 /**
420 * i40e_vsi_reset_stats - Resets all stats of the given vsi
421 * @vsi: the VSI to have its stats reset
422 **/
i40e_vsi_reset_stats(struct i40e_vsi * vsi)423 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
424 {
425 struct rtnl_link_stats64 *ns;
426 int i;
427
428 if (!vsi)
429 return;
430
431 ns = i40e_get_vsi_stats_struct(vsi);
432 memset(ns, 0, sizeof(*ns));
433 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
434 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
435 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
436 if (vsi->rx_rings && vsi->rx_rings[0]) {
437 for (i = 0; i < vsi->num_queue_pairs; i++) {
438 memset(&vsi->rx_rings[i]->stats, 0 ,
439 sizeof(vsi->rx_rings[i]->stats));
440 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
441 sizeof(vsi->rx_rings[i]->rx_stats));
442 memset(&vsi->tx_rings[i]->stats, 0 ,
443 sizeof(vsi->tx_rings[i]->stats));
444 memset(&vsi->tx_rings[i]->tx_stats, 0,
445 sizeof(vsi->tx_rings[i]->tx_stats));
446 }
447 }
448 vsi->stat_offsets_loaded = false;
449 }
450
451 /**
452 * i40e_pf_reset_stats - Reset all of the stats for the given pf
453 * @pf: the PF to be reset
454 **/
i40e_pf_reset_stats(struct i40e_pf * pf)455 void i40e_pf_reset_stats(struct i40e_pf *pf)
456 {
457 int i;
458
459 memset(&pf->stats, 0, sizeof(pf->stats));
460 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
461 pf->stat_offsets_loaded = false;
462
463 for (i = 0; i < I40E_MAX_VEB; i++) {
464 if (pf->veb[i]) {
465 memset(&pf->veb[i]->stats, 0,
466 sizeof(pf->veb[i]->stats));
467 memset(&pf->veb[i]->stats_offsets, 0,
468 sizeof(pf->veb[i]->stats_offsets));
469 pf->veb[i]->stat_offsets_loaded = false;
470 }
471 }
472 }
473
474 /**
475 * i40e_stat_update48 - read and update a 48 bit stat from the chip
476 * @hw: ptr to the hardware info
477 * @hireg: the high 32 bit reg to read
478 * @loreg: the low 32 bit reg to read
479 * @offset_loaded: has the initial offset been loaded yet
480 * @offset: ptr to current offset value
481 * @stat: ptr to the stat
482 *
483 * Since the device stats are not reset at PFReset, they likely will not
484 * be zeroed when the driver starts. We'll save the first values read
485 * and use them as offsets to be subtracted from the raw values in order
486 * to report stats that count from zero. In the process, we also manage
487 * the potential roll-over.
488 **/
i40e_stat_update48(struct i40e_hw * hw,u32 hireg,u32 loreg,bool offset_loaded,u64 * offset,u64 * stat)489 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
490 bool offset_loaded, u64 *offset, u64 *stat)
491 {
492 u64 new_data;
493
494 if (hw->device_id == I40E_DEV_ID_QEMU) {
495 new_data = rd32(hw, loreg);
496 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
497 } else {
498 new_data = rd64(hw, loreg);
499 }
500 if (!offset_loaded)
501 *offset = new_data;
502 if (likely(new_data >= *offset))
503 *stat = new_data - *offset;
504 else
505 *stat = (new_data + ((u64)1 << 48)) - *offset;
506 *stat &= 0xFFFFFFFFFFFFULL;
507 }
508
509 /**
510 * i40e_stat_update32 - read and update a 32 bit stat from the chip
511 * @hw: ptr to the hardware info
512 * @reg: the hw reg to read
513 * @offset_loaded: has the initial offset been loaded yet
514 * @offset: ptr to current offset value
515 * @stat: ptr to the stat
516 **/
i40e_stat_update32(struct i40e_hw * hw,u32 reg,bool offset_loaded,u64 * offset,u64 * stat)517 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
518 bool offset_loaded, u64 *offset, u64 *stat)
519 {
520 u32 new_data;
521
522 new_data = rd32(hw, reg);
523 if (!offset_loaded)
524 *offset = new_data;
525 if (likely(new_data >= *offset))
526 *stat = (u32)(new_data - *offset);
527 else
528 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
529 }
530
531 /**
532 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
533 * @vsi: the VSI to be updated
534 **/
i40e_update_eth_stats(struct i40e_vsi * vsi)535 void i40e_update_eth_stats(struct i40e_vsi *vsi)
536 {
537 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
538 struct i40e_pf *pf = vsi->back;
539 struct i40e_hw *hw = &pf->hw;
540 struct i40e_eth_stats *oes;
541 struct i40e_eth_stats *es; /* device's eth stats */
542
543 es = &vsi->eth_stats;
544 oes = &vsi->eth_stats_offsets;
545
546 /* Gather up the stats that the hw collects */
547 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
548 vsi->stat_offsets_loaded,
549 &oes->tx_errors, &es->tx_errors);
550 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
551 vsi->stat_offsets_loaded,
552 &oes->rx_discards, &es->rx_discards);
553 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
554 vsi->stat_offsets_loaded,
555 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
556 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
557 vsi->stat_offsets_loaded,
558 &oes->tx_errors, &es->tx_errors);
559
560 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
561 I40E_GLV_GORCL(stat_idx),
562 vsi->stat_offsets_loaded,
563 &oes->rx_bytes, &es->rx_bytes);
564 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
565 I40E_GLV_UPRCL(stat_idx),
566 vsi->stat_offsets_loaded,
567 &oes->rx_unicast, &es->rx_unicast);
568 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
569 I40E_GLV_MPRCL(stat_idx),
570 vsi->stat_offsets_loaded,
571 &oes->rx_multicast, &es->rx_multicast);
572 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
573 I40E_GLV_BPRCL(stat_idx),
574 vsi->stat_offsets_loaded,
575 &oes->rx_broadcast, &es->rx_broadcast);
576
577 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
578 I40E_GLV_GOTCL(stat_idx),
579 vsi->stat_offsets_loaded,
580 &oes->tx_bytes, &es->tx_bytes);
581 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
582 I40E_GLV_UPTCL(stat_idx),
583 vsi->stat_offsets_loaded,
584 &oes->tx_unicast, &es->tx_unicast);
585 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
586 I40E_GLV_MPTCL(stat_idx),
587 vsi->stat_offsets_loaded,
588 &oes->tx_multicast, &es->tx_multicast);
589 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
590 I40E_GLV_BPTCL(stat_idx),
591 vsi->stat_offsets_loaded,
592 &oes->tx_broadcast, &es->tx_broadcast);
593 vsi->stat_offsets_loaded = true;
594 }
595
596 /**
597 * i40e_update_veb_stats - Update Switch component statistics
598 * @veb: the VEB being updated
599 **/
i40e_update_veb_stats(struct i40e_veb * veb)600 static void i40e_update_veb_stats(struct i40e_veb *veb)
601 {
602 struct i40e_pf *pf = veb->pf;
603 struct i40e_hw *hw = &pf->hw;
604 struct i40e_eth_stats *oes;
605 struct i40e_eth_stats *es; /* device's eth stats */
606 int idx = 0;
607
608 idx = veb->stats_idx;
609 es = &veb->stats;
610 oes = &veb->stats_offsets;
611
612 /* Gather up the stats that the hw collects */
613 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
614 veb->stat_offsets_loaded,
615 &oes->tx_discards, &es->tx_discards);
616 if (hw->revision_id > 0)
617 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
618 veb->stat_offsets_loaded,
619 &oes->rx_unknown_protocol,
620 &es->rx_unknown_protocol);
621 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
622 veb->stat_offsets_loaded,
623 &oes->rx_bytes, &es->rx_bytes);
624 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
625 veb->stat_offsets_loaded,
626 &oes->rx_unicast, &es->rx_unicast);
627 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
628 veb->stat_offsets_loaded,
629 &oes->rx_multicast, &es->rx_multicast);
630 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
631 veb->stat_offsets_loaded,
632 &oes->rx_broadcast, &es->rx_broadcast);
633
634 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
635 veb->stat_offsets_loaded,
636 &oes->tx_bytes, &es->tx_bytes);
637 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
638 veb->stat_offsets_loaded,
639 &oes->tx_unicast, &es->tx_unicast);
640 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
641 veb->stat_offsets_loaded,
642 &oes->tx_multicast, &es->tx_multicast);
643 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
644 veb->stat_offsets_loaded,
645 &oes->tx_broadcast, &es->tx_broadcast);
646 veb->stat_offsets_loaded = true;
647 }
648
649 #ifdef I40E_FCOE
650 /**
651 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
652 * @vsi: the VSI that is capable of doing FCoE
653 **/
i40e_update_fcoe_stats(struct i40e_vsi * vsi)654 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
655 {
656 struct i40e_pf *pf = vsi->back;
657 struct i40e_hw *hw = &pf->hw;
658 struct i40e_fcoe_stats *ofs;
659 struct i40e_fcoe_stats *fs; /* device's eth stats */
660 int idx;
661
662 if (vsi->type != I40E_VSI_FCOE)
663 return;
664
665 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
666 fs = &vsi->fcoe_stats;
667 ofs = &vsi->fcoe_stats_offsets;
668
669 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
670 vsi->fcoe_stat_offsets_loaded,
671 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
672 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
673 vsi->fcoe_stat_offsets_loaded,
674 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
675 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
676 vsi->fcoe_stat_offsets_loaded,
677 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
678 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
679 vsi->fcoe_stat_offsets_loaded,
680 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
681 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
682 vsi->fcoe_stat_offsets_loaded,
683 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
684 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
685 vsi->fcoe_stat_offsets_loaded,
686 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
687 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
688 vsi->fcoe_stat_offsets_loaded,
689 &ofs->fcoe_last_error, &fs->fcoe_last_error);
690 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
691 vsi->fcoe_stat_offsets_loaded,
692 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
693
694 vsi->fcoe_stat_offsets_loaded = true;
695 }
696
697 #endif
698 /**
699 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
700 * @pf: the corresponding PF
701 *
702 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
703 **/
i40e_update_link_xoff_rx(struct i40e_pf * pf)704 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
705 {
706 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
707 struct i40e_hw_port_stats *nsd = &pf->stats;
708 struct i40e_hw *hw = &pf->hw;
709 u64 xoff = 0;
710 u16 i, v;
711
712 if ((hw->fc.current_mode != I40E_FC_FULL) &&
713 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
714 return;
715
716 xoff = nsd->link_xoff_rx;
717 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
718 pf->stat_offsets_loaded,
719 &osd->link_xoff_rx, &nsd->link_xoff_rx);
720
721 /* No new LFC xoff rx */
722 if (!(nsd->link_xoff_rx - xoff))
723 return;
724
725 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
726 for (v = 0; v < pf->num_alloc_vsi; v++) {
727 struct i40e_vsi *vsi = pf->vsi[v];
728
729 if (!vsi || !vsi->tx_rings[0])
730 continue;
731
732 for (i = 0; i < vsi->num_queue_pairs; i++) {
733 struct i40e_ring *ring = vsi->tx_rings[i];
734 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
735 }
736 }
737 }
738
739 /**
740 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
741 * @pf: the corresponding PF
742 *
743 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
744 **/
i40e_update_prio_xoff_rx(struct i40e_pf * pf)745 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
746 {
747 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
748 struct i40e_hw_port_stats *nsd = &pf->stats;
749 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
750 struct i40e_dcbx_config *dcb_cfg;
751 struct i40e_hw *hw = &pf->hw;
752 u16 i, v;
753 u8 tc;
754
755 dcb_cfg = &hw->local_dcbx_config;
756
757 /* See if DCB enabled with PFC TC */
758 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
759 !(dcb_cfg->pfc.pfcenable)) {
760 i40e_update_link_xoff_rx(pf);
761 return;
762 }
763
764 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
765 u64 prio_xoff = nsd->priority_xoff_rx[i];
766 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
767 pf->stat_offsets_loaded,
768 &osd->priority_xoff_rx[i],
769 &nsd->priority_xoff_rx[i]);
770
771 /* No new PFC xoff rx */
772 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
773 continue;
774 /* Get the TC for given priority */
775 tc = dcb_cfg->etscfg.prioritytable[i];
776 xoff[tc] = true;
777 }
778
779 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
780 for (v = 0; v < pf->num_alloc_vsi; v++) {
781 struct i40e_vsi *vsi = pf->vsi[v];
782
783 if (!vsi || !vsi->tx_rings[0])
784 continue;
785
786 for (i = 0; i < vsi->num_queue_pairs; i++) {
787 struct i40e_ring *ring = vsi->tx_rings[i];
788
789 tc = ring->dcb_tc;
790 if (xoff[tc])
791 clear_bit(__I40E_HANG_CHECK_ARMED,
792 &ring->state);
793 }
794 }
795 }
796
797 /**
798 * i40e_update_vsi_stats - Update the vsi statistics counters.
799 * @vsi: the VSI to be updated
800 *
801 * There are a few instances where we store the same stat in a
802 * couple of different structs. This is partly because we have
803 * the netdev stats that need to be filled out, which is slightly
804 * different from the "eth_stats" defined by the chip and used in
805 * VF communications. We sort it out here.
806 **/
i40e_update_vsi_stats(struct i40e_vsi * vsi)807 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
808 {
809 struct i40e_pf *pf = vsi->back;
810 struct rtnl_link_stats64 *ons;
811 struct rtnl_link_stats64 *ns; /* netdev stats */
812 struct i40e_eth_stats *oes;
813 struct i40e_eth_stats *es; /* device's eth stats */
814 u32 tx_restart, tx_busy;
815 u32 rx_page, rx_buf;
816 u64 rx_p, rx_b;
817 u64 tx_p, tx_b;
818 u16 q;
819
820 if (test_bit(__I40E_DOWN, &vsi->state) ||
821 test_bit(__I40E_CONFIG_BUSY, &pf->state))
822 return;
823
824 ns = i40e_get_vsi_stats_struct(vsi);
825 ons = &vsi->net_stats_offsets;
826 es = &vsi->eth_stats;
827 oes = &vsi->eth_stats_offsets;
828
829 /* Gather up the netdev and vsi stats that the driver collects
830 * on the fly during packet processing
831 */
832 rx_b = rx_p = 0;
833 tx_b = tx_p = 0;
834 tx_restart = tx_busy = 0;
835 rx_page = 0;
836 rx_buf = 0;
837 rcu_read_lock();
838 for (q = 0; q < vsi->num_queue_pairs; q++) {
839 struct i40e_ring *p;
840 u64 bytes, packets;
841 unsigned int start;
842
843 /* locate Tx ring */
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
845
846 do {
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
851 tx_b += bytes;
852 tx_p += packets;
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
855
856 /* Rx queue is part of the same block as Tx queue */
857 p = &p[1];
858 do {
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
863 rx_b += bytes;
864 rx_p += packets;
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
867 }
868 rcu_read_unlock();
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
873
874 ns->rx_packets = rx_p;
875 ns->rx_bytes = rx_b;
876 ns->tx_packets = tx_p;
877 ns->tx_bytes = tx_b;
878
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
889
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
895 }
896 }
897
898 /**
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
901 **/
i40e_update_pf_stats(struct i40e_pf * pf)902 static void i40e_update_pf_stats(struct i40e_pf *pf)
903 {
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
907 u32 val;
908 int i;
909
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->eth.tx_discards,
925 &nsd->eth.tx_discards);
926
927 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
928 I40E_GLPRT_UPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_unicast,
931 &nsd->eth.rx_unicast);
932 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
933 I40E_GLPRT_MPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_multicast,
936 &nsd->eth.rx_multicast);
937 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
938 I40E_GLPRT_BPRCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.rx_broadcast,
941 &nsd->eth.rx_broadcast);
942 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
943 I40E_GLPRT_UPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_unicast,
946 &nsd->eth.tx_unicast);
947 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
948 I40E_GLPRT_MPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_multicast,
951 &nsd->eth.tx_multicast);
952 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
953 I40E_GLPRT_BPTCL(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->eth.tx_broadcast,
956 &nsd->eth.tx_broadcast);
957
958 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->tx_dropped_link_down,
961 &nsd->tx_dropped_link_down);
962
963 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->crc_errors, &nsd->crc_errors);
966
967 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->illegal_bytes, &nsd->illegal_bytes);
970
971 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->mac_local_faults,
974 &nsd->mac_local_faults);
975 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->mac_remote_faults,
978 &nsd->mac_remote_faults);
979
980 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->rx_length_errors,
983 &nsd->rx_length_errors);
984
985 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->link_xon_rx, &nsd->link_xon_rx);
988 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->link_xon_tx, &nsd->link_xon_tx);
991 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
992 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->link_xoff_tx, &nsd->link_xoff_tx);
995
996 for (i = 0; i < 8; i++) {
997 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
998 pf->stat_offsets_loaded,
999 &osd->priority_xon_rx[i],
1000 &nsd->priority_xon_rx[i]);
1001 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1002 pf->stat_offsets_loaded,
1003 &osd->priority_xon_tx[i],
1004 &nsd->priority_xon_tx[i]);
1005 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xoff_tx[i],
1008 &nsd->priority_xoff_tx[i]);
1009 i40e_stat_update32(hw,
1010 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1011 pf->stat_offsets_loaded,
1012 &osd->priority_xon_2_xoff[i],
1013 &nsd->priority_xon_2_xoff[i]);
1014 }
1015
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1017 I40E_GLPRT_PRC64L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_64, &nsd->rx_size_64);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1021 I40E_GLPRT_PRC127L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_127, &nsd->rx_size_127);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1025 I40E_GLPRT_PRC255L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_255, &nsd->rx_size_255);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1029 I40E_GLPRT_PRC511L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_511, &nsd->rx_size_511);
1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1033 I40E_GLPRT_PRC1023L(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_size_1023, &nsd->rx_size_1023);
1036 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1037 I40E_GLPRT_PRC1522L(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_size_1522, &nsd->rx_size_1522);
1040 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1041 I40E_GLPRT_PRC9522L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_size_big, &nsd->rx_size_big);
1044
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1046 I40E_GLPRT_PTC64L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_64, &nsd->tx_size_64);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1050 I40E_GLPRT_PTC127L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_127, &nsd->tx_size_127);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1054 I40E_GLPRT_PTC255L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_255, &nsd->tx_size_255);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1058 I40E_GLPRT_PTC511L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_511, &nsd->tx_size_511);
1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1062 I40E_GLPRT_PTC1023L(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_size_1023, &nsd->tx_size_1023);
1065 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1066 I40E_GLPRT_PTC1522L(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->tx_size_1522, &nsd->tx_size_1522);
1069 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1070 I40E_GLPRT_PTC9522L(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->tx_size_big, &nsd->tx_size_big);
1073
1074 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_undersize, &nsd->rx_undersize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_fragments, &nsd->rx_fragments);
1080 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->rx_oversize, &nsd->rx_oversize);
1083 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_jabber, &nsd->rx_jabber);
1086
1087 /* FDIR stats */
1088 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1089 pf->stat_offsets_loaded,
1090 &osd->fd_atr_match, &nsd->fd_atr_match);
1091 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_sb_match, &nsd->fd_sb_match);
1094
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1108
1109 pf->stat_offsets_loaded = true;
1110 }
1111
1112 /**
1113 * i40e_update_stats - Update the various statistics counters.
1114 * @vsi: the VSI to be updated
1115 *
1116 * Update the various stats for this VSI and its related entities.
1117 **/
i40e_update_stats(struct i40e_vsi * vsi)1118 void i40e_update_stats(struct i40e_vsi *vsi)
1119 {
1120 struct i40e_pf *pf = vsi->back;
1121
1122 if (vsi == pf->vsi[pf->lan_vsi])
1123 i40e_update_pf_stats(pf);
1124
1125 i40e_update_vsi_stats(vsi);
1126 #ifdef I40E_FCOE
1127 i40e_update_fcoe_stats(vsi);
1128 #endif
1129 }
1130
1131 /**
1132 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1133 * @vsi: the VSI to be searched
1134 * @macaddr: the MAC address
1135 * @vlan: the vlan
1136 * @is_vf: make sure its a vf filter, else doesn't matter
1137 * @is_netdev: make sure its a netdev filter, else doesn't matter
1138 *
1139 * Returns ptr to the filter object or NULL
1140 **/
i40e_find_filter(struct i40e_vsi * vsi,u8 * macaddr,s16 vlan,bool is_vf,bool is_netdev)1141 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1142 u8 *macaddr, s16 vlan,
1143 bool is_vf, bool is_netdev)
1144 {
1145 struct i40e_mac_filter *f;
1146
1147 if (!vsi || !macaddr)
1148 return NULL;
1149
1150 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1151 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1152 (vlan == f->vlan) &&
1153 (!is_vf || f->is_vf) &&
1154 (!is_netdev || f->is_netdev))
1155 return f;
1156 }
1157 return NULL;
1158 }
1159
1160 /**
1161 * i40e_find_mac - Find a mac addr in the macvlan filters list
1162 * @vsi: the VSI to be searched
1163 * @macaddr: the MAC address we are searching for
1164 * @is_vf: make sure its a vf filter, else doesn't matter
1165 * @is_netdev: make sure its a netdev filter, else doesn't matter
1166 *
1167 * Returns the first filter with the provided MAC address or NULL if
1168 * MAC address was not found
1169 **/
i40e_find_mac(struct i40e_vsi * vsi,u8 * macaddr,bool is_vf,bool is_netdev)1170 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1171 bool is_vf, bool is_netdev)
1172 {
1173 struct i40e_mac_filter *f;
1174
1175 if (!vsi || !macaddr)
1176 return NULL;
1177
1178 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1179 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1180 (!is_vf || f->is_vf) &&
1181 (!is_netdev || f->is_netdev))
1182 return f;
1183 }
1184 return NULL;
1185 }
1186
1187 /**
1188 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1189 * @vsi: the VSI to be searched
1190 *
1191 * Returns true if VSI is in vlan mode or false otherwise
1192 **/
i40e_is_vsi_in_vlan(struct i40e_vsi * vsi)1193 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1194 {
1195 struct i40e_mac_filter *f;
1196
1197 /* Only -1 for all the filters denotes not in vlan mode
1198 * so we have to go through all the list in order to make sure
1199 */
1200 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1201 if (f->vlan >= 0)
1202 return true;
1203 }
1204
1205 return false;
1206 }
1207
1208 /**
1209 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1210 * @vsi: the VSI to be searched
1211 * @macaddr: the mac address to be filtered
1212 * @is_vf: true if it is a vf
1213 * @is_netdev: true if it is a netdev
1214 *
1215 * Goes through all the macvlan filters and adds a
1216 * macvlan filter for each unique vlan that already exists
1217 *
1218 * Returns first filter found on success, else NULL
1219 **/
i40e_put_mac_in_vlan(struct i40e_vsi * vsi,u8 * macaddr,bool is_vf,bool is_netdev)1220 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1221 bool is_vf, bool is_netdev)
1222 {
1223 struct i40e_mac_filter *f;
1224
1225 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1226 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1227 is_vf, is_netdev)) {
1228 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1229 is_vf, is_netdev))
1230 return NULL;
1231 }
1232 }
1233
1234 return list_first_entry_or_null(&vsi->mac_filter_list,
1235 struct i40e_mac_filter, list);
1236 }
1237
1238 /**
1239 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1240 * @vsi: the PF Main VSI - inappropriate for any other VSI
1241 * @macaddr: the MAC address
1242 *
1243 * Some older firmware configurations set up a default promiscuous VLAN
1244 * filter that needs to be removed.
1245 **/
i40e_rm_default_mac_filter(struct i40e_vsi * vsi,u8 * macaddr)1246 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1247 {
1248 struct i40e_aqc_remove_macvlan_element_data element;
1249 struct i40e_pf *pf = vsi->back;
1250 i40e_status aq_ret;
1251
1252 /* Only appropriate for the PF main VSI */
1253 if (vsi->type != I40E_VSI_MAIN)
1254 return -EINVAL;
1255
1256 memset(&element, 0, sizeof(element));
1257 ether_addr_copy(element.mac_addr, macaddr);
1258 element.vlan_tag = 0;
1259 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1260 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1261 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1262 if (aq_ret)
1263 return -ENOENT;
1264
1265 return 0;
1266 }
1267
1268 /**
1269 * i40e_add_filter - Add a mac/vlan filter to the VSI
1270 * @vsi: the VSI to be searched
1271 * @macaddr: the MAC address
1272 * @vlan: the vlan
1273 * @is_vf: make sure its a vf filter, else doesn't matter
1274 * @is_netdev: make sure its a netdev filter, else doesn't matter
1275 *
1276 * Returns ptr to the filter object or NULL when no memory available.
1277 **/
i40e_add_filter(struct i40e_vsi * vsi,u8 * macaddr,s16 vlan,bool is_vf,bool is_netdev)1278 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1279 u8 *macaddr, s16 vlan,
1280 bool is_vf, bool is_netdev)
1281 {
1282 struct i40e_mac_filter *f;
1283
1284 if (!vsi || !macaddr)
1285 return NULL;
1286
1287 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1288 if (!f) {
1289 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1290 if (!f)
1291 goto add_filter_out;
1292
1293 ether_addr_copy(f->macaddr, macaddr);
1294 f->vlan = vlan;
1295 f->changed = true;
1296
1297 INIT_LIST_HEAD(&f->list);
1298 list_add(&f->list, &vsi->mac_filter_list);
1299 }
1300
1301 /* increment counter and add a new flag if needed */
1302 if (is_vf) {
1303 if (!f->is_vf) {
1304 f->is_vf = true;
1305 f->counter++;
1306 }
1307 } else if (is_netdev) {
1308 if (!f->is_netdev) {
1309 f->is_netdev = true;
1310 f->counter++;
1311 }
1312 } else {
1313 f->counter++;
1314 }
1315
1316 /* changed tells sync_filters_subtask to
1317 * push the filter down to the firmware
1318 */
1319 if (f->changed) {
1320 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1321 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1322 }
1323
1324 add_filter_out:
1325 return f;
1326 }
1327
1328 /**
1329 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1330 * @vsi: the VSI to be searched
1331 * @macaddr: the MAC address
1332 * @vlan: the vlan
1333 * @is_vf: make sure it's a vf filter, else doesn't matter
1334 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1335 **/
i40e_del_filter(struct i40e_vsi * vsi,u8 * macaddr,s16 vlan,bool is_vf,bool is_netdev)1336 void i40e_del_filter(struct i40e_vsi *vsi,
1337 u8 *macaddr, s16 vlan,
1338 bool is_vf, bool is_netdev)
1339 {
1340 struct i40e_mac_filter *f;
1341
1342 if (!vsi || !macaddr)
1343 return;
1344
1345 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1346 if (!f || f->counter == 0)
1347 return;
1348
1349 if (is_vf) {
1350 if (f->is_vf) {
1351 f->is_vf = false;
1352 f->counter--;
1353 }
1354 } else if (is_netdev) {
1355 if (f->is_netdev) {
1356 f->is_netdev = false;
1357 f->counter--;
1358 }
1359 } else {
1360 /* make sure we don't remove a filter in use by vf or netdev */
1361 int min_f = 0;
1362 min_f += (f->is_vf ? 1 : 0);
1363 min_f += (f->is_netdev ? 1 : 0);
1364
1365 if (f->counter > min_f)
1366 f->counter--;
1367 }
1368
1369 /* counter == 0 tells sync_filters_subtask to
1370 * remove the filter from the firmware's list
1371 */
1372 if (f->counter == 0) {
1373 f->changed = true;
1374 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1375 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1376 }
1377 }
1378
1379 /**
1380 * i40e_set_mac - NDO callback to set mac address
1381 * @netdev: network interface device structure
1382 * @p: pointer to an address structure
1383 *
1384 * Returns 0 on success, negative on failure
1385 **/
1386 #ifdef I40E_FCOE
i40e_set_mac(struct net_device * netdev,void * p)1387 int i40e_set_mac(struct net_device *netdev, void *p)
1388 #else
1389 static int i40e_set_mac(struct net_device *netdev, void *p)
1390 #endif
1391 {
1392 struct i40e_netdev_priv *np = netdev_priv(netdev);
1393 struct i40e_vsi *vsi = np->vsi;
1394 struct i40e_pf *pf = vsi->back;
1395 struct i40e_hw *hw = &pf->hw;
1396 struct sockaddr *addr = p;
1397 struct i40e_mac_filter *f;
1398
1399 if (!is_valid_ether_addr(addr->sa_data))
1400 return -EADDRNOTAVAIL;
1401
1402 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1403 netdev_info(netdev, "already using mac address %pM\n",
1404 addr->sa_data);
1405 return 0;
1406 }
1407
1408 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1409 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1410 return -EADDRNOTAVAIL;
1411
1412 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1413 netdev_info(netdev, "returning to hw mac address %pM\n",
1414 hw->mac.addr);
1415 else
1416 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1417
1418 if (vsi->type == I40E_VSI_MAIN) {
1419 i40e_status ret;
1420 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1421 I40E_AQC_WRITE_TYPE_LAA_WOL,
1422 addr->sa_data, NULL);
1423 if (ret) {
1424 netdev_info(netdev,
1425 "Addr change for Main VSI failed: %d\n",
1426 ret);
1427 return -EADDRNOTAVAIL;
1428 }
1429 }
1430
1431 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1432 struct i40e_aqc_remove_macvlan_element_data element;
1433
1434 memset(&element, 0, sizeof(element));
1435 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1436 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1437 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1438 } else {
1439 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1440 false, false);
1441 }
1442
1443 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1444 struct i40e_aqc_add_macvlan_element_data element;
1445
1446 memset(&element, 0, sizeof(element));
1447 ether_addr_copy(element.mac_addr, hw->mac.addr);
1448 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1449 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1450 } else {
1451 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1452 false, false);
1453 if (f)
1454 f->is_laa = true;
1455 }
1456
1457 i40e_sync_vsi_filters(vsi);
1458 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1459
1460 return 0;
1461 }
1462
1463 /**
1464 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1465 * @vsi: the VSI being setup
1466 * @ctxt: VSI context structure
1467 * @enabled_tc: Enabled TCs bitmap
1468 * @is_add: True if called before Add VSI
1469 *
1470 * Setup VSI queue mapping for enabled traffic classes.
1471 **/
1472 #ifdef I40E_FCOE
i40e_vsi_setup_queue_map(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt,u8 enabled_tc,bool is_add)1473 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1475 u8 enabled_tc,
1476 bool is_add)
1477 #else
1478 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1479 struct i40e_vsi_context *ctxt,
1480 u8 enabled_tc,
1481 bool is_add)
1482 #endif
1483 {
1484 struct i40e_pf *pf = vsi->back;
1485 u16 sections = 0;
1486 u8 netdev_tc = 0;
1487 u16 numtc = 0;
1488 u16 qcount;
1489 u8 offset;
1490 u16 qmap;
1491 int i;
1492 u16 num_tc_qps = 0;
1493
1494 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1495 offset = 0;
1496
1497 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1498 /* Find numtc from enabled TC bitmap */
1499 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1500 if (enabled_tc & (1 << i)) /* TC is enabled */
1501 numtc++;
1502 }
1503 if (!numtc) {
1504 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1505 numtc = 1;
1506 }
1507 } else {
1508 /* At least TC0 is enabled in case of non-DCB case */
1509 numtc = 1;
1510 }
1511
1512 vsi->tc_config.numtc = numtc;
1513 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1514 /* Number of queues per enabled TC */
1515 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1516 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1517
1518 /* Setup queue offset/count for all TCs for given VSI */
1519 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1520 /* See if the given TC is enabled for the given VSI */
1521 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1522 int pow, num_qps;
1523
1524 switch (vsi->type) {
1525 case I40E_VSI_MAIN:
1526 qcount = min_t(int, pf->rss_size, num_tc_qps);
1527 break;
1528 #ifdef I40E_FCOE
1529 case I40E_VSI_FCOE:
1530 qcount = num_tc_qps;
1531 break;
1532 #endif
1533 case I40E_VSI_FDIR:
1534 case I40E_VSI_SRIOV:
1535 case I40E_VSI_VMDQ2:
1536 default:
1537 qcount = num_tc_qps;
1538 WARN_ON(i != 0);
1539 break;
1540 }
1541 vsi->tc_config.tc_info[i].qoffset = offset;
1542 vsi->tc_config.tc_info[i].qcount = qcount;
1543
1544 /* find the power-of-2 of the number of queue pairs */
1545 num_qps = qcount;
1546 pow = 0;
1547 while (num_qps && ((1 << pow) < qcount)) {
1548 pow++;
1549 num_qps >>= 1;
1550 }
1551
1552 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1553 qmap =
1554 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1555 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1556
1557 offset += qcount;
1558 } else {
1559 /* TC is not enabled so set the offset to
1560 * default queue and allocate one queue
1561 * for the given TC.
1562 */
1563 vsi->tc_config.tc_info[i].qoffset = 0;
1564 vsi->tc_config.tc_info[i].qcount = 1;
1565 vsi->tc_config.tc_info[i].netdev_tc = 0;
1566
1567 qmap = 0;
1568 }
1569 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1570 }
1571
1572 /* Set actual Tx/Rx queue pairs */
1573 vsi->num_queue_pairs = offset;
1574
1575 /* Scheduler section valid can only be set for ADD VSI */
1576 if (is_add) {
1577 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1578
1579 ctxt->info.up_enable_bits = enabled_tc;
1580 }
1581 if (vsi->type == I40E_VSI_SRIOV) {
1582 ctxt->info.mapping_flags |=
1583 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1584 for (i = 0; i < vsi->num_queue_pairs; i++)
1585 ctxt->info.queue_mapping[i] =
1586 cpu_to_le16(vsi->base_queue + i);
1587 } else {
1588 ctxt->info.mapping_flags |=
1589 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1590 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1591 }
1592 ctxt->info.valid_sections |= cpu_to_le16(sections);
1593 }
1594
1595 /**
1596 * i40e_set_rx_mode - NDO callback to set the netdev filters
1597 * @netdev: network interface device structure
1598 **/
1599 #ifdef I40E_FCOE
i40e_set_rx_mode(struct net_device * netdev)1600 void i40e_set_rx_mode(struct net_device *netdev)
1601 #else
1602 static void i40e_set_rx_mode(struct net_device *netdev)
1603 #endif
1604 {
1605 struct i40e_netdev_priv *np = netdev_priv(netdev);
1606 struct i40e_mac_filter *f, *ftmp;
1607 struct i40e_vsi *vsi = np->vsi;
1608 struct netdev_hw_addr *uca;
1609 struct netdev_hw_addr *mca;
1610 struct netdev_hw_addr *ha;
1611
1612 /* add addr if not already in the filter list */
1613 netdev_for_each_uc_addr(uca, netdev) {
1614 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1615 if (i40e_is_vsi_in_vlan(vsi))
1616 i40e_put_mac_in_vlan(vsi, uca->addr,
1617 false, true);
1618 else
1619 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1620 false, true);
1621 }
1622 }
1623
1624 netdev_for_each_mc_addr(mca, netdev) {
1625 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1626 if (i40e_is_vsi_in_vlan(vsi))
1627 i40e_put_mac_in_vlan(vsi, mca->addr,
1628 false, true);
1629 else
1630 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1631 false, true);
1632 }
1633 }
1634
1635 /* remove filter if not in netdev list */
1636 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1637 bool found = false;
1638
1639 if (!f->is_netdev)
1640 continue;
1641
1642 if (is_multicast_ether_addr(f->macaddr)) {
1643 netdev_for_each_mc_addr(mca, netdev) {
1644 if (ether_addr_equal(mca->addr, f->macaddr)) {
1645 found = true;
1646 break;
1647 }
1648 }
1649 } else {
1650 netdev_for_each_uc_addr(uca, netdev) {
1651 if (ether_addr_equal(uca->addr, f->macaddr)) {
1652 found = true;
1653 break;
1654 }
1655 }
1656
1657 for_each_dev_addr(netdev, ha) {
1658 if (ether_addr_equal(ha->addr, f->macaddr)) {
1659 found = true;
1660 break;
1661 }
1662 }
1663 }
1664 if (!found)
1665 i40e_del_filter(
1666 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1667 }
1668
1669 /* check for other flag changes */
1670 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1671 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1672 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1673 }
1674 }
1675
1676 /**
1677 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1678 * @vsi: ptr to the VSI
1679 *
1680 * Push any outstanding VSI filter changes through the AdminQ.
1681 *
1682 * Returns 0 or error value
1683 **/
i40e_sync_vsi_filters(struct i40e_vsi * vsi)1684 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1685 {
1686 struct i40e_mac_filter *f, *ftmp;
1687 bool promisc_forced_on = false;
1688 bool add_happened = false;
1689 int filter_list_len = 0;
1690 u32 changed_flags = 0;
1691 i40e_status aq_ret = 0;
1692 struct i40e_pf *pf;
1693 int num_add = 0;
1694 int num_del = 0;
1695 u16 cmd_flags;
1696
1697 /* empty array typed pointers, kcalloc later */
1698 struct i40e_aqc_add_macvlan_element_data *add_list;
1699 struct i40e_aqc_remove_macvlan_element_data *del_list;
1700
1701 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1702 usleep_range(1000, 2000);
1703 pf = vsi->back;
1704
1705 if (vsi->netdev) {
1706 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1707 vsi->current_netdev_flags = vsi->netdev->flags;
1708 }
1709
1710 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1711 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1712
1713 filter_list_len = pf->hw.aq.asq_buf_size /
1714 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1715 del_list = kcalloc(filter_list_len,
1716 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1717 GFP_KERNEL);
1718 if (!del_list)
1719 return -ENOMEM;
1720
1721 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1722 if (!f->changed)
1723 continue;
1724
1725 if (f->counter != 0)
1726 continue;
1727 f->changed = false;
1728 cmd_flags = 0;
1729
1730 /* add to delete list */
1731 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1732 del_list[num_del].vlan_tag =
1733 cpu_to_le16((u16)(f->vlan ==
1734 I40E_VLAN_ANY ? 0 : f->vlan));
1735
1736 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1737 del_list[num_del].flags = cmd_flags;
1738 num_del++;
1739
1740 /* unlink from filter list */
1741 list_del(&f->list);
1742 kfree(f);
1743
1744 /* flush a full buffer */
1745 if (num_del == filter_list_len) {
1746 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1747 vsi->seid, del_list, num_del,
1748 NULL);
1749 num_del = 0;
1750 memset(del_list, 0, sizeof(*del_list));
1751
1752 if (aq_ret &&
1753 pf->hw.aq.asq_last_status !=
1754 I40E_AQ_RC_ENOENT)
1755 dev_info(&pf->pdev->dev,
1756 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1757 aq_ret,
1758 pf->hw.aq.asq_last_status);
1759 }
1760 }
1761 if (num_del) {
1762 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1763 del_list, num_del, NULL);
1764 num_del = 0;
1765
1766 if (aq_ret &&
1767 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1768 dev_info(&pf->pdev->dev,
1769 "ignoring delete macvlan error, err %d, aq_err %d\n",
1770 aq_ret, pf->hw.aq.asq_last_status);
1771 }
1772
1773 kfree(del_list);
1774 del_list = NULL;
1775
1776 /* do all the adds now */
1777 filter_list_len = pf->hw.aq.asq_buf_size /
1778 sizeof(struct i40e_aqc_add_macvlan_element_data),
1779 add_list = kcalloc(filter_list_len,
1780 sizeof(struct i40e_aqc_add_macvlan_element_data),
1781 GFP_KERNEL);
1782 if (!add_list)
1783 return -ENOMEM;
1784
1785 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1786 if (!f->changed)
1787 continue;
1788
1789 if (f->counter == 0)
1790 continue;
1791 f->changed = false;
1792 add_happened = true;
1793 cmd_flags = 0;
1794
1795 /* add to add array */
1796 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1797 add_list[num_add].vlan_tag =
1798 cpu_to_le16(
1799 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1800 add_list[num_add].queue_number = 0;
1801
1802 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1803 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1804 num_add++;
1805
1806 /* flush a full buffer */
1807 if (num_add == filter_list_len) {
1808 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1809 add_list, num_add,
1810 NULL);
1811 num_add = 0;
1812
1813 if (aq_ret)
1814 break;
1815 memset(add_list, 0, sizeof(*add_list));
1816 }
1817 }
1818 if (num_add) {
1819 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1820 add_list, num_add, NULL);
1821 num_add = 0;
1822 }
1823 kfree(add_list);
1824 add_list = NULL;
1825
1826 if (add_happened && aq_ret &&
1827 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1828 dev_info(&pf->pdev->dev,
1829 "add filter failed, err %d, aq_err %d\n",
1830 aq_ret, pf->hw.aq.asq_last_status);
1831 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1832 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1833 &vsi->state)) {
1834 promisc_forced_on = true;
1835 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1836 &vsi->state);
1837 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1838 }
1839 }
1840 }
1841
1842 /* check for changes in promiscuous modes */
1843 if (changed_flags & IFF_ALLMULTI) {
1844 bool cur_multipromisc;
1845 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1846 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1847 vsi->seid,
1848 cur_multipromisc,
1849 NULL);
1850 if (aq_ret)
1851 dev_info(&pf->pdev->dev,
1852 "set multi promisc failed, err %d, aq_err %d\n",
1853 aq_ret, pf->hw.aq.asq_last_status);
1854 }
1855 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1856 bool cur_promisc;
1857 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1858 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1859 &vsi->state));
1860 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1861 vsi->seid,
1862 cur_promisc, NULL);
1863 if (aq_ret)
1864 dev_info(&pf->pdev->dev,
1865 "set uni promisc failed, err %d, aq_err %d\n",
1866 aq_ret, pf->hw.aq.asq_last_status);
1867 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1868 vsi->seid,
1869 cur_promisc, NULL);
1870 if (aq_ret)
1871 dev_info(&pf->pdev->dev,
1872 "set brdcast promisc failed, err %d, aq_err %d\n",
1873 aq_ret, pf->hw.aq.asq_last_status);
1874 }
1875
1876 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1877 return 0;
1878 }
1879
1880 /**
1881 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1882 * @pf: board private structure
1883 **/
i40e_sync_filters_subtask(struct i40e_pf * pf)1884 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1885 {
1886 int v;
1887
1888 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1889 return;
1890 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1891
1892 for (v = 0; v < pf->num_alloc_vsi; v++) {
1893 if (pf->vsi[v] &&
1894 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1895 i40e_sync_vsi_filters(pf->vsi[v]);
1896 }
1897 }
1898
1899 /**
1900 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1901 * @netdev: network interface device structure
1902 * @new_mtu: new value for maximum frame size
1903 *
1904 * Returns 0 on success, negative on failure
1905 **/
i40e_change_mtu(struct net_device * netdev,int new_mtu)1906 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1907 {
1908 struct i40e_netdev_priv *np = netdev_priv(netdev);
1909 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1910 struct i40e_vsi *vsi = np->vsi;
1911
1912 /* MTU < 68 is an error and causes problems on some kernels */
1913 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1914 return -EINVAL;
1915
1916 netdev_info(netdev, "changing MTU from %d to %d\n",
1917 netdev->mtu, new_mtu);
1918 netdev->mtu = new_mtu;
1919 if (netif_running(netdev))
1920 i40e_vsi_reinit_locked(vsi);
1921
1922 return 0;
1923 }
1924
1925 /**
1926 * i40e_ioctl - Access the hwtstamp interface
1927 * @netdev: network interface device structure
1928 * @ifr: interface request data
1929 * @cmd: ioctl command
1930 **/
i40e_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)1931 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1932 {
1933 struct i40e_netdev_priv *np = netdev_priv(netdev);
1934 struct i40e_pf *pf = np->vsi->back;
1935
1936 switch (cmd) {
1937 case SIOCGHWTSTAMP:
1938 return i40e_ptp_get_ts_config(pf, ifr);
1939 case SIOCSHWTSTAMP:
1940 return i40e_ptp_set_ts_config(pf, ifr);
1941 default:
1942 return -EOPNOTSUPP;
1943 }
1944 }
1945
1946 /**
1947 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1948 * @vsi: the vsi being adjusted
1949 **/
i40e_vlan_stripping_enable(struct i40e_vsi * vsi)1950 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1951 {
1952 struct i40e_vsi_context ctxt;
1953 i40e_status ret;
1954
1955 if ((vsi->info.valid_sections &
1956 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1957 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1958 return; /* already enabled */
1959
1960 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1961 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1962 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1963
1964 ctxt.seid = vsi->seid;
1965 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1966 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1967 if (ret) {
1968 dev_info(&vsi->back->pdev->dev,
1969 "%s: update vsi failed, aq_err=%d\n",
1970 __func__, vsi->back->hw.aq.asq_last_status);
1971 }
1972 }
1973
1974 /**
1975 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1976 * @vsi: the vsi being adjusted
1977 **/
i40e_vlan_stripping_disable(struct i40e_vsi * vsi)1978 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1979 {
1980 struct i40e_vsi_context ctxt;
1981 i40e_status ret;
1982
1983 if ((vsi->info.valid_sections &
1984 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1985 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1986 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1987 return; /* already disabled */
1988
1989 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1990 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1991 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1992
1993 ctxt.seid = vsi->seid;
1994 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1995 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1996 if (ret) {
1997 dev_info(&vsi->back->pdev->dev,
1998 "%s: update vsi failed, aq_err=%d\n",
1999 __func__, vsi->back->hw.aq.asq_last_status);
2000 }
2001 }
2002
2003 /**
2004 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2005 * @netdev: network interface to be adjusted
2006 * @features: netdev features to test if VLAN offload is enabled or not
2007 **/
i40e_vlan_rx_register(struct net_device * netdev,u32 features)2008 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2009 {
2010 struct i40e_netdev_priv *np = netdev_priv(netdev);
2011 struct i40e_vsi *vsi = np->vsi;
2012
2013 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2014 i40e_vlan_stripping_enable(vsi);
2015 else
2016 i40e_vlan_stripping_disable(vsi);
2017 }
2018
2019 /**
2020 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2021 * @vsi: the vsi being configured
2022 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2023 **/
i40e_vsi_add_vlan(struct i40e_vsi * vsi,s16 vid)2024 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2025 {
2026 struct i40e_mac_filter *f, *add_f;
2027 bool is_netdev, is_vf;
2028
2029 is_vf = (vsi->type == I40E_VSI_SRIOV);
2030 is_netdev = !!(vsi->netdev);
2031
2032 if (is_netdev) {
2033 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2034 is_vf, is_netdev);
2035 if (!add_f) {
2036 dev_info(&vsi->back->pdev->dev,
2037 "Could not add vlan filter %d for %pM\n",
2038 vid, vsi->netdev->dev_addr);
2039 return -ENOMEM;
2040 }
2041 }
2042
2043 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2044 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2045 if (!add_f) {
2046 dev_info(&vsi->back->pdev->dev,
2047 "Could not add vlan filter %d for %pM\n",
2048 vid, f->macaddr);
2049 return -ENOMEM;
2050 }
2051 }
2052
2053 /* Now if we add a vlan tag, make sure to check if it is the first
2054 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2055 * with 0, so we now accept untagged and specified tagged traffic
2056 * (and not any taged and untagged)
2057 */
2058 if (vid > 0) {
2059 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2060 I40E_VLAN_ANY,
2061 is_vf, is_netdev)) {
2062 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2063 I40E_VLAN_ANY, is_vf, is_netdev);
2064 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2065 is_vf, is_netdev);
2066 if (!add_f) {
2067 dev_info(&vsi->back->pdev->dev,
2068 "Could not add filter 0 for %pM\n",
2069 vsi->netdev->dev_addr);
2070 return -ENOMEM;
2071 }
2072 }
2073 }
2074
2075 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2076 if (vid > 0 && !vsi->info.pvid) {
2077 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2078 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2079 is_vf, is_netdev)) {
2080 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2081 is_vf, is_netdev);
2082 add_f = i40e_add_filter(vsi, f->macaddr,
2083 0, is_vf, is_netdev);
2084 if (!add_f) {
2085 dev_info(&vsi->back->pdev->dev,
2086 "Could not add filter 0 for %pM\n",
2087 f->macaddr);
2088 return -ENOMEM;
2089 }
2090 }
2091 }
2092 }
2093
2094 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2095 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2096 return 0;
2097
2098 return i40e_sync_vsi_filters(vsi);
2099 }
2100
2101 /**
2102 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2103 * @vsi: the vsi being configured
2104 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2105 *
2106 * Return: 0 on success or negative otherwise
2107 **/
i40e_vsi_kill_vlan(struct i40e_vsi * vsi,s16 vid)2108 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2109 {
2110 struct net_device *netdev = vsi->netdev;
2111 struct i40e_mac_filter *f, *add_f;
2112 bool is_vf, is_netdev;
2113 int filter_count = 0;
2114
2115 is_vf = (vsi->type == I40E_VSI_SRIOV);
2116 is_netdev = !!(netdev);
2117
2118 if (is_netdev)
2119 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2120
2121 list_for_each_entry(f, &vsi->mac_filter_list, list)
2122 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2123
2124 /* go through all the filters for this VSI and if there is only
2125 * vid == 0 it means there are no other filters, so vid 0 must
2126 * be replaced with -1. This signifies that we should from now
2127 * on accept any traffic (with any tag present, or untagged)
2128 */
2129 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2130 if (is_netdev) {
2131 if (f->vlan &&
2132 ether_addr_equal(netdev->dev_addr, f->macaddr))
2133 filter_count++;
2134 }
2135
2136 if (f->vlan)
2137 filter_count++;
2138 }
2139
2140 if (!filter_count && is_netdev) {
2141 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2142 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2143 is_vf, is_netdev);
2144 if (!f) {
2145 dev_info(&vsi->back->pdev->dev,
2146 "Could not add filter %d for %pM\n",
2147 I40E_VLAN_ANY, netdev->dev_addr);
2148 return -ENOMEM;
2149 }
2150 }
2151
2152 if (!filter_count) {
2153 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2154 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2155 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2156 is_vf, is_netdev);
2157 if (!add_f) {
2158 dev_info(&vsi->back->pdev->dev,
2159 "Could not add filter %d for %pM\n",
2160 I40E_VLAN_ANY, f->macaddr);
2161 return -ENOMEM;
2162 }
2163 }
2164 }
2165
2166 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2167 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2168 return 0;
2169
2170 return i40e_sync_vsi_filters(vsi);
2171 }
2172
2173 /**
2174 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2175 * @netdev: network interface to be adjusted
2176 * @vid: vlan id to be added
2177 *
2178 * net_device_ops implementation for adding vlan ids
2179 **/
2180 #ifdef I40E_FCOE
i40e_vlan_rx_add_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)2181 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2182 __always_unused __be16 proto, u16 vid)
2183 #else
2184 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2185 __always_unused __be16 proto, u16 vid)
2186 #endif
2187 {
2188 struct i40e_netdev_priv *np = netdev_priv(netdev);
2189 struct i40e_vsi *vsi = np->vsi;
2190 int ret = 0;
2191
2192 if (vid > 4095)
2193 return -EINVAL;
2194
2195 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2196
2197 /* If the network stack called us with vid = 0 then
2198 * it is asking to receive priority tagged packets with
2199 * vlan id 0. Our HW receives them by default when configured
2200 * to receive untagged packets so there is no need to add an
2201 * extra filter for vlan 0 tagged packets.
2202 */
2203 if (vid)
2204 ret = i40e_vsi_add_vlan(vsi, vid);
2205
2206 if (!ret && (vid < VLAN_N_VID))
2207 set_bit(vid, vsi->active_vlans);
2208
2209 return ret;
2210 }
2211
2212 /**
2213 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2214 * @netdev: network interface to be adjusted
2215 * @vid: vlan id to be removed
2216 *
2217 * net_device_ops implementation for removing vlan ids
2218 **/
2219 #ifdef I40E_FCOE
i40e_vlan_rx_kill_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)2220 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2221 __always_unused __be16 proto, u16 vid)
2222 #else
2223 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2224 __always_unused __be16 proto, u16 vid)
2225 #endif
2226 {
2227 struct i40e_netdev_priv *np = netdev_priv(netdev);
2228 struct i40e_vsi *vsi = np->vsi;
2229
2230 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2231
2232 /* return code is ignored as there is nothing a user
2233 * can do about failure to remove and a log message was
2234 * already printed from the other function
2235 */
2236 i40e_vsi_kill_vlan(vsi, vid);
2237
2238 clear_bit(vid, vsi->active_vlans);
2239
2240 return 0;
2241 }
2242
2243 /**
2244 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2245 * @vsi: the vsi being brought back up
2246 **/
i40e_restore_vlan(struct i40e_vsi * vsi)2247 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2248 {
2249 u16 vid;
2250
2251 if (!vsi->netdev)
2252 return;
2253
2254 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2255
2256 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2257 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2258 vid);
2259 }
2260
2261 /**
2262 * i40e_vsi_add_pvid - Add pvid for the VSI
2263 * @vsi: the vsi being adjusted
2264 * @vid: the vlan id to set as a PVID
2265 **/
i40e_vsi_add_pvid(struct i40e_vsi * vsi,u16 vid)2266 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2267 {
2268 struct i40e_vsi_context ctxt;
2269 i40e_status aq_ret;
2270
2271 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2272 vsi->info.pvid = cpu_to_le16(vid);
2273 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2274 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2275 I40E_AQ_VSI_PVLAN_EMOD_STR;
2276
2277 ctxt.seid = vsi->seid;
2278 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2279 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2280 if (aq_ret) {
2281 dev_info(&vsi->back->pdev->dev,
2282 "%s: update vsi failed, aq_err=%d\n",
2283 __func__, vsi->back->hw.aq.asq_last_status);
2284 return -ENOENT;
2285 }
2286
2287 return 0;
2288 }
2289
2290 /**
2291 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2292 * @vsi: the vsi being adjusted
2293 *
2294 * Just use the vlan_rx_register() service to put it back to normal
2295 **/
i40e_vsi_remove_pvid(struct i40e_vsi * vsi)2296 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2297 {
2298 i40e_vlan_stripping_disable(vsi);
2299
2300 vsi->info.pvid = 0;
2301 }
2302
2303 /**
2304 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2305 * @vsi: ptr to the VSI
2306 *
2307 * If this function returns with an error, then it's possible one or
2308 * more of the rings is populated (while the rest are not). It is the
2309 * callers duty to clean those orphaned rings.
2310 *
2311 * Return 0 on success, negative on failure
2312 **/
i40e_vsi_setup_tx_resources(struct i40e_vsi * vsi)2313 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2314 {
2315 int i, err = 0;
2316
2317 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2318 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2319
2320 return err;
2321 }
2322
2323 /**
2324 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2325 * @vsi: ptr to the VSI
2326 *
2327 * Free VSI's transmit software resources
2328 **/
i40e_vsi_free_tx_resources(struct i40e_vsi * vsi)2329 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2330 {
2331 int i;
2332
2333 if (!vsi->tx_rings)
2334 return;
2335
2336 for (i = 0; i < vsi->num_queue_pairs; i++)
2337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2338 i40e_free_tx_resources(vsi->tx_rings[i]);
2339 }
2340
2341 /**
2342 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2343 * @vsi: ptr to the VSI
2344 *
2345 * If this function returns with an error, then it's possible one or
2346 * more of the rings is populated (while the rest are not). It is the
2347 * callers duty to clean those orphaned rings.
2348 *
2349 * Return 0 on success, negative on failure
2350 **/
i40e_vsi_setup_rx_resources(struct i40e_vsi * vsi)2351 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2352 {
2353 int i, err = 0;
2354
2355 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2356 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2357 #ifdef I40E_FCOE
2358 i40e_fcoe_setup_ddp_resources(vsi);
2359 #endif
2360 return err;
2361 }
2362
2363 /**
2364 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2365 * @vsi: ptr to the VSI
2366 *
2367 * Free all receive software resources
2368 **/
i40e_vsi_free_rx_resources(struct i40e_vsi * vsi)2369 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2370 {
2371 int i;
2372
2373 if (!vsi->rx_rings)
2374 return;
2375
2376 for (i = 0; i < vsi->num_queue_pairs; i++)
2377 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2378 i40e_free_rx_resources(vsi->rx_rings[i]);
2379 #ifdef I40E_FCOE
2380 i40e_fcoe_free_ddp_resources(vsi);
2381 #endif
2382 }
2383
2384 /**
2385 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2386 * @ring: The Tx ring to configure
2387 *
2388 * Configure the Tx descriptor ring in the HMC context.
2389 **/
i40e_configure_tx_ring(struct i40e_ring * ring)2390 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2391 {
2392 struct i40e_vsi *vsi = ring->vsi;
2393 u16 pf_q = vsi->base_queue + ring->queue_index;
2394 struct i40e_hw *hw = &vsi->back->hw;
2395 struct i40e_hmc_obj_txq tx_ctx;
2396 i40e_status err = 0;
2397 u32 qtx_ctl = 0;
2398
2399 /* some ATR related tx ring init */
2400 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2401 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2402 ring->atr_count = 0;
2403 } else {
2404 ring->atr_sample_rate = 0;
2405 }
2406
2407 /* initialize XPS */
2408 if (ring->q_vector && ring->netdev &&
2409 vsi->tc_config.numtc <= 1 &&
2410 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2411 netif_set_xps_queue(ring->netdev,
2412 &ring->q_vector->affinity_mask,
2413 ring->queue_index);
2414
2415 /* clear the context structure first */
2416 memset(&tx_ctx, 0, sizeof(tx_ctx));
2417
2418 tx_ctx.new_context = 1;
2419 tx_ctx.base = (ring->dma / 128);
2420 tx_ctx.qlen = ring->count;
2421 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2422 I40E_FLAG_FD_ATR_ENABLED));
2423 #ifdef I40E_FCOE
2424 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2425 #endif
2426 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2427 /* FDIR VSI tx ring can still use RS bit and writebacks */
2428 if (vsi->type != I40E_VSI_FDIR)
2429 tx_ctx.head_wb_ena = 1;
2430 tx_ctx.head_wb_addr = ring->dma +
2431 (ring->count * sizeof(struct i40e_tx_desc));
2432
2433 /* As part of VSI creation/update, FW allocates certain
2434 * Tx arbitration queue sets for each TC enabled for
2435 * the VSI. The FW returns the handles to these queue
2436 * sets as part of the response buffer to Add VSI,
2437 * Update VSI, etc. AQ commands. It is expected that
2438 * these queue set handles be associated with the Tx
2439 * queues by the driver as part of the TX queue context
2440 * initialization. This has to be done regardless of
2441 * DCB as by default everything is mapped to TC0.
2442 */
2443 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2444 tx_ctx.rdylist_act = 0;
2445
2446 /* clear the context in the HMC */
2447 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2448 if (err) {
2449 dev_info(&vsi->back->pdev->dev,
2450 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2451 ring->queue_index, pf_q, err);
2452 return -ENOMEM;
2453 }
2454
2455 /* set the context in the HMC */
2456 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2457 if (err) {
2458 dev_info(&vsi->back->pdev->dev,
2459 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2460 ring->queue_index, pf_q, err);
2461 return -ENOMEM;
2462 }
2463
2464 /* Now associate this queue with this PCI function */
2465 if (vsi->type == I40E_VSI_VMDQ2)
2466 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2467 else
2468 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2469 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2470 I40E_QTX_CTL_PF_INDX_MASK);
2471 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2472 i40e_flush(hw);
2473
2474 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2475
2476 /* cache tail off for easier writes later */
2477 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2478
2479 return 0;
2480 }
2481
2482 /**
2483 * i40e_configure_rx_ring - Configure a receive ring context
2484 * @ring: The Rx ring to configure
2485 *
2486 * Configure the Rx descriptor ring in the HMC context.
2487 **/
i40e_configure_rx_ring(struct i40e_ring * ring)2488 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2489 {
2490 struct i40e_vsi *vsi = ring->vsi;
2491 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2492 u16 pf_q = vsi->base_queue + ring->queue_index;
2493 struct i40e_hw *hw = &vsi->back->hw;
2494 struct i40e_hmc_obj_rxq rx_ctx;
2495 i40e_status err = 0;
2496
2497 ring->state = 0;
2498
2499 /* clear the context structure first */
2500 memset(&rx_ctx, 0, sizeof(rx_ctx));
2501
2502 ring->rx_buf_len = vsi->rx_buf_len;
2503 ring->rx_hdr_len = vsi->rx_hdr_len;
2504
2505 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2506 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2507
2508 rx_ctx.base = (ring->dma / 128);
2509 rx_ctx.qlen = ring->count;
2510
2511 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2512 set_ring_16byte_desc_enabled(ring);
2513 rx_ctx.dsize = 0;
2514 } else {
2515 rx_ctx.dsize = 1;
2516 }
2517
2518 rx_ctx.dtype = vsi->dtype;
2519 if (vsi->dtype) {
2520 set_ring_ps_enabled(ring);
2521 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2522 I40E_RX_SPLIT_IP |
2523 I40E_RX_SPLIT_TCP_UDP |
2524 I40E_RX_SPLIT_SCTP;
2525 } else {
2526 rx_ctx.hsplit_0 = 0;
2527 }
2528
2529 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2530 (chain_len * ring->rx_buf_len));
2531 if (hw->revision_id == 0)
2532 rx_ctx.lrxqthresh = 0;
2533 else
2534 rx_ctx.lrxqthresh = 2;
2535 rx_ctx.crcstrip = 1;
2536 rx_ctx.l2tsel = 1;
2537 rx_ctx.showiv = 1;
2538 #ifdef I40E_FCOE
2539 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2540 #endif
2541 /* set the prefena field to 1 because the manual says to */
2542 rx_ctx.prefena = 1;
2543
2544 /* clear the context in the HMC */
2545 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2546 if (err) {
2547 dev_info(&vsi->back->pdev->dev,
2548 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2549 ring->queue_index, pf_q, err);
2550 return -ENOMEM;
2551 }
2552
2553 /* set the context in the HMC */
2554 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2555 if (err) {
2556 dev_info(&vsi->back->pdev->dev,
2557 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2558 ring->queue_index, pf_q, err);
2559 return -ENOMEM;
2560 }
2561
2562 /* cache tail for quicker writes, and clear the reg before use */
2563 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2564 writel(0, ring->tail);
2565
2566 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2567
2568 return 0;
2569 }
2570
2571 /**
2572 * i40e_vsi_configure_tx - Configure the VSI for Tx
2573 * @vsi: VSI structure describing this set of rings and resources
2574 *
2575 * Configure the Tx VSI for operation.
2576 **/
i40e_vsi_configure_tx(struct i40e_vsi * vsi)2577 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2578 {
2579 int err = 0;
2580 u16 i;
2581
2582 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2583 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2584
2585 return err;
2586 }
2587
2588 /**
2589 * i40e_vsi_configure_rx - Configure the VSI for Rx
2590 * @vsi: the VSI being configured
2591 *
2592 * Configure the Rx VSI for operation.
2593 **/
i40e_vsi_configure_rx(struct i40e_vsi * vsi)2594 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2595 {
2596 int err = 0;
2597 u16 i;
2598
2599 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2600 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2601 + ETH_FCS_LEN + VLAN_HLEN;
2602 else
2603 vsi->max_frame = I40E_RXBUFFER_2048;
2604
2605 /* figure out correct receive buffer length */
2606 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2607 I40E_FLAG_RX_PS_ENABLED)) {
2608 case I40E_FLAG_RX_1BUF_ENABLED:
2609 vsi->rx_hdr_len = 0;
2610 vsi->rx_buf_len = vsi->max_frame;
2611 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2612 break;
2613 case I40E_FLAG_RX_PS_ENABLED:
2614 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2615 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2616 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2617 break;
2618 default:
2619 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2620 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2621 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2622 break;
2623 }
2624
2625 #ifdef I40E_FCOE
2626 /* setup rx buffer for FCoE */
2627 if ((vsi->type == I40E_VSI_FCOE) &&
2628 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2629 vsi->rx_hdr_len = 0;
2630 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2631 vsi->max_frame = I40E_RXBUFFER_3072;
2632 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2633 }
2634
2635 #endif /* I40E_FCOE */
2636 /* round up for the chip's needs */
2637 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2638 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2639 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2640 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2641
2642 /* set up individual rings */
2643 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2644 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2645
2646 return err;
2647 }
2648
2649 /**
2650 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2651 * @vsi: ptr to the VSI
2652 **/
i40e_vsi_config_dcb_rings(struct i40e_vsi * vsi)2653 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2654 {
2655 struct i40e_ring *tx_ring, *rx_ring;
2656 u16 qoffset, qcount;
2657 int i, n;
2658
2659 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2660 return;
2661
2662 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2663 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2664 continue;
2665
2666 qoffset = vsi->tc_config.tc_info[n].qoffset;
2667 qcount = vsi->tc_config.tc_info[n].qcount;
2668 for (i = qoffset; i < (qoffset + qcount); i++) {
2669 rx_ring = vsi->rx_rings[i];
2670 tx_ring = vsi->tx_rings[i];
2671 rx_ring->dcb_tc = n;
2672 tx_ring->dcb_tc = n;
2673 }
2674 }
2675 }
2676
2677 /**
2678 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2679 * @vsi: ptr to the VSI
2680 **/
i40e_set_vsi_rx_mode(struct i40e_vsi * vsi)2681 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2682 {
2683 if (vsi->netdev)
2684 i40e_set_rx_mode(vsi->netdev);
2685 }
2686
2687 /**
2688 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2689 * @vsi: Pointer to the targeted VSI
2690 *
2691 * This function replays the hlist on the hw where all the SB Flow Director
2692 * filters were saved.
2693 **/
i40e_fdir_filter_restore(struct i40e_vsi * vsi)2694 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2695 {
2696 struct i40e_fdir_filter *filter;
2697 struct i40e_pf *pf = vsi->back;
2698 struct hlist_node *node;
2699
2700 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2701 return;
2702
2703 hlist_for_each_entry_safe(filter, node,
2704 &pf->fdir_filter_list, fdir_node) {
2705 i40e_add_del_fdir(vsi, filter, true);
2706 }
2707 }
2708
2709 /**
2710 * i40e_vsi_configure - Set up the VSI for action
2711 * @vsi: the VSI being configured
2712 **/
i40e_vsi_configure(struct i40e_vsi * vsi)2713 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2714 {
2715 int err;
2716
2717 i40e_set_vsi_rx_mode(vsi);
2718 i40e_restore_vlan(vsi);
2719 i40e_vsi_config_dcb_rings(vsi);
2720 err = i40e_vsi_configure_tx(vsi);
2721 if (!err)
2722 err = i40e_vsi_configure_rx(vsi);
2723
2724 return err;
2725 }
2726
2727 /**
2728 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2729 * @vsi: the VSI being configured
2730 **/
i40e_vsi_configure_msix(struct i40e_vsi * vsi)2731 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2732 {
2733 struct i40e_pf *pf = vsi->back;
2734 struct i40e_q_vector *q_vector;
2735 struct i40e_hw *hw = &pf->hw;
2736 u16 vector;
2737 int i, q;
2738 u32 val;
2739 u32 qp;
2740
2741 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2742 * and PFINT_LNKLSTn registers, e.g.:
2743 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2744 */
2745 qp = vsi->base_queue;
2746 vector = vsi->base_vector;
2747 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2748 q_vector = vsi->q_vectors[i];
2749 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2750 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2751 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2752 q_vector->rx.itr);
2753 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2754 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2755 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2756 q_vector->tx.itr);
2757
2758 /* Linked list for the queuepairs assigned to this vector */
2759 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2760 for (q = 0; q < q_vector->num_ringpairs; q++) {
2761 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2762 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2763 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2764 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2765 (I40E_QUEUE_TYPE_TX
2766 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2767
2768 wr32(hw, I40E_QINT_RQCTL(qp), val);
2769
2770 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2771 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2772 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2773 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2774 (I40E_QUEUE_TYPE_RX
2775 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2776
2777 /* Terminate the linked list */
2778 if (q == (q_vector->num_ringpairs - 1))
2779 val |= (I40E_QUEUE_END_OF_LIST
2780 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2781
2782 wr32(hw, I40E_QINT_TQCTL(qp), val);
2783 qp++;
2784 }
2785 }
2786
2787 i40e_flush(hw);
2788 }
2789
2790 /**
2791 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2792 * @hw: ptr to the hardware info
2793 **/
i40e_enable_misc_int_causes(struct i40e_hw * hw)2794 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2795 {
2796 u32 val;
2797
2798 /* clear things first */
2799 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2800 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2801
2802 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2803 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2804 I40E_PFINT_ICR0_ENA_GRST_MASK |
2805 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2806 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2807 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2808 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2809 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2810 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2811
2812 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2813
2814 /* SW_ITR_IDX = 0, but don't change INTENA */
2815 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2816 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2817
2818 /* OTHER_ITR_IDX = 0 */
2819 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2820 }
2821
2822 /**
2823 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2824 * @vsi: the VSI being configured
2825 **/
i40e_configure_msi_and_legacy(struct i40e_vsi * vsi)2826 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2827 {
2828 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2829 struct i40e_pf *pf = vsi->back;
2830 struct i40e_hw *hw = &pf->hw;
2831 u32 val;
2832
2833 /* set the ITR configuration */
2834 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2835 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2836 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2837 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2838 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2839 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2840
2841 i40e_enable_misc_int_causes(hw);
2842
2843 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2844 wr32(hw, I40E_PFINT_LNKLST0, 0);
2845
2846 /* Associate the queue pair to the vector and enable the queue int */
2847 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2848 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2849 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2850
2851 wr32(hw, I40E_QINT_RQCTL(0), val);
2852
2853 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2854 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2855 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2856
2857 wr32(hw, I40E_QINT_TQCTL(0), val);
2858 i40e_flush(hw);
2859 }
2860
2861 /**
2862 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2863 * @pf: board private structure
2864 **/
i40e_irq_dynamic_disable_icr0(struct i40e_pf * pf)2865 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2866 {
2867 struct i40e_hw *hw = &pf->hw;
2868
2869 wr32(hw, I40E_PFINT_DYN_CTL0,
2870 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2871 i40e_flush(hw);
2872 }
2873
2874 /**
2875 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2876 * @pf: board private structure
2877 **/
i40e_irq_dynamic_enable_icr0(struct i40e_pf * pf)2878 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2879 {
2880 struct i40e_hw *hw = &pf->hw;
2881 u32 val;
2882
2883 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2884 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2885 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2886
2887 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2888 i40e_flush(hw);
2889 }
2890
2891 /**
2892 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2893 * @vsi: pointer to a vsi
2894 * @vector: enable a particular Hw Interrupt vector
2895 **/
i40e_irq_dynamic_enable(struct i40e_vsi * vsi,int vector)2896 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2897 {
2898 struct i40e_pf *pf = vsi->back;
2899 struct i40e_hw *hw = &pf->hw;
2900 u32 val;
2901
2902 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2903 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2904 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2905 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2906 /* skip the flush */
2907 }
2908
2909 /**
2910 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2911 * @vsi: pointer to a vsi
2912 * @vector: enable a particular Hw Interrupt vector
2913 **/
i40e_irq_dynamic_disable(struct i40e_vsi * vsi,int vector)2914 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2915 {
2916 struct i40e_pf *pf = vsi->back;
2917 struct i40e_hw *hw = &pf->hw;
2918 u32 val;
2919
2920 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2921 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2922 i40e_flush(hw);
2923 }
2924
2925 /**
2926 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2927 * @irq: interrupt number
2928 * @data: pointer to a q_vector
2929 **/
i40e_msix_clean_rings(int irq,void * data)2930 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2931 {
2932 struct i40e_q_vector *q_vector = data;
2933
2934 if (!q_vector->tx.ring && !q_vector->rx.ring)
2935 return IRQ_HANDLED;
2936
2937 napi_schedule(&q_vector->napi);
2938
2939 return IRQ_HANDLED;
2940 }
2941
2942 /**
2943 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2944 * @vsi: the VSI being configured
2945 * @basename: name for the vector
2946 *
2947 * Allocates MSI-X vectors and requests interrupts from the kernel.
2948 **/
i40e_vsi_request_irq_msix(struct i40e_vsi * vsi,char * basename)2949 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2950 {
2951 int q_vectors = vsi->num_q_vectors;
2952 struct i40e_pf *pf = vsi->back;
2953 int base = vsi->base_vector;
2954 int rx_int_idx = 0;
2955 int tx_int_idx = 0;
2956 int vector, err;
2957
2958 for (vector = 0; vector < q_vectors; vector++) {
2959 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2960
2961 if (q_vector->tx.ring && q_vector->rx.ring) {
2962 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2963 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2964 tx_int_idx++;
2965 } else if (q_vector->rx.ring) {
2966 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2967 "%s-%s-%d", basename, "rx", rx_int_idx++);
2968 } else if (q_vector->tx.ring) {
2969 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2970 "%s-%s-%d", basename, "tx", tx_int_idx++);
2971 } else {
2972 /* skip this unused q_vector */
2973 continue;
2974 }
2975 err = request_irq(pf->msix_entries[base + vector].vector,
2976 vsi->irq_handler,
2977 0,
2978 q_vector->name,
2979 q_vector);
2980 if (err) {
2981 dev_info(&pf->pdev->dev,
2982 "%s: request_irq failed, error: %d\n",
2983 __func__, err);
2984 goto free_queue_irqs;
2985 }
2986 /* assign the mask for this irq */
2987 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2988 &q_vector->affinity_mask);
2989 }
2990
2991 vsi->irqs_ready = true;
2992 return 0;
2993
2994 free_queue_irqs:
2995 while (vector) {
2996 vector--;
2997 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2998 NULL);
2999 free_irq(pf->msix_entries[base + vector].vector,
3000 &(vsi->q_vectors[vector]));
3001 }
3002 return err;
3003 }
3004
3005 /**
3006 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3007 * @vsi: the VSI being un-configured
3008 **/
i40e_vsi_disable_irq(struct i40e_vsi * vsi)3009 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3010 {
3011 struct i40e_pf *pf = vsi->back;
3012 struct i40e_hw *hw = &pf->hw;
3013 int base = vsi->base_vector;
3014 int i;
3015
3016 for (i = 0; i < vsi->num_queue_pairs; i++) {
3017 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3018 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3019 }
3020
3021 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3022 for (i = vsi->base_vector;
3023 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3024 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3025
3026 i40e_flush(hw);
3027 for (i = 0; i < vsi->num_q_vectors; i++)
3028 synchronize_irq(pf->msix_entries[i + base].vector);
3029 } else {
3030 /* Legacy and MSI mode - this stops all interrupt handling */
3031 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3032 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3033 i40e_flush(hw);
3034 synchronize_irq(pf->pdev->irq);
3035 }
3036 }
3037
3038 /**
3039 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3040 * @vsi: the VSI being configured
3041 **/
i40e_vsi_enable_irq(struct i40e_vsi * vsi)3042 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3043 {
3044 struct i40e_pf *pf = vsi->back;
3045 int i;
3046
3047 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3048 for (i = vsi->base_vector;
3049 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3050 i40e_irq_dynamic_enable(vsi, i);
3051 } else {
3052 i40e_irq_dynamic_enable_icr0(pf);
3053 }
3054
3055 i40e_flush(&pf->hw);
3056 return 0;
3057 }
3058
3059 /**
3060 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3061 * @pf: board private structure
3062 **/
i40e_stop_misc_vector(struct i40e_pf * pf)3063 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3064 {
3065 /* Disable ICR 0 */
3066 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3067 i40e_flush(&pf->hw);
3068 }
3069
3070 /**
3071 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3072 * @irq: interrupt number
3073 * @data: pointer to a q_vector
3074 *
3075 * This is the handler used for all MSI/Legacy interrupts, and deals
3076 * with both queue and non-queue interrupts. This is also used in
3077 * MSIX mode to handle the non-queue interrupts.
3078 **/
i40e_intr(int irq,void * data)3079 static irqreturn_t i40e_intr(int irq, void *data)
3080 {
3081 struct i40e_pf *pf = (struct i40e_pf *)data;
3082 struct i40e_hw *hw = &pf->hw;
3083 irqreturn_t ret = IRQ_NONE;
3084 u32 icr0, icr0_remaining;
3085 u32 val, ena_mask;
3086
3087 icr0 = rd32(hw, I40E_PFINT_ICR0);
3088 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3089
3090 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3091 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3092 goto enable_intr;
3093
3094 /* if interrupt but no bits showing, must be SWINT */
3095 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3096 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3097 pf->sw_int_count++;
3098
3099 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3100 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3101
3102 /* temporarily disable queue cause for NAPI processing */
3103 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3104 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3105 wr32(hw, I40E_QINT_RQCTL(0), qval);
3106
3107 qval = rd32(hw, I40E_QINT_TQCTL(0));
3108 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3109 wr32(hw, I40E_QINT_TQCTL(0), qval);
3110
3111 if (!test_bit(__I40E_DOWN, &pf->state))
3112 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3113 }
3114
3115 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3116 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3117 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3118 }
3119
3120 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3121 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3122 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3123 }
3124
3125 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3126 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3127 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3128 }
3129
3130 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3131 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3132 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3133 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3134 val = rd32(hw, I40E_GLGEN_RSTAT);
3135 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3136 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3137 if (val == I40E_RESET_CORER) {
3138 pf->corer_count++;
3139 } else if (val == I40E_RESET_GLOBR) {
3140 pf->globr_count++;
3141 } else if (val == I40E_RESET_EMPR) {
3142 pf->empr_count++;
3143 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
3144 }
3145 }
3146
3147 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3148 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3149 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3150 }
3151
3152 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3153 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3154
3155 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3156 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3157 i40e_ptp_tx_hwtstamp(pf);
3158 }
3159 }
3160
3161 /* If a critical error is pending we have no choice but to reset the
3162 * device.
3163 * Report and mask out any remaining unexpected interrupts.
3164 */
3165 icr0_remaining = icr0 & ena_mask;
3166 if (icr0_remaining) {
3167 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3168 icr0_remaining);
3169 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3170 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3171 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3172 dev_info(&pf->pdev->dev, "device will be reset\n");
3173 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3174 i40e_service_event_schedule(pf);
3175 }
3176 ena_mask &= ~icr0_remaining;
3177 }
3178 ret = IRQ_HANDLED;
3179
3180 enable_intr:
3181 /* re-enable interrupt causes */
3182 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3183 if (!test_bit(__I40E_DOWN, &pf->state)) {
3184 i40e_service_event_schedule(pf);
3185 i40e_irq_dynamic_enable_icr0(pf);
3186 }
3187
3188 return ret;
3189 }
3190
3191 /**
3192 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3193 * @tx_ring: tx ring to clean
3194 * @budget: how many cleans we're allowed
3195 *
3196 * Returns true if there's any budget left (e.g. the clean is finished)
3197 **/
i40e_clean_fdir_tx_irq(struct i40e_ring * tx_ring,int budget)3198 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3199 {
3200 struct i40e_vsi *vsi = tx_ring->vsi;
3201 u16 i = tx_ring->next_to_clean;
3202 struct i40e_tx_buffer *tx_buf;
3203 struct i40e_tx_desc *tx_desc;
3204
3205 tx_buf = &tx_ring->tx_bi[i];
3206 tx_desc = I40E_TX_DESC(tx_ring, i);
3207 i -= tx_ring->count;
3208
3209 do {
3210 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3211
3212 /* if next_to_watch is not set then there is no work pending */
3213 if (!eop_desc)
3214 break;
3215
3216 /* prevent any other reads prior to eop_desc */
3217 smp_rmb();
3218
3219 /* if the descriptor isn't done, no work yet to do */
3220 if (!(eop_desc->cmd_type_offset_bsz &
3221 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3222 break;
3223
3224 /* clear next_to_watch to prevent false hangs */
3225 tx_buf->next_to_watch = NULL;
3226
3227 tx_desc->buffer_addr = 0;
3228 tx_desc->cmd_type_offset_bsz = 0;
3229 /* move past filter desc */
3230 tx_buf++;
3231 tx_desc++;
3232 i++;
3233 if (unlikely(!i)) {
3234 i -= tx_ring->count;
3235 tx_buf = tx_ring->tx_bi;
3236 tx_desc = I40E_TX_DESC(tx_ring, 0);
3237 }
3238 /* unmap skb header data */
3239 dma_unmap_single(tx_ring->dev,
3240 dma_unmap_addr(tx_buf, dma),
3241 dma_unmap_len(tx_buf, len),
3242 DMA_TO_DEVICE);
3243 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3244 kfree(tx_buf->raw_buf);
3245
3246 tx_buf->raw_buf = NULL;
3247 tx_buf->tx_flags = 0;
3248 tx_buf->next_to_watch = NULL;
3249 dma_unmap_len_set(tx_buf, len, 0);
3250 tx_desc->buffer_addr = 0;
3251 tx_desc->cmd_type_offset_bsz = 0;
3252
3253 /* move us past the eop_desc for start of next FD desc */
3254 tx_buf++;
3255 tx_desc++;
3256 i++;
3257 if (unlikely(!i)) {
3258 i -= tx_ring->count;
3259 tx_buf = tx_ring->tx_bi;
3260 tx_desc = I40E_TX_DESC(tx_ring, 0);
3261 }
3262
3263 /* update budget accounting */
3264 budget--;
3265 } while (likely(budget));
3266
3267 i += tx_ring->count;
3268 tx_ring->next_to_clean = i;
3269
3270 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3271 i40e_irq_dynamic_enable(vsi,
3272 tx_ring->q_vector->v_idx + vsi->base_vector);
3273 }
3274 return budget > 0;
3275 }
3276
3277 /**
3278 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3279 * @irq: interrupt number
3280 * @data: pointer to a q_vector
3281 **/
i40e_fdir_clean_ring(int irq,void * data)3282 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3283 {
3284 struct i40e_q_vector *q_vector = data;
3285 struct i40e_vsi *vsi;
3286
3287 if (!q_vector->tx.ring)
3288 return IRQ_HANDLED;
3289
3290 vsi = q_vector->tx.ring->vsi;
3291 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3292
3293 return IRQ_HANDLED;
3294 }
3295
3296 /**
3297 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3298 * @vsi: the VSI being configured
3299 * @v_idx: vector index
3300 * @qp_idx: queue pair index
3301 **/
map_vector_to_qp(struct i40e_vsi * vsi,int v_idx,int qp_idx)3302 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3303 {
3304 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3305 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3306 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3307
3308 tx_ring->q_vector = q_vector;
3309 tx_ring->next = q_vector->tx.ring;
3310 q_vector->tx.ring = tx_ring;
3311 q_vector->tx.count++;
3312
3313 rx_ring->q_vector = q_vector;
3314 rx_ring->next = q_vector->rx.ring;
3315 q_vector->rx.ring = rx_ring;
3316 q_vector->rx.count++;
3317 }
3318
3319 /**
3320 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3321 * @vsi: the VSI being configured
3322 *
3323 * This function maps descriptor rings to the queue-specific vectors
3324 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3325 * one vector per queue pair, but on a constrained vector budget, we
3326 * group the queue pairs as "efficiently" as possible.
3327 **/
i40e_vsi_map_rings_to_vectors(struct i40e_vsi * vsi)3328 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3329 {
3330 int qp_remaining = vsi->num_queue_pairs;
3331 int q_vectors = vsi->num_q_vectors;
3332 int num_ringpairs;
3333 int v_start = 0;
3334 int qp_idx = 0;
3335
3336 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3337 * group them so there are multiple queues per vector.
3338 * It is also important to go through all the vectors available to be
3339 * sure that if we don't use all the vectors, that the remaining vectors
3340 * are cleared. This is especially important when decreasing the
3341 * number of queues in use.
3342 */
3343 for (; v_start < q_vectors; v_start++) {
3344 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3345
3346 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3347
3348 q_vector->num_ringpairs = num_ringpairs;
3349
3350 q_vector->rx.count = 0;
3351 q_vector->tx.count = 0;
3352 q_vector->rx.ring = NULL;
3353 q_vector->tx.ring = NULL;
3354
3355 while (num_ringpairs--) {
3356 map_vector_to_qp(vsi, v_start, qp_idx);
3357 qp_idx++;
3358 qp_remaining--;
3359 }
3360 }
3361 }
3362
3363 /**
3364 * i40e_vsi_request_irq - Request IRQ from the OS
3365 * @vsi: the VSI being configured
3366 * @basename: name for the vector
3367 **/
i40e_vsi_request_irq(struct i40e_vsi * vsi,char * basename)3368 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3369 {
3370 struct i40e_pf *pf = vsi->back;
3371 int err;
3372
3373 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3374 err = i40e_vsi_request_irq_msix(vsi, basename);
3375 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3376 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3377 pf->misc_int_name, pf);
3378 else
3379 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3380 pf->misc_int_name, pf);
3381
3382 if (err)
3383 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3384
3385 return err;
3386 }
3387
3388 #ifdef CONFIG_NET_POLL_CONTROLLER
3389 /**
3390 * i40e_netpoll - A Polling 'interrupt'handler
3391 * @netdev: network interface device structure
3392 *
3393 * This is used by netconsole to send skbs without having to re-enable
3394 * interrupts. It's not called while the normal interrupt routine is executing.
3395 **/
3396 #ifdef I40E_FCOE
i40e_netpoll(struct net_device * netdev)3397 void i40e_netpoll(struct net_device *netdev)
3398 #else
3399 static void i40e_netpoll(struct net_device *netdev)
3400 #endif
3401 {
3402 struct i40e_netdev_priv *np = netdev_priv(netdev);
3403 struct i40e_vsi *vsi = np->vsi;
3404 struct i40e_pf *pf = vsi->back;
3405 int i;
3406
3407 /* if interface is down do nothing */
3408 if (test_bit(__I40E_DOWN, &vsi->state))
3409 return;
3410
3411 pf->flags |= I40E_FLAG_IN_NETPOLL;
3412 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3413 for (i = 0; i < vsi->num_q_vectors; i++)
3414 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3415 } else {
3416 i40e_intr(pf->pdev->irq, netdev);
3417 }
3418 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3419 }
3420 #endif
3421
3422 /**
3423 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3424 * @pf: the PF being configured
3425 * @pf_q: the PF queue
3426 * @enable: enable or disable state of the queue
3427 *
3428 * This routine will wait for the given Tx queue of the PF to reach the
3429 * enabled or disabled state.
3430 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3431 * multiple retries; else will return 0 in case of success.
3432 **/
i40e_pf_txq_wait(struct i40e_pf * pf,int pf_q,bool enable)3433 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3434 {
3435 int i;
3436 u32 tx_reg;
3437
3438 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3439 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3440 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3441 break;
3442
3443 udelay(10);
3444 }
3445 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3446 return -ETIMEDOUT;
3447
3448 return 0;
3449 }
3450
3451 /**
3452 * i40e_vsi_control_tx - Start or stop a VSI's rings
3453 * @vsi: the VSI being configured
3454 * @enable: start or stop the rings
3455 **/
i40e_vsi_control_tx(struct i40e_vsi * vsi,bool enable)3456 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3457 {
3458 struct i40e_pf *pf = vsi->back;
3459 struct i40e_hw *hw = &pf->hw;
3460 int i, j, pf_q, ret = 0;
3461 u32 tx_reg;
3462
3463 pf_q = vsi->base_queue;
3464 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3465
3466 /* warn the TX unit of coming changes */
3467 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3468 if (!enable)
3469 udelay(10);
3470
3471 for (j = 0; j < 50; j++) {
3472 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3473 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3474 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3475 break;
3476 usleep_range(1000, 2000);
3477 }
3478 /* Skip if the queue is already in the requested state */
3479 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3480 continue;
3481
3482 /* turn on/off the queue */
3483 if (enable) {
3484 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3485 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3486 } else {
3487 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3488 }
3489
3490 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3491
3492 /* wait for the change to finish */
3493 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3494 if (ret) {
3495 dev_info(&pf->pdev->dev,
3496 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3497 __func__, vsi->seid, pf_q,
3498 (enable ? "en" : "dis"));
3499 break;
3500 }
3501 }
3502
3503 if (hw->revision_id == 0)
3504 mdelay(50);
3505 return ret;
3506 }
3507
3508 /**
3509 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3510 * @pf: the PF being configured
3511 * @pf_q: the PF queue
3512 * @enable: enable or disable state of the queue
3513 *
3514 * This routine will wait for the given Rx queue of the PF to reach the
3515 * enabled or disabled state.
3516 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3517 * multiple retries; else will return 0 in case of success.
3518 **/
i40e_pf_rxq_wait(struct i40e_pf * pf,int pf_q,bool enable)3519 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3520 {
3521 int i;
3522 u32 rx_reg;
3523
3524 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3525 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3526 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3527 break;
3528
3529 udelay(10);
3530 }
3531 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3532 return -ETIMEDOUT;
3533
3534 return 0;
3535 }
3536
3537 /**
3538 * i40e_vsi_control_rx - Start or stop a VSI's rings
3539 * @vsi: the VSI being configured
3540 * @enable: start or stop the rings
3541 **/
i40e_vsi_control_rx(struct i40e_vsi * vsi,bool enable)3542 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3543 {
3544 struct i40e_pf *pf = vsi->back;
3545 struct i40e_hw *hw = &pf->hw;
3546 int i, j, pf_q, ret = 0;
3547 u32 rx_reg;
3548
3549 pf_q = vsi->base_queue;
3550 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3551 for (j = 0; j < 50; j++) {
3552 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3553 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3554 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3555 break;
3556 usleep_range(1000, 2000);
3557 }
3558
3559 /* Skip if the queue is already in the requested state */
3560 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3561 continue;
3562
3563 /* turn on/off the queue */
3564 if (enable)
3565 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3566 else
3567 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3568 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3569
3570 /* wait for the change to finish */
3571 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3572 if (ret) {
3573 dev_info(&pf->pdev->dev,
3574 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3575 __func__, vsi->seid, pf_q,
3576 (enable ? "en" : "dis"));
3577 break;
3578 }
3579 }
3580
3581 return ret;
3582 }
3583
3584 /**
3585 * i40e_vsi_control_rings - Start or stop a VSI's rings
3586 * @vsi: the VSI being configured
3587 * @enable: start or stop the rings
3588 **/
i40e_vsi_control_rings(struct i40e_vsi * vsi,bool request)3589 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3590 {
3591 int ret = 0;
3592
3593 /* do rx first for enable and last for disable */
3594 if (request) {
3595 ret = i40e_vsi_control_rx(vsi, request);
3596 if (ret)
3597 return ret;
3598 ret = i40e_vsi_control_tx(vsi, request);
3599 } else {
3600 /* Ignore return value, we need to shutdown whatever we can */
3601 i40e_vsi_control_tx(vsi, request);
3602 i40e_vsi_control_rx(vsi, request);
3603 }
3604
3605 return ret;
3606 }
3607
3608 /**
3609 * i40e_vsi_free_irq - Free the irq association with the OS
3610 * @vsi: the VSI being configured
3611 **/
i40e_vsi_free_irq(struct i40e_vsi * vsi)3612 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3613 {
3614 struct i40e_pf *pf = vsi->back;
3615 struct i40e_hw *hw = &pf->hw;
3616 int base = vsi->base_vector;
3617 u32 val, qp;
3618 int i;
3619
3620 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3621 if (!vsi->q_vectors)
3622 return;
3623
3624 if (!vsi->irqs_ready)
3625 return;
3626
3627 vsi->irqs_ready = false;
3628 for (i = 0; i < vsi->num_q_vectors; i++) {
3629 u16 vector = i + base;
3630
3631 /* free only the irqs that were actually requested */
3632 if (!vsi->q_vectors[i] ||
3633 !vsi->q_vectors[i]->num_ringpairs)
3634 continue;
3635
3636 /* clear the affinity_mask in the IRQ descriptor */
3637 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3638 NULL);
3639 free_irq(pf->msix_entries[vector].vector,
3640 vsi->q_vectors[i]);
3641
3642 /* Tear down the interrupt queue link list
3643 *
3644 * We know that they come in pairs and always
3645 * the Rx first, then the Tx. To clear the
3646 * link list, stick the EOL value into the
3647 * next_q field of the registers.
3648 */
3649 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3650 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3651 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3652 val |= I40E_QUEUE_END_OF_LIST
3653 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3654 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3655
3656 while (qp != I40E_QUEUE_END_OF_LIST) {
3657 u32 next;
3658
3659 val = rd32(hw, I40E_QINT_RQCTL(qp));
3660
3661 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3662 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3663 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3664 I40E_QINT_RQCTL_INTEVENT_MASK);
3665
3666 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3667 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3668
3669 wr32(hw, I40E_QINT_RQCTL(qp), val);
3670
3671 val = rd32(hw, I40E_QINT_TQCTL(qp));
3672
3673 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3674 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3675
3676 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3677 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3678 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3679 I40E_QINT_TQCTL_INTEVENT_MASK);
3680
3681 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3682 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3683
3684 wr32(hw, I40E_QINT_TQCTL(qp), val);
3685 qp = next;
3686 }
3687 }
3688 } else {
3689 free_irq(pf->pdev->irq, pf);
3690
3691 val = rd32(hw, I40E_PFINT_LNKLST0);
3692 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3693 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3694 val |= I40E_QUEUE_END_OF_LIST
3695 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3696 wr32(hw, I40E_PFINT_LNKLST0, val);
3697
3698 val = rd32(hw, I40E_QINT_RQCTL(qp));
3699 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3700 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3701 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3702 I40E_QINT_RQCTL_INTEVENT_MASK);
3703
3704 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3705 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3706
3707 wr32(hw, I40E_QINT_RQCTL(qp), val);
3708
3709 val = rd32(hw, I40E_QINT_TQCTL(qp));
3710
3711 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3712 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3713 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3714 I40E_QINT_TQCTL_INTEVENT_MASK);
3715
3716 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3717 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3718
3719 wr32(hw, I40E_QINT_TQCTL(qp), val);
3720 }
3721 }
3722
3723 /**
3724 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3725 * @vsi: the VSI being configured
3726 * @v_idx: Index of vector to be freed
3727 *
3728 * This function frees the memory allocated to the q_vector. In addition if
3729 * NAPI is enabled it will delete any references to the NAPI struct prior
3730 * to freeing the q_vector.
3731 **/
i40e_free_q_vector(struct i40e_vsi * vsi,int v_idx)3732 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3733 {
3734 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3735 struct i40e_ring *ring;
3736
3737 if (!q_vector)
3738 return;
3739
3740 /* disassociate q_vector from rings */
3741 i40e_for_each_ring(ring, q_vector->tx)
3742 ring->q_vector = NULL;
3743
3744 i40e_for_each_ring(ring, q_vector->rx)
3745 ring->q_vector = NULL;
3746
3747 /* only VSI w/ an associated netdev is set up w/ NAPI */
3748 if (vsi->netdev)
3749 netif_napi_del(&q_vector->napi);
3750
3751 vsi->q_vectors[v_idx] = NULL;
3752
3753 kfree_rcu(q_vector, rcu);
3754 }
3755
3756 /**
3757 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3758 * @vsi: the VSI being un-configured
3759 *
3760 * This frees the memory allocated to the q_vectors and
3761 * deletes references to the NAPI struct.
3762 **/
i40e_vsi_free_q_vectors(struct i40e_vsi * vsi)3763 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3764 {
3765 int v_idx;
3766
3767 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3768 i40e_free_q_vector(vsi, v_idx);
3769 }
3770
3771 /**
3772 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3773 * @pf: board private structure
3774 **/
i40e_reset_interrupt_capability(struct i40e_pf * pf)3775 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3776 {
3777 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3778 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3779 pci_disable_msix(pf->pdev);
3780 kfree(pf->msix_entries);
3781 pf->msix_entries = NULL;
3782 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3783 pci_disable_msi(pf->pdev);
3784 }
3785 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3786 }
3787
3788 /**
3789 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3790 * @pf: board private structure
3791 *
3792 * We go through and clear interrupt specific resources and reset the structure
3793 * to pre-load conditions
3794 **/
i40e_clear_interrupt_scheme(struct i40e_pf * pf)3795 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3796 {
3797 int i;
3798
3799 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3800 for (i = 0; i < pf->num_alloc_vsi; i++)
3801 if (pf->vsi[i])
3802 i40e_vsi_free_q_vectors(pf->vsi[i]);
3803 i40e_reset_interrupt_capability(pf);
3804 }
3805
3806 /**
3807 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3808 * @vsi: the VSI being configured
3809 **/
i40e_napi_enable_all(struct i40e_vsi * vsi)3810 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3811 {
3812 int q_idx;
3813
3814 if (!vsi->netdev)
3815 return;
3816
3817 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
3818 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
3819
3820 if (q_vector->rx.ring || q_vector->tx.ring)
3821 napi_enable(&q_vector->napi);
3822 }
3823 }
3824
3825 /**
3826 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3827 * @vsi: the VSI being configured
3828 **/
i40e_napi_disable_all(struct i40e_vsi * vsi)3829 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3830 {
3831 int q_idx;
3832
3833 if (!vsi->netdev)
3834 return;
3835
3836 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
3837 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
3838
3839 if (q_vector->rx.ring || q_vector->tx.ring)
3840 napi_disable(&q_vector->napi);
3841 }
3842 }
3843
3844 /**
3845 * i40e_vsi_close - Shut down a VSI
3846 * @vsi: the vsi to be quelled
3847 **/
i40e_vsi_close(struct i40e_vsi * vsi)3848 static void i40e_vsi_close(struct i40e_vsi *vsi)
3849 {
3850 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3851 i40e_down(vsi);
3852 i40e_vsi_free_irq(vsi);
3853 i40e_vsi_free_tx_resources(vsi);
3854 i40e_vsi_free_rx_resources(vsi);
3855 }
3856
3857 /**
3858 * i40e_quiesce_vsi - Pause a given VSI
3859 * @vsi: the VSI being paused
3860 **/
i40e_quiesce_vsi(struct i40e_vsi * vsi)3861 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3862 {
3863 if (test_bit(__I40E_DOWN, &vsi->state))
3864 return;
3865
3866 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3867 if (vsi->netdev && netif_running(vsi->netdev)) {
3868 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3869 } else {
3870 i40e_vsi_close(vsi);
3871 }
3872 }
3873
3874 /**
3875 * i40e_unquiesce_vsi - Resume a given VSI
3876 * @vsi: the VSI being resumed
3877 **/
i40e_unquiesce_vsi(struct i40e_vsi * vsi)3878 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3879 {
3880 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3881 return;
3882
3883 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3884 if (vsi->netdev && netif_running(vsi->netdev))
3885 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3886 else
3887 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3888 }
3889
3890 /**
3891 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3892 * @pf: the PF
3893 **/
i40e_pf_quiesce_all_vsi(struct i40e_pf * pf)3894 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3895 {
3896 int v;
3897
3898 for (v = 0; v < pf->num_alloc_vsi; v++) {
3899 if (pf->vsi[v])
3900 i40e_quiesce_vsi(pf->vsi[v]);
3901 }
3902 }
3903
3904 /**
3905 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3906 * @pf: the PF
3907 **/
i40e_pf_unquiesce_all_vsi(struct i40e_pf * pf)3908 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3909 {
3910 int v;
3911
3912 for (v = 0; v < pf->num_alloc_vsi; v++) {
3913 if (pf->vsi[v])
3914 i40e_unquiesce_vsi(pf->vsi[v]);
3915 }
3916 }
3917
3918 /**
3919 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3920 * @dcbcfg: the corresponding DCBx configuration structure
3921 *
3922 * Return the number of TCs from given DCBx configuration
3923 **/
i40e_dcb_get_num_tc(struct i40e_dcbx_config * dcbcfg)3924 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3925 {
3926 u8 num_tc = 0;
3927 int i;
3928
3929 /* Scan the ETS Config Priority Table to find
3930 * traffic class enabled for a given priority
3931 * and use the traffic class index to get the
3932 * number of traffic classes enabled
3933 */
3934 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3935 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3936 num_tc = dcbcfg->etscfg.prioritytable[i];
3937 }
3938
3939 /* Traffic class index starts from zero so
3940 * increment to return the actual count
3941 */
3942 return num_tc + 1;
3943 }
3944
3945 /**
3946 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3947 * @dcbcfg: the corresponding DCBx configuration structure
3948 *
3949 * Query the current DCB configuration and return the number of
3950 * traffic classes enabled from the given DCBX config
3951 **/
i40e_dcb_get_enabled_tc(struct i40e_dcbx_config * dcbcfg)3952 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3953 {
3954 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3955 u8 enabled_tc = 1;
3956 u8 i;
3957
3958 for (i = 0; i < num_tc; i++)
3959 enabled_tc |= 1 << i;
3960
3961 return enabled_tc;
3962 }
3963
3964 /**
3965 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3966 * @pf: PF being queried
3967 *
3968 * Return number of traffic classes enabled for the given PF
3969 **/
i40e_pf_get_num_tc(struct i40e_pf * pf)3970 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3971 {
3972 struct i40e_hw *hw = &pf->hw;
3973 u8 i, enabled_tc;
3974 u8 num_tc = 0;
3975 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3976
3977 /* If DCB is not enabled then always in single TC */
3978 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3979 return 1;
3980
3981 /* MFP mode return count of enabled TCs for this PF */
3982 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3983 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3984 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3985 if (enabled_tc & (1 << i))
3986 num_tc++;
3987 }
3988 return num_tc;
3989 }
3990
3991 /* SFP mode will be enabled for all TCs on port */
3992 return i40e_dcb_get_num_tc(dcbcfg);
3993 }
3994
3995 /**
3996 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3997 * @pf: PF being queried
3998 *
3999 * Return a bitmap for first enabled traffic class for this PF.
4000 **/
i40e_pf_get_default_tc(struct i40e_pf * pf)4001 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4002 {
4003 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4004 u8 i = 0;
4005
4006 if (!enabled_tc)
4007 return 0x1; /* TC0 */
4008
4009 /* Find the first enabled TC */
4010 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4011 if (enabled_tc & (1 << i))
4012 break;
4013 }
4014
4015 return 1 << i;
4016 }
4017
4018 /**
4019 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4020 * @pf: PF being queried
4021 *
4022 * Return a bitmap for enabled traffic classes for this PF.
4023 **/
i40e_pf_get_tc_map(struct i40e_pf * pf)4024 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4025 {
4026 /* If DCB is not enabled for this PF then just return default TC */
4027 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4028 return i40e_pf_get_default_tc(pf);
4029
4030 /* MFP mode will have enabled TCs set by FW */
4031 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4032 return pf->hw.func_caps.enabled_tcmap;
4033
4034 /* SFP mode we want PF to be enabled for all TCs */
4035 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4036 }
4037
4038 /**
4039 * i40e_vsi_get_bw_info - Query VSI BW Information
4040 * @vsi: the VSI being queried
4041 *
4042 * Returns 0 on success, negative value on failure
4043 **/
i40e_vsi_get_bw_info(struct i40e_vsi * vsi)4044 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4045 {
4046 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4047 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4048 struct i40e_pf *pf = vsi->back;
4049 struct i40e_hw *hw = &pf->hw;
4050 i40e_status aq_ret;
4051 u32 tc_bw_max;
4052 int i;
4053
4054 /* Get the VSI level BW configuration */
4055 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4056 if (aq_ret) {
4057 dev_info(&pf->pdev->dev,
4058 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4059 aq_ret, pf->hw.aq.asq_last_status);
4060 return -EINVAL;
4061 }
4062
4063 /* Get the VSI level BW configuration per TC */
4064 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4065 NULL);
4066 if (aq_ret) {
4067 dev_info(&pf->pdev->dev,
4068 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4069 aq_ret, pf->hw.aq.asq_last_status);
4070 return -EINVAL;
4071 }
4072
4073 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4074 dev_info(&pf->pdev->dev,
4075 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4076 bw_config.tc_valid_bits,
4077 bw_ets_config.tc_valid_bits);
4078 /* Still continuing */
4079 }
4080
4081 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4082 vsi->bw_max_quanta = bw_config.max_bw;
4083 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4084 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4085 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4086 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4087 vsi->bw_ets_limit_credits[i] =
4088 le16_to_cpu(bw_ets_config.credits[i]);
4089 /* 3 bits out of 4 for each TC */
4090 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4091 }
4092
4093 return 0;
4094 }
4095
4096 /**
4097 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4098 * @vsi: the VSI being configured
4099 * @enabled_tc: TC bitmap
4100 * @bw_credits: BW shared credits per TC
4101 *
4102 * Returns 0 on success, negative value on failure
4103 **/
i40e_vsi_configure_bw_alloc(struct i40e_vsi * vsi,u8 enabled_tc,u8 * bw_share)4104 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4105 u8 *bw_share)
4106 {
4107 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4108 i40e_status aq_ret;
4109 int i;
4110
4111 bw_data.tc_valid_bits = enabled_tc;
4112 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4113 bw_data.tc_bw_credits[i] = bw_share[i];
4114
4115 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4116 NULL);
4117 if (aq_ret) {
4118 dev_info(&vsi->back->pdev->dev,
4119 "AQ command Config VSI BW allocation per TC failed = %d\n",
4120 vsi->back->hw.aq.asq_last_status);
4121 return -EINVAL;
4122 }
4123
4124 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4125 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4126
4127 return 0;
4128 }
4129
4130 /**
4131 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4132 * @vsi: the VSI being configured
4133 * @enabled_tc: TC map to be enabled
4134 *
4135 **/
i40e_vsi_config_netdev_tc(struct i40e_vsi * vsi,u8 enabled_tc)4136 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4137 {
4138 struct net_device *netdev = vsi->netdev;
4139 struct i40e_pf *pf = vsi->back;
4140 struct i40e_hw *hw = &pf->hw;
4141 u8 netdev_tc = 0;
4142 int i;
4143 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4144
4145 if (!netdev)
4146 return;
4147
4148 if (!enabled_tc) {
4149 netdev_reset_tc(netdev);
4150 return;
4151 }
4152
4153 /* Set up actual enabled TCs on the VSI */
4154 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4155 return;
4156
4157 /* set per TC queues for the VSI */
4158 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4159 /* Only set TC queues for enabled tcs
4160 *
4161 * e.g. For a VSI that has TC0 and TC3 enabled the
4162 * enabled_tc bitmap would be 0x00001001; the driver
4163 * will set the numtc for netdev as 2 that will be
4164 * referenced by the netdev layer as TC 0 and 1.
4165 */
4166 if (vsi->tc_config.enabled_tc & (1 << i))
4167 netdev_set_tc_queue(netdev,
4168 vsi->tc_config.tc_info[i].netdev_tc,
4169 vsi->tc_config.tc_info[i].qcount,
4170 vsi->tc_config.tc_info[i].qoffset);
4171 }
4172
4173 /* Assign UP2TC map for the VSI */
4174 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4175 /* Get the actual TC# for the UP */
4176 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4177 /* Get the mapped netdev TC# for the UP */
4178 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4179 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4180 }
4181 }
4182
4183 /**
4184 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4185 * @vsi: the VSI being configured
4186 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4187 **/
i40e_vsi_update_queue_map(struct i40e_vsi * vsi,struct i40e_vsi_context * ctxt)4188 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4189 struct i40e_vsi_context *ctxt)
4190 {
4191 /* copy just the sections touched not the entire info
4192 * since not all sections are valid as returned by
4193 * update vsi params
4194 */
4195 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4196 memcpy(&vsi->info.queue_mapping,
4197 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4198 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4199 sizeof(vsi->info.tc_mapping));
4200 }
4201
4202 /**
4203 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4204 * @vsi: VSI to be configured
4205 * @enabled_tc: TC bitmap
4206 *
4207 * This configures a particular VSI for TCs that are mapped to the
4208 * given TC bitmap. It uses default bandwidth share for TCs across
4209 * VSIs to configure TC for a particular VSI.
4210 *
4211 * NOTE:
4212 * It is expected that the VSI queues have been quisced before calling
4213 * this function.
4214 **/
i40e_vsi_config_tc(struct i40e_vsi * vsi,u8 enabled_tc)4215 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4216 {
4217 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4218 struct i40e_vsi_context ctxt;
4219 int ret = 0;
4220 int i;
4221
4222 /* Check if enabled_tc is same as existing or new TCs */
4223 if (vsi->tc_config.enabled_tc == enabled_tc)
4224 return ret;
4225
4226 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4227 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4228 if (enabled_tc & (1 << i))
4229 bw_share[i] = 1;
4230 }
4231
4232 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4233 if (ret) {
4234 dev_info(&vsi->back->pdev->dev,
4235 "Failed configuring TC map %d for VSI %d\n",
4236 enabled_tc, vsi->seid);
4237 goto out;
4238 }
4239
4240 /* Update Queue Pairs Mapping for currently enabled UPs */
4241 ctxt.seid = vsi->seid;
4242 ctxt.pf_num = vsi->back->hw.pf_id;
4243 ctxt.vf_num = 0;
4244 ctxt.uplink_seid = vsi->uplink_seid;
4245 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4246 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4247
4248 /* Update the VSI after updating the VSI queue-mapping information */
4249 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4250 if (ret) {
4251 dev_info(&vsi->back->pdev->dev,
4252 "update vsi failed, aq_err=%d\n",
4253 vsi->back->hw.aq.asq_last_status);
4254 goto out;
4255 }
4256 /* update the local VSI info with updated queue map */
4257 i40e_vsi_update_queue_map(vsi, &ctxt);
4258 vsi->info.valid_sections = 0;
4259
4260 /* Update current VSI BW information */
4261 ret = i40e_vsi_get_bw_info(vsi);
4262 if (ret) {
4263 dev_info(&vsi->back->pdev->dev,
4264 "Failed updating vsi bw info, aq_err=%d\n",
4265 vsi->back->hw.aq.asq_last_status);
4266 goto out;
4267 }
4268
4269 /* Update the netdev TC setup */
4270 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4271 out:
4272 return ret;
4273 }
4274
4275 /**
4276 * i40e_veb_config_tc - Configure TCs for given VEB
4277 * @veb: given VEB
4278 * @enabled_tc: TC bitmap
4279 *
4280 * Configures given TC bitmap for VEB (switching) element
4281 **/
i40e_veb_config_tc(struct i40e_veb * veb,u8 enabled_tc)4282 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4283 {
4284 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4285 struct i40e_pf *pf = veb->pf;
4286 int ret = 0;
4287 int i;
4288
4289 /* No TCs or already enabled TCs just return */
4290 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4291 return ret;
4292
4293 bw_data.tc_valid_bits = enabled_tc;
4294 /* bw_data.absolute_credits is not set (relative) */
4295
4296 /* Enable ETS TCs with equal BW Share for now */
4297 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4298 if (enabled_tc & (1 << i))
4299 bw_data.tc_bw_share_credits[i] = 1;
4300 }
4301
4302 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4303 &bw_data, NULL);
4304 if (ret) {
4305 dev_info(&pf->pdev->dev,
4306 "veb bw config failed, aq_err=%d\n",
4307 pf->hw.aq.asq_last_status);
4308 goto out;
4309 }
4310
4311 /* Update the BW information */
4312 ret = i40e_veb_get_bw_info(veb);
4313 if (ret) {
4314 dev_info(&pf->pdev->dev,
4315 "Failed getting veb bw config, aq_err=%d\n",
4316 pf->hw.aq.asq_last_status);
4317 }
4318
4319 out:
4320 return ret;
4321 }
4322
4323 #ifdef CONFIG_I40E_DCB
4324 /**
4325 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4326 * @pf: PF struct
4327 *
4328 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4329 * the caller would've quiesce all the VSIs before calling
4330 * this function
4331 **/
i40e_dcb_reconfigure(struct i40e_pf * pf)4332 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4333 {
4334 u8 tc_map = 0;
4335 int ret;
4336 u8 v;
4337
4338 /* Enable the TCs available on PF to all VEBs */
4339 tc_map = i40e_pf_get_tc_map(pf);
4340 for (v = 0; v < I40E_MAX_VEB; v++) {
4341 if (!pf->veb[v])
4342 continue;
4343 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4344 if (ret) {
4345 dev_info(&pf->pdev->dev,
4346 "Failed configuring TC for VEB seid=%d\n",
4347 pf->veb[v]->seid);
4348 /* Will try to configure as many components */
4349 }
4350 }
4351
4352 /* Update each VSI */
4353 for (v = 0; v < pf->num_alloc_vsi; v++) {
4354 if (!pf->vsi[v])
4355 continue;
4356
4357 /* - Enable all TCs for the LAN VSI
4358 #ifdef I40E_FCOE
4359 * - For FCoE VSI only enable the TC configured
4360 * as per the APP TLV
4361 #endif
4362 * - For all others keep them at TC0 for now
4363 */
4364 if (v == pf->lan_vsi)
4365 tc_map = i40e_pf_get_tc_map(pf);
4366 else
4367 tc_map = i40e_pf_get_default_tc(pf);
4368 #ifdef I40E_FCOE
4369 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4370 tc_map = i40e_get_fcoe_tc_map(pf);
4371 #endif /* #ifdef I40E_FCOE */
4372
4373 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4374 if (ret) {
4375 dev_info(&pf->pdev->dev,
4376 "Failed configuring TC for VSI seid=%d\n",
4377 pf->vsi[v]->seid);
4378 /* Will try to configure as many components */
4379 } else {
4380 /* Re-configure VSI vectors based on updated TC map */
4381 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4382 if (pf->vsi[v]->netdev)
4383 i40e_dcbnl_set_all(pf->vsi[v]);
4384 }
4385 }
4386 }
4387
4388 /**
4389 * i40e_init_pf_dcb - Initialize DCB configuration
4390 * @pf: PF being configured
4391 *
4392 * Query the current DCB configuration and cache it
4393 * in the hardware structure
4394 **/
i40e_init_pf_dcb(struct i40e_pf * pf)4395 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4396 {
4397 struct i40e_hw *hw = &pf->hw;
4398 int err = 0;
4399
4400 if (pf->hw.func_caps.npar_enable)
4401 goto out;
4402
4403 /* Get the initial DCB configuration */
4404 err = i40e_init_dcb(hw);
4405 if (!err) {
4406 /* Device/Function is not DCBX capable */
4407 if ((!hw->func_caps.dcb) ||
4408 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4409 dev_info(&pf->pdev->dev,
4410 "DCBX offload is not supported or is disabled for this PF.\n");
4411
4412 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4413 goto out;
4414
4415 } else {
4416 /* When status is not DISABLED then DCBX in FW */
4417 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4418 DCB_CAP_DCBX_VER_IEEE;
4419
4420 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4421 /* Enable DCB tagging only when more than one TC */
4422 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4423 pf->flags |= I40E_FLAG_DCB_ENABLED;
4424 }
4425 } else {
4426 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4427 pf->hw.aq.asq_last_status);
4428 }
4429
4430 out:
4431 return err;
4432 }
4433 #endif /* CONFIG_I40E_DCB */
4434 #define SPEED_SIZE 14
4435 #define FC_SIZE 8
4436 /**
4437 * i40e_print_link_message - print link up or down
4438 * @vsi: the VSI for which link needs a message
4439 */
i40e_print_link_message(struct i40e_vsi * vsi,bool isup)4440 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4441 {
4442 char speed[SPEED_SIZE] = "Unknown";
4443 char fc[FC_SIZE] = "RX/TX";
4444
4445 if (!isup) {
4446 netdev_info(vsi->netdev, "NIC Link is Down\n");
4447 return;
4448 }
4449
4450 switch (vsi->back->hw.phy.link_info.link_speed) {
4451 case I40E_LINK_SPEED_40GB:
4452 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4453 break;
4454 case I40E_LINK_SPEED_10GB:
4455 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4456 break;
4457 case I40E_LINK_SPEED_1GB:
4458 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4459 break;
4460 default:
4461 break;
4462 }
4463
4464 switch (vsi->back->hw.fc.current_mode) {
4465 case I40E_FC_FULL:
4466 strlcpy(fc, "RX/TX", FC_SIZE);
4467 break;
4468 case I40E_FC_TX_PAUSE:
4469 strlcpy(fc, "TX", FC_SIZE);
4470 break;
4471 case I40E_FC_RX_PAUSE:
4472 strlcpy(fc, "RX", FC_SIZE);
4473 break;
4474 default:
4475 strlcpy(fc, "None", FC_SIZE);
4476 break;
4477 }
4478
4479 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4480 speed, fc);
4481 }
4482
4483 /**
4484 * i40e_up_complete - Finish the last steps of bringing up a connection
4485 * @vsi: the VSI being configured
4486 **/
i40e_up_complete(struct i40e_vsi * vsi)4487 static int i40e_up_complete(struct i40e_vsi *vsi)
4488 {
4489 struct i40e_pf *pf = vsi->back;
4490 u8 set_fc_aq_fail = 0;
4491 int err;
4492
4493 /* force flow control off */
4494 i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
4495
4496 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4497 i40e_vsi_configure_msix(vsi);
4498 else
4499 i40e_configure_msi_and_legacy(vsi);
4500
4501 /* start rings */
4502 err = i40e_vsi_control_rings(vsi, true);
4503 if (err)
4504 return err;
4505
4506 clear_bit(__I40E_DOWN, &vsi->state);
4507 i40e_napi_enable_all(vsi);
4508 i40e_vsi_enable_irq(vsi);
4509
4510 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4511 (vsi->netdev)) {
4512 i40e_print_link_message(vsi, true);
4513 netif_tx_start_all_queues(vsi->netdev);
4514 netif_carrier_on(vsi->netdev);
4515 } else if (vsi->netdev) {
4516 i40e_print_link_message(vsi, false);
4517 /* need to check for qualified module here*/
4518 if ((pf->hw.phy.link_info.link_info &
4519 I40E_AQ_MEDIA_AVAILABLE) &&
4520 (!(pf->hw.phy.link_info.an_info &
4521 I40E_AQ_QUALIFIED_MODULE)))
4522 netdev_err(vsi->netdev,
4523 "the driver failed to link because an unqualified module was detected.");
4524 }
4525
4526 /* replay FDIR SB filters */
4527 if (vsi->type == I40E_VSI_FDIR) {
4528 /* reset fd counters */
4529 pf->fd_add_err = pf->fd_atr_cnt = 0;
4530 if (pf->fd_tcp_rule > 0) {
4531 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4532 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4533 pf->fd_tcp_rule = 0;
4534 }
4535 i40e_fdir_filter_restore(vsi);
4536 }
4537 i40e_service_event_schedule(pf);
4538
4539 return 0;
4540 }
4541
4542 /**
4543 * i40e_vsi_reinit_locked - Reset the VSI
4544 * @vsi: the VSI being configured
4545 *
4546 * Rebuild the ring structs after some configuration
4547 * has changed, e.g. MTU size.
4548 **/
i40e_vsi_reinit_locked(struct i40e_vsi * vsi)4549 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4550 {
4551 struct i40e_pf *pf = vsi->back;
4552
4553 WARN_ON(in_interrupt());
4554 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4555 usleep_range(1000, 2000);
4556 i40e_down(vsi);
4557
4558 /* Give a VF some time to respond to the reset. The
4559 * two second wait is based upon the watchdog cycle in
4560 * the VF driver.
4561 */
4562 if (vsi->type == I40E_VSI_SRIOV)
4563 msleep(2000);
4564 i40e_up(vsi);
4565 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4566 }
4567
4568 /**
4569 * i40e_up - Bring the connection back up after being down
4570 * @vsi: the VSI being configured
4571 **/
i40e_up(struct i40e_vsi * vsi)4572 int i40e_up(struct i40e_vsi *vsi)
4573 {
4574 int err;
4575
4576 err = i40e_vsi_configure(vsi);
4577 if (!err)
4578 err = i40e_up_complete(vsi);
4579
4580 return err;
4581 }
4582
4583 /**
4584 * i40e_down - Shutdown the connection processing
4585 * @vsi: the VSI being stopped
4586 **/
i40e_down(struct i40e_vsi * vsi)4587 void i40e_down(struct i40e_vsi *vsi)
4588 {
4589 int i;
4590
4591 /* It is assumed that the caller of this function
4592 * sets the vsi->state __I40E_DOWN bit.
4593 */
4594 if (vsi->netdev) {
4595 netif_carrier_off(vsi->netdev);
4596 netif_tx_disable(vsi->netdev);
4597 }
4598 i40e_vsi_disable_irq(vsi);
4599 i40e_vsi_control_rings(vsi, false);
4600 i40e_napi_disable_all(vsi);
4601
4602 for (i = 0; i < vsi->num_queue_pairs; i++) {
4603 i40e_clean_tx_ring(vsi->tx_rings[i]);
4604 i40e_clean_rx_ring(vsi->rx_rings[i]);
4605 }
4606 }
4607
4608 /**
4609 * i40e_setup_tc - configure multiple traffic classes
4610 * @netdev: net device to configure
4611 * @tc: number of traffic classes to enable
4612 **/
4613 #ifdef I40E_FCOE
i40e_setup_tc(struct net_device * netdev,u8 tc)4614 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4615 #else
4616 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4617 #endif
4618 {
4619 struct i40e_netdev_priv *np = netdev_priv(netdev);
4620 struct i40e_vsi *vsi = np->vsi;
4621 struct i40e_pf *pf = vsi->back;
4622 u8 enabled_tc = 0;
4623 int ret = -EINVAL;
4624 int i;
4625
4626 /* Check if DCB enabled to continue */
4627 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4628 netdev_info(netdev, "DCB is not enabled for adapter\n");
4629 goto exit;
4630 }
4631
4632 /* Check if MFP enabled */
4633 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4634 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4635 goto exit;
4636 }
4637
4638 /* Check whether tc count is within enabled limit */
4639 if (tc > i40e_pf_get_num_tc(pf)) {
4640 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4641 goto exit;
4642 }
4643
4644 /* Generate TC map for number of tc requested */
4645 for (i = 0; i < tc; i++)
4646 enabled_tc |= (1 << i);
4647
4648 /* Requesting same TC configuration as already enabled */
4649 if (enabled_tc == vsi->tc_config.enabled_tc)
4650 return 0;
4651
4652 /* Quiesce VSI queues */
4653 i40e_quiesce_vsi(vsi);
4654
4655 /* Configure VSI for enabled TCs */
4656 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4657 if (ret) {
4658 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4659 vsi->seid);
4660 goto exit;
4661 }
4662
4663 /* Unquiesce VSI */
4664 i40e_unquiesce_vsi(vsi);
4665
4666 exit:
4667 return ret;
4668 }
4669
4670 /**
4671 * i40e_open - Called when a network interface is made active
4672 * @netdev: network interface device structure
4673 *
4674 * The open entry point is called when a network interface is made
4675 * active by the system (IFF_UP). At this point all resources needed
4676 * for transmit and receive operations are allocated, the interrupt
4677 * handler is registered with the OS, the netdev watchdog subtask is
4678 * enabled, and the stack is notified that the interface is ready.
4679 *
4680 * Returns 0 on success, negative value on failure
4681 **/
4682 #ifdef I40E_FCOE
i40e_open(struct net_device * netdev)4683 int i40e_open(struct net_device *netdev)
4684 #else
4685 static int i40e_open(struct net_device *netdev)
4686 #endif
4687 {
4688 struct i40e_netdev_priv *np = netdev_priv(netdev);
4689 struct i40e_vsi *vsi = np->vsi;
4690 struct i40e_pf *pf = vsi->back;
4691 int err;
4692
4693 /* disallow open during test or if eeprom is broken */
4694 if (test_bit(__I40E_TESTING, &pf->state) ||
4695 test_bit(__I40E_BAD_EEPROM, &pf->state))
4696 return -EBUSY;
4697
4698 netif_carrier_off(netdev);
4699
4700 err = i40e_vsi_open(vsi);
4701 if (err)
4702 return err;
4703
4704 /* configure global TSO hardware offload settings */
4705 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4706 TCP_FLAG_FIN) >> 16);
4707 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4708 TCP_FLAG_FIN |
4709 TCP_FLAG_CWR) >> 16);
4710 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4711
4712 #ifdef CONFIG_I40E_VXLAN
4713 vxlan_get_rx_port(netdev);
4714 #endif
4715
4716 return 0;
4717 }
4718
4719 /**
4720 * i40e_vsi_open -
4721 * @vsi: the VSI to open
4722 *
4723 * Finish initialization of the VSI.
4724 *
4725 * Returns 0 on success, negative value on failure
4726 **/
i40e_vsi_open(struct i40e_vsi * vsi)4727 int i40e_vsi_open(struct i40e_vsi *vsi)
4728 {
4729 struct i40e_pf *pf = vsi->back;
4730 char int_name[IFNAMSIZ];
4731 int err;
4732
4733 /* allocate descriptors */
4734 err = i40e_vsi_setup_tx_resources(vsi);
4735 if (err)
4736 goto err_setup_tx;
4737 err = i40e_vsi_setup_rx_resources(vsi);
4738 if (err)
4739 goto err_setup_rx;
4740
4741 err = i40e_vsi_configure(vsi);
4742 if (err)
4743 goto err_setup_rx;
4744
4745 if (vsi->netdev) {
4746 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4747 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4748 err = i40e_vsi_request_irq(vsi, int_name);
4749 if (err)
4750 goto err_setup_rx;
4751
4752 /* Notify the stack of the actual queue counts. */
4753 err = netif_set_real_num_tx_queues(vsi->netdev,
4754 vsi->num_queue_pairs);
4755 if (err)
4756 goto err_set_queues;
4757
4758 err = netif_set_real_num_rx_queues(vsi->netdev,
4759 vsi->num_queue_pairs);
4760 if (err)
4761 goto err_set_queues;
4762
4763 } else if (vsi->type == I40E_VSI_FDIR) {
4764 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4765 dev_driver_string(&pf->pdev->dev));
4766 err = i40e_vsi_request_irq(vsi, int_name);
4767 } else {
4768 err = -EINVAL;
4769 goto err_setup_rx;
4770 }
4771
4772 err = i40e_up_complete(vsi);
4773 if (err)
4774 goto err_up_complete;
4775
4776 return 0;
4777
4778 err_up_complete:
4779 i40e_down(vsi);
4780 err_set_queues:
4781 i40e_vsi_free_irq(vsi);
4782 err_setup_rx:
4783 i40e_vsi_free_rx_resources(vsi);
4784 err_setup_tx:
4785 i40e_vsi_free_tx_resources(vsi);
4786 if (vsi == pf->vsi[pf->lan_vsi])
4787 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4788
4789 return err;
4790 }
4791
4792 /**
4793 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4794 * @pf: Pointer to pf
4795 *
4796 * This function destroys the hlist where all the Flow Director
4797 * filters were saved.
4798 **/
i40e_fdir_filter_exit(struct i40e_pf * pf)4799 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4800 {
4801 struct i40e_fdir_filter *filter;
4802 struct hlist_node *node2;
4803
4804 hlist_for_each_entry_safe(filter, node2,
4805 &pf->fdir_filter_list, fdir_node) {
4806 hlist_del(&filter->fdir_node);
4807 kfree(filter);
4808 }
4809 pf->fdir_pf_active_filters = 0;
4810 }
4811
4812 /**
4813 * i40e_close - Disables a network interface
4814 * @netdev: network interface device structure
4815 *
4816 * The close entry point is called when an interface is de-activated
4817 * by the OS. The hardware is still under the driver's control, but
4818 * this netdev interface is disabled.
4819 *
4820 * Returns 0, this is not allowed to fail
4821 **/
4822 #ifdef I40E_FCOE
i40e_close(struct net_device * netdev)4823 int i40e_close(struct net_device *netdev)
4824 #else
4825 static int i40e_close(struct net_device *netdev)
4826 #endif
4827 {
4828 struct i40e_netdev_priv *np = netdev_priv(netdev);
4829 struct i40e_vsi *vsi = np->vsi;
4830
4831 i40e_vsi_close(vsi);
4832
4833 return 0;
4834 }
4835
4836 /**
4837 * i40e_do_reset - Start a PF or Core Reset sequence
4838 * @pf: board private structure
4839 * @reset_flags: which reset is requested
4840 *
4841 * The essential difference in resets is that the PF Reset
4842 * doesn't clear the packet buffers, doesn't reset the PE
4843 * firmware, and doesn't bother the other PFs on the chip.
4844 **/
i40e_do_reset(struct i40e_pf * pf,u32 reset_flags)4845 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4846 {
4847 u32 val;
4848
4849 WARN_ON(in_interrupt());
4850
4851 if (i40e_check_asq_alive(&pf->hw))
4852 i40e_vc_notify_reset(pf);
4853
4854 /* do the biggest reset indicated */
4855 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4856
4857 /* Request a Global Reset
4858 *
4859 * This will start the chip's countdown to the actual full
4860 * chip reset event, and a warning interrupt to be sent
4861 * to all PFs, including the requestor. Our handler
4862 * for the warning interrupt will deal with the shutdown
4863 * and recovery of the switch setup.
4864 */
4865 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4866 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4867 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4868 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4869
4870 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4871
4872 /* Request a Core Reset
4873 *
4874 * Same as Global Reset, except does *not* include the MAC/PHY
4875 */
4876 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4877 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4878 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4879 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4880 i40e_flush(&pf->hw);
4881
4882 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4883
4884 /* Request a Firmware Reset
4885 *
4886 * Same as Global reset, plus restarting the
4887 * embedded firmware engine.
4888 */
4889 /* enable EMP Reset */
4890 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4891 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4892 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4893
4894 /* force the reset */
4895 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4896 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4897 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4898 i40e_flush(&pf->hw);
4899
4900 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4901
4902 /* Request a PF Reset
4903 *
4904 * Resets only the PF-specific registers
4905 *
4906 * This goes directly to the tear-down and rebuild of
4907 * the switch, since we need to do all the recovery as
4908 * for the Core Reset.
4909 */
4910 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4911 i40e_handle_reset_warning(pf);
4912
4913 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4914 int v;
4915
4916 /* Find the VSI(s) that requested a re-init */
4917 dev_info(&pf->pdev->dev,
4918 "VSI reinit requested\n");
4919 for (v = 0; v < pf->num_alloc_vsi; v++) {
4920 struct i40e_vsi *vsi = pf->vsi[v];
4921 if (vsi != NULL &&
4922 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4923 i40e_vsi_reinit_locked(pf->vsi[v]);
4924 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4925 }
4926 }
4927
4928 /* no further action needed, so return now */
4929 return;
4930 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
4931 int v;
4932
4933 /* Find the VSI(s) that needs to be brought down */
4934 dev_info(&pf->pdev->dev, "VSI down requested\n");
4935 for (v = 0; v < pf->num_alloc_vsi; v++) {
4936 struct i40e_vsi *vsi = pf->vsi[v];
4937 if (vsi != NULL &&
4938 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
4939 set_bit(__I40E_DOWN, &vsi->state);
4940 i40e_down(vsi);
4941 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
4942 }
4943 }
4944
4945 /* no further action needed, so return now */
4946 return;
4947 } else {
4948 dev_info(&pf->pdev->dev,
4949 "bad reset request 0x%08x\n", reset_flags);
4950 return;
4951 }
4952 }
4953
4954 #ifdef CONFIG_I40E_DCB
4955 /**
4956 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4957 * @pf: board private structure
4958 * @old_cfg: current DCB config
4959 * @new_cfg: new DCB config
4960 **/
i40e_dcb_need_reconfig(struct i40e_pf * pf,struct i40e_dcbx_config * old_cfg,struct i40e_dcbx_config * new_cfg)4961 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4962 struct i40e_dcbx_config *old_cfg,
4963 struct i40e_dcbx_config *new_cfg)
4964 {
4965 bool need_reconfig = false;
4966
4967 /* Check if ETS configuration has changed */
4968 if (memcmp(&new_cfg->etscfg,
4969 &old_cfg->etscfg,
4970 sizeof(new_cfg->etscfg))) {
4971 /* If Priority Table has changed reconfig is needed */
4972 if (memcmp(&new_cfg->etscfg.prioritytable,
4973 &old_cfg->etscfg.prioritytable,
4974 sizeof(new_cfg->etscfg.prioritytable))) {
4975 need_reconfig = true;
4976 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4977 }
4978
4979 if (memcmp(&new_cfg->etscfg.tcbwtable,
4980 &old_cfg->etscfg.tcbwtable,
4981 sizeof(new_cfg->etscfg.tcbwtable)))
4982 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4983
4984 if (memcmp(&new_cfg->etscfg.tsatable,
4985 &old_cfg->etscfg.tsatable,
4986 sizeof(new_cfg->etscfg.tsatable)))
4987 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4988 }
4989
4990 /* Check if PFC configuration has changed */
4991 if (memcmp(&new_cfg->pfc,
4992 &old_cfg->pfc,
4993 sizeof(new_cfg->pfc))) {
4994 need_reconfig = true;
4995 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4996 }
4997
4998 /* Check if APP Table has changed */
4999 if (memcmp(&new_cfg->app,
5000 &old_cfg->app,
5001 sizeof(new_cfg->app))) {
5002 need_reconfig = true;
5003 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5004 }
5005
5006 return need_reconfig;
5007 }
5008
5009 /**
5010 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5011 * @pf: board private structure
5012 * @e: event info posted on ARQ
5013 **/
i40e_handle_lldp_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)5014 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5015 struct i40e_arq_event_info *e)
5016 {
5017 struct i40e_aqc_lldp_get_mib *mib =
5018 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5019 struct i40e_hw *hw = &pf->hw;
5020 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
5021 struct i40e_dcbx_config tmp_dcbx_cfg;
5022 bool need_reconfig = false;
5023 int ret = 0;
5024 u8 type;
5025
5026 /* Not DCB capable or capability disabled */
5027 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5028 return ret;
5029
5030 /* Ignore if event is not for Nearest Bridge */
5031 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5032 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5033 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5034 return ret;
5035
5036 /* Check MIB Type and return if event for Remote MIB update */
5037 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5038 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5039 /* Update the remote cached instance and return */
5040 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5041 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5042 &hw->remote_dcbx_config);
5043 goto exit;
5044 }
5045
5046 /* Convert/store the DCBX data from LLDPDU temporarily */
5047 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5048 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
5049 if (ret) {
5050 /* Error in LLDPDU parsing return */
5051 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
5052 goto exit;
5053 }
5054
5055 /* No change detected in DCBX configs */
5056 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
5057 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5058 goto exit;
5059 }
5060
5061 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
5062
5063 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
5064
5065 /* Overwrite the new configuration */
5066 *dcbx_cfg = tmp_dcbx_cfg;
5067
5068 if (!need_reconfig)
5069 goto exit;
5070
5071 /* Enable DCB tagging only when more than one TC */
5072 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
5073 pf->flags |= I40E_FLAG_DCB_ENABLED;
5074 else
5075 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5076
5077 /* Reconfiguration needed quiesce all VSIs */
5078 i40e_pf_quiesce_all_vsi(pf);
5079
5080 /* Changes in configuration update VEB/VSI */
5081 i40e_dcb_reconfigure(pf);
5082
5083 i40e_pf_unquiesce_all_vsi(pf);
5084 exit:
5085 return ret;
5086 }
5087 #endif /* CONFIG_I40E_DCB */
5088
5089 /**
5090 * i40e_do_reset_safe - Protected reset path for userland calls.
5091 * @pf: board private structure
5092 * @reset_flags: which reset is requested
5093 *
5094 **/
i40e_do_reset_safe(struct i40e_pf * pf,u32 reset_flags)5095 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5096 {
5097 rtnl_lock();
5098 i40e_do_reset(pf, reset_flags);
5099 rtnl_unlock();
5100 }
5101
5102 /**
5103 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5104 * @pf: board private structure
5105 * @e: event info posted on ARQ
5106 *
5107 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5108 * and VF queues
5109 **/
i40e_handle_lan_overflow_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)5110 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5111 struct i40e_arq_event_info *e)
5112 {
5113 struct i40e_aqc_lan_overflow *data =
5114 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5115 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5116 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5117 struct i40e_hw *hw = &pf->hw;
5118 struct i40e_vf *vf;
5119 u16 vf_id;
5120
5121 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5122 queue, qtx_ctl);
5123
5124 /* Queue belongs to VF, find the VF and issue VF reset */
5125 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5126 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5127 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5128 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5129 vf_id -= hw->func_caps.vf_base_id;
5130 vf = &pf->vf[vf_id];
5131 i40e_vc_notify_vf_reset(vf);
5132 /* Allow VF to process pending reset notification */
5133 msleep(20);
5134 i40e_reset_vf(vf, false);
5135 }
5136 }
5137
5138 /**
5139 * i40e_service_event_complete - Finish up the service event
5140 * @pf: board private structure
5141 **/
i40e_service_event_complete(struct i40e_pf * pf)5142 static void i40e_service_event_complete(struct i40e_pf *pf)
5143 {
5144 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5145
5146 /* flush memory to make sure state is correct before next watchog */
5147 smp_mb__before_atomic();
5148 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5149 }
5150
5151 /**
5152 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5153 * @pf: board private structure
5154 **/
i40e_get_cur_guaranteed_fd_count(struct i40e_pf * pf)5155 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5156 {
5157 int val, fcnt_prog;
5158
5159 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5160 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5161 return fcnt_prog;
5162 }
5163
5164 /**
5165 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5166 * @pf: board private structure
5167 **/
i40e_get_current_fd_count(struct i40e_pf * pf)5168 int i40e_get_current_fd_count(struct i40e_pf *pf)
5169 {
5170 int val, fcnt_prog;
5171 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5172 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5173 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5174 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5175 return fcnt_prog;
5176 }
5177
5178 /**
5179 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5180 * @pf: board private structure
5181 **/
i40e_fdir_check_and_reenable(struct i40e_pf * pf)5182 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5183 {
5184 u32 fcnt_prog, fcnt_avail;
5185
5186 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5187 return;
5188
5189 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5190 * to re-enable
5191 */
5192 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5193 fcnt_avail = pf->fdir_pf_filter_count;
5194 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5195 (pf->fd_add_err == 0) ||
5196 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5197 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5198 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5199 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5200 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5201 }
5202 }
5203 /* Wait for some more space to be available to turn on ATR */
5204 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5205 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5206 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5207 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5208 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5209 }
5210 }
5211 }
5212
5213 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5214 /**
5215 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5216 * @pf: board private structure
5217 **/
i40e_fdir_flush_and_replay(struct i40e_pf * pf)5218 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5219 {
5220 int flush_wait_retry = 50;
5221 int reg;
5222
5223 if (time_after(jiffies, pf->fd_flush_timestamp +
5224 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5225 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5226 pf->fd_flush_timestamp = jiffies;
5227 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5228 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5229 /* flush all filters */
5230 wr32(&pf->hw, I40E_PFQF_CTL_1,
5231 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5232 i40e_flush(&pf->hw);
5233 pf->fd_flush_cnt++;
5234 pf->fd_add_err = 0;
5235 do {
5236 /* Check FD flush status every 5-6msec */
5237 usleep_range(5000, 6000);
5238 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5239 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5240 break;
5241 } while (flush_wait_retry--);
5242 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5243 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5244 } else {
5245 /* replay sideband filters */
5246 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5247
5248 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5249 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5250 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5251 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5252 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5253 }
5254 }
5255 }
5256
5257 /**
5258 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5259 * @pf: board private structure
5260 **/
i40e_get_current_atr_cnt(struct i40e_pf * pf)5261 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5262 {
5263 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5264 }
5265
5266 /* We can see up to 256 filter programming desc in transit if the filters are
5267 * being applied really fast; before we see the first
5268 * filter miss error on Rx queue 0. Accumulating enough error messages before
5269 * reacting will make sure we don't cause flush too often.
5270 */
5271 #define I40E_MAX_FD_PROGRAM_ERROR 256
5272
5273 /**
5274 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5275 * @pf: board private structure
5276 **/
i40e_fdir_reinit_subtask(struct i40e_pf * pf)5277 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5278 {
5279
5280 /* if interface is down do nothing */
5281 if (test_bit(__I40E_DOWN, &pf->state))
5282 return;
5283
5284 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5285 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5286 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5287 i40e_fdir_flush_and_replay(pf);
5288
5289 i40e_fdir_check_and_reenable(pf);
5290
5291 }
5292
5293 /**
5294 * i40e_vsi_link_event - notify VSI of a link event
5295 * @vsi: vsi to be notified
5296 * @link_up: link up or down
5297 **/
i40e_vsi_link_event(struct i40e_vsi * vsi,bool link_up)5298 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5299 {
5300 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5301 return;
5302
5303 switch (vsi->type) {
5304 case I40E_VSI_MAIN:
5305 #ifdef I40E_FCOE
5306 case I40E_VSI_FCOE:
5307 #endif
5308 if (!vsi->netdev || !vsi->netdev_registered)
5309 break;
5310
5311 if (link_up) {
5312 netif_carrier_on(vsi->netdev);
5313 netif_tx_wake_all_queues(vsi->netdev);
5314 } else {
5315 netif_carrier_off(vsi->netdev);
5316 netif_tx_stop_all_queues(vsi->netdev);
5317 }
5318 break;
5319
5320 case I40E_VSI_SRIOV:
5321 break;
5322
5323 case I40E_VSI_VMDQ2:
5324 case I40E_VSI_CTRL:
5325 case I40E_VSI_MIRROR:
5326 default:
5327 /* there is no notification for other VSIs */
5328 break;
5329 }
5330 }
5331
5332 /**
5333 * i40e_veb_link_event - notify elements on the veb of a link event
5334 * @veb: veb to be notified
5335 * @link_up: link up or down
5336 **/
i40e_veb_link_event(struct i40e_veb * veb,bool link_up)5337 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5338 {
5339 struct i40e_pf *pf;
5340 int i;
5341
5342 if (!veb || !veb->pf)
5343 return;
5344 pf = veb->pf;
5345
5346 /* depth first... */
5347 for (i = 0; i < I40E_MAX_VEB; i++)
5348 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5349 i40e_veb_link_event(pf->veb[i], link_up);
5350
5351 /* ... now the local VSIs */
5352 for (i = 0; i < pf->num_alloc_vsi; i++)
5353 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5354 i40e_vsi_link_event(pf->vsi[i], link_up);
5355 }
5356
5357 /**
5358 * i40e_link_event - Update netif_carrier status
5359 * @pf: board private structure
5360 **/
i40e_link_event(struct i40e_pf * pf)5361 static void i40e_link_event(struct i40e_pf *pf)
5362 {
5363 bool new_link, old_link;
5364
5365 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
5366 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5367
5368 if (new_link == old_link)
5369 return;
5370 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
5371 i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
5372
5373 /* Notify the base of the switch tree connected to
5374 * the link. Floating VEBs are not notified.
5375 */
5376 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5377 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5378 else
5379 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
5380
5381 if (pf->vf)
5382 i40e_vc_notify_link_state(pf);
5383
5384 if (pf->flags & I40E_FLAG_PTP)
5385 i40e_ptp_set_increment(pf);
5386 }
5387
5388 /**
5389 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5390 * @pf: board private structure
5391 *
5392 * Set the per-queue flags to request a check for stuck queues in the irq
5393 * clean functions, then force interrupts to be sure the irq clean is called.
5394 **/
i40e_check_hang_subtask(struct i40e_pf * pf)5395 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5396 {
5397 int i, v;
5398
5399 /* If we're down or resetting, just bail */
5400 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5401 return;
5402
5403 /* for each VSI/netdev
5404 * for each Tx queue
5405 * set the check flag
5406 * for each q_vector
5407 * force an interrupt
5408 */
5409 for (v = 0; v < pf->num_alloc_vsi; v++) {
5410 struct i40e_vsi *vsi = pf->vsi[v];
5411 int armed = 0;
5412
5413 if (!pf->vsi[v] ||
5414 test_bit(__I40E_DOWN, &vsi->state) ||
5415 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5416 continue;
5417
5418 for (i = 0; i < vsi->num_queue_pairs; i++) {
5419 set_check_for_tx_hang(vsi->tx_rings[i]);
5420 if (test_bit(__I40E_HANG_CHECK_ARMED,
5421 &vsi->tx_rings[i]->state))
5422 armed++;
5423 }
5424
5425 if (armed) {
5426 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5427 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5428 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5429 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
5430 } else {
5431 u16 vec = vsi->base_vector - 1;
5432 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5433 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
5434 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5435 wr32(&vsi->back->hw,
5436 I40E_PFINT_DYN_CTLN(vec), val);
5437 }
5438 i40e_flush(&vsi->back->hw);
5439 }
5440 }
5441 }
5442
5443 /**
5444 * i40e_watchdog_subtask - Check and bring link up
5445 * @pf: board private structure
5446 **/
i40e_watchdog_subtask(struct i40e_pf * pf)5447 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5448 {
5449 int i;
5450
5451 /* if interface is down do nothing */
5452 if (test_bit(__I40E_DOWN, &pf->state) ||
5453 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5454 return;
5455
5456 /* Update the stats for active netdevs so the network stack
5457 * can look at updated numbers whenever it cares to
5458 */
5459 for (i = 0; i < pf->num_alloc_vsi; i++)
5460 if (pf->vsi[i] && pf->vsi[i]->netdev)
5461 i40e_update_stats(pf->vsi[i]);
5462
5463 /* Update the stats for the active switching components */
5464 for (i = 0; i < I40E_MAX_VEB; i++)
5465 if (pf->veb[i])
5466 i40e_update_veb_stats(pf->veb[i]);
5467
5468 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5469 }
5470
5471 /**
5472 * i40e_reset_subtask - Set up for resetting the device and driver
5473 * @pf: board private structure
5474 **/
i40e_reset_subtask(struct i40e_pf * pf)5475 static void i40e_reset_subtask(struct i40e_pf *pf)
5476 {
5477 u32 reset_flags = 0;
5478
5479 rtnl_lock();
5480 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5481 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5482 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5483 }
5484 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5485 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5486 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5487 }
5488 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5489 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5490 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5491 }
5492 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5493 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5494 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5495 }
5496 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5497 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5498 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5499 }
5500
5501 /* If there's a recovery already waiting, it takes
5502 * precedence before starting a new reset sequence.
5503 */
5504 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5505 i40e_handle_reset_warning(pf);
5506 goto unlock;
5507 }
5508
5509 /* If we're already down or resetting, just bail */
5510 if (reset_flags &&
5511 !test_bit(__I40E_DOWN, &pf->state) &&
5512 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5513 i40e_do_reset(pf, reset_flags);
5514
5515 unlock:
5516 rtnl_unlock();
5517 }
5518
5519 /**
5520 * i40e_handle_link_event - Handle link event
5521 * @pf: board private structure
5522 * @e: event info posted on ARQ
5523 **/
i40e_handle_link_event(struct i40e_pf * pf,struct i40e_arq_event_info * e)5524 static void i40e_handle_link_event(struct i40e_pf *pf,
5525 struct i40e_arq_event_info *e)
5526 {
5527 struct i40e_hw *hw = &pf->hw;
5528 struct i40e_aqc_get_link_status *status =
5529 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5530 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5531
5532 /* save off old link status information */
5533 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5534 sizeof(pf->hw.phy.link_info_old));
5535
5536 /* check for unqualified module, if link is down */
5537 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5538 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5539 (!(status->link_info & I40E_AQ_LINK_UP)))
5540 dev_err(&pf->pdev->dev,
5541 "The driver failed to link because an unqualified module was detected.\n");
5542
5543 /* update link status */
5544 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
5545 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
5546 hw_link_info->link_info = status->link_info;
5547 hw_link_info->an_info = status->an_info;
5548 hw_link_info->ext_info = status->ext_info;
5549 hw_link_info->lse_enable =
5550 le16_to_cpu(status->command_flags) &
5551 I40E_AQ_LSE_ENABLE;
5552
5553 /* process the event */
5554 i40e_link_event(pf);
5555
5556 /* Do a new status request to re-enable LSE reporting
5557 * and load new status information into the hw struct,
5558 * then see if the status changed while processing the
5559 * initial event.
5560 */
5561 i40e_update_link_info(&pf->hw, true);
5562 i40e_link_event(pf);
5563 }
5564
5565 /**
5566 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5567 * @pf: board private structure
5568 **/
i40e_clean_adminq_subtask(struct i40e_pf * pf)5569 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5570 {
5571 struct i40e_arq_event_info event;
5572 struct i40e_hw *hw = &pf->hw;
5573 u16 pending, i = 0;
5574 i40e_status ret;
5575 u16 opcode;
5576 u32 oldval;
5577 u32 val;
5578
5579 /* Do not run clean AQ when PF reset fails */
5580 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5581 return;
5582
5583 /* check for error indications */
5584 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5585 oldval = val;
5586 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5587 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5588 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5589 }
5590 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5591 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5592 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5593 }
5594 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5595 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5596 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5597 }
5598 if (oldval != val)
5599 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5600
5601 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5602 oldval = val;
5603 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5604 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5605 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5606 }
5607 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5608 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5609 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5610 }
5611 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5612 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5613 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5614 }
5615 if (oldval != val)
5616 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5617
5618 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5619 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5620 if (!event.msg_buf)
5621 return;
5622
5623 do {
5624 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5625 ret = i40e_clean_arq_element(hw, &event, &pending);
5626 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5627 break;
5628 else if (ret) {
5629 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5630 break;
5631 }
5632
5633 opcode = le16_to_cpu(event.desc.opcode);
5634 switch (opcode) {
5635
5636 case i40e_aqc_opc_get_link_status:
5637 i40e_handle_link_event(pf, &event);
5638 break;
5639 case i40e_aqc_opc_send_msg_to_pf:
5640 ret = i40e_vc_process_vf_msg(pf,
5641 le16_to_cpu(event.desc.retval),
5642 le32_to_cpu(event.desc.cookie_high),
5643 le32_to_cpu(event.desc.cookie_low),
5644 event.msg_buf,
5645 event.msg_size);
5646 break;
5647 case i40e_aqc_opc_lldp_update_mib:
5648 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5649 #ifdef CONFIG_I40E_DCB
5650 rtnl_lock();
5651 ret = i40e_handle_lldp_event(pf, &event);
5652 rtnl_unlock();
5653 #endif /* CONFIG_I40E_DCB */
5654 break;
5655 case i40e_aqc_opc_event_lan_overflow:
5656 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5657 i40e_handle_lan_overflow_event(pf, &event);
5658 break;
5659 case i40e_aqc_opc_send_msg_to_peer:
5660 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5661 break;
5662 default:
5663 dev_info(&pf->pdev->dev,
5664 "ARQ Error: Unknown event 0x%04x received\n",
5665 opcode);
5666 break;
5667 }
5668 } while (pending && (i++ < pf->adminq_work_limit));
5669
5670 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5671 /* re-enable Admin queue interrupt cause */
5672 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5673 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5674 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5675 i40e_flush(hw);
5676
5677 kfree(event.msg_buf);
5678 }
5679
5680 /**
5681 * i40e_verify_eeprom - make sure eeprom is good to use
5682 * @pf: board private structure
5683 **/
i40e_verify_eeprom(struct i40e_pf * pf)5684 static void i40e_verify_eeprom(struct i40e_pf *pf)
5685 {
5686 int err;
5687
5688 err = i40e_diag_eeprom_test(&pf->hw);
5689 if (err) {
5690 /* retry in case of garbage read */
5691 err = i40e_diag_eeprom_test(&pf->hw);
5692 if (err) {
5693 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5694 err);
5695 set_bit(__I40E_BAD_EEPROM, &pf->state);
5696 }
5697 }
5698
5699 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5700 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5701 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5702 }
5703 }
5704
5705 /**
5706 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5707 * @veb: pointer to the VEB instance
5708 *
5709 * This is a recursive function that first builds the attached VSIs then
5710 * recurses in to build the next layer of VEB. We track the connections
5711 * through our own index numbers because the seid's from the HW could
5712 * change across the reset.
5713 **/
i40e_reconstitute_veb(struct i40e_veb * veb)5714 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5715 {
5716 struct i40e_vsi *ctl_vsi = NULL;
5717 struct i40e_pf *pf = veb->pf;
5718 int v, veb_idx;
5719 int ret;
5720
5721 /* build VSI that owns this VEB, temporarily attached to base VEB */
5722 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5723 if (pf->vsi[v] &&
5724 pf->vsi[v]->veb_idx == veb->idx &&
5725 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5726 ctl_vsi = pf->vsi[v];
5727 break;
5728 }
5729 }
5730 if (!ctl_vsi) {
5731 dev_info(&pf->pdev->dev,
5732 "missing owner VSI for veb_idx %d\n", veb->idx);
5733 ret = -ENOENT;
5734 goto end_reconstitute;
5735 }
5736 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5737 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5738 ret = i40e_add_vsi(ctl_vsi);
5739 if (ret) {
5740 dev_info(&pf->pdev->dev,
5741 "rebuild of owner VSI failed: %d\n", ret);
5742 goto end_reconstitute;
5743 }
5744 i40e_vsi_reset_stats(ctl_vsi);
5745
5746 /* create the VEB in the switch and move the VSI onto the VEB */
5747 ret = i40e_add_veb(veb, ctl_vsi);
5748 if (ret)
5749 goto end_reconstitute;
5750
5751 /* create the remaining VSIs attached to this VEB */
5752 for (v = 0; v < pf->num_alloc_vsi; v++) {
5753 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5754 continue;
5755
5756 if (pf->vsi[v]->veb_idx == veb->idx) {
5757 struct i40e_vsi *vsi = pf->vsi[v];
5758 vsi->uplink_seid = veb->seid;
5759 ret = i40e_add_vsi(vsi);
5760 if (ret) {
5761 dev_info(&pf->pdev->dev,
5762 "rebuild of vsi_idx %d failed: %d\n",
5763 v, ret);
5764 goto end_reconstitute;
5765 }
5766 i40e_vsi_reset_stats(vsi);
5767 }
5768 }
5769
5770 /* create any VEBs attached to this VEB - RECURSION */
5771 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5772 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5773 pf->veb[veb_idx]->uplink_seid = veb->seid;
5774 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5775 if (ret)
5776 break;
5777 }
5778 }
5779
5780 end_reconstitute:
5781 return ret;
5782 }
5783
5784 /**
5785 * i40e_get_capabilities - get info about the HW
5786 * @pf: the PF struct
5787 **/
i40e_get_capabilities(struct i40e_pf * pf)5788 static int i40e_get_capabilities(struct i40e_pf *pf)
5789 {
5790 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5791 u16 data_size;
5792 int buf_len;
5793 int err;
5794
5795 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5796 do {
5797 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5798 if (!cap_buf)
5799 return -ENOMEM;
5800
5801 /* this loads the data into the hw struct for us */
5802 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5803 &data_size,
5804 i40e_aqc_opc_list_func_capabilities,
5805 NULL);
5806 /* data loaded, buffer no longer needed */
5807 kfree(cap_buf);
5808
5809 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5810 /* retry with a larger buffer */
5811 buf_len = data_size;
5812 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5813 dev_info(&pf->pdev->dev,
5814 "capability discovery failed: aq=%d\n",
5815 pf->hw.aq.asq_last_status);
5816 return -ENODEV;
5817 }
5818 } while (err);
5819
5820 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5821 (pf->hw.aq.fw_maj_ver < 2)) {
5822 pf->hw.func_caps.num_msix_vectors++;
5823 pf->hw.func_caps.num_msix_vectors_vf++;
5824 }
5825
5826 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5827 dev_info(&pf->pdev->dev,
5828 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5829 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5830 pf->hw.func_caps.num_msix_vectors,
5831 pf->hw.func_caps.num_msix_vectors_vf,
5832 pf->hw.func_caps.fd_filters_guaranteed,
5833 pf->hw.func_caps.fd_filters_best_effort,
5834 pf->hw.func_caps.num_tx_qp,
5835 pf->hw.func_caps.num_vsis);
5836
5837 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5838 + pf->hw.func_caps.num_vfs)
5839 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5840 dev_info(&pf->pdev->dev,
5841 "got num_vsis %d, setting num_vsis to %d\n",
5842 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5843 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5844 }
5845
5846 return 0;
5847 }
5848
5849 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5850
5851 /**
5852 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5853 * @pf: board private structure
5854 **/
i40e_fdir_sb_setup(struct i40e_pf * pf)5855 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5856 {
5857 struct i40e_vsi *vsi;
5858 int i;
5859
5860 /* quick workaround for an NVM issue that leaves a critical register
5861 * uninitialized
5862 */
5863 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
5864 static const u32 hkey[] = {
5865 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
5866 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
5867 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
5868 0x95b3a76d};
5869
5870 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
5871 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
5872 }
5873
5874 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5875 return;
5876
5877 /* find existing VSI and see if it needs configuring */
5878 vsi = NULL;
5879 for (i = 0; i < pf->num_alloc_vsi; i++) {
5880 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5881 vsi = pf->vsi[i];
5882 break;
5883 }
5884 }
5885
5886 /* create a new VSI if none exists */
5887 if (!vsi) {
5888 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5889 pf->vsi[pf->lan_vsi]->seid, 0);
5890 if (!vsi) {
5891 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5892 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5893 return;
5894 }
5895 }
5896
5897 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5898 }
5899
5900 /**
5901 * i40e_fdir_teardown - release the Flow Director resources
5902 * @pf: board private structure
5903 **/
i40e_fdir_teardown(struct i40e_pf * pf)5904 static void i40e_fdir_teardown(struct i40e_pf *pf)
5905 {
5906 int i;
5907
5908 i40e_fdir_filter_exit(pf);
5909 for (i = 0; i < pf->num_alloc_vsi; i++) {
5910 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5911 i40e_vsi_release(pf->vsi[i]);
5912 break;
5913 }
5914 }
5915 }
5916
5917 /**
5918 * i40e_prep_for_reset - prep for the core to reset
5919 * @pf: board private structure
5920 *
5921 * Close up the VFs and other things in prep for pf Reset.
5922 **/
i40e_prep_for_reset(struct i40e_pf * pf)5923 static void i40e_prep_for_reset(struct i40e_pf *pf)
5924 {
5925 struct i40e_hw *hw = &pf->hw;
5926 i40e_status ret = 0;
5927 u32 v;
5928
5929 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5930 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5931 return;
5932
5933 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5934
5935 /* quiesce the VSIs and their queues that are not already DOWN */
5936 i40e_pf_quiesce_all_vsi(pf);
5937
5938 for (v = 0; v < pf->num_alloc_vsi; v++) {
5939 if (pf->vsi[v])
5940 pf->vsi[v]->seid = 0;
5941 }
5942
5943 i40e_shutdown_adminq(&pf->hw);
5944
5945 /* call shutdown HMC */
5946 if (hw->hmc.hmc_obj) {
5947 ret = i40e_shutdown_lan_hmc(hw);
5948 if (ret)
5949 dev_warn(&pf->pdev->dev,
5950 "shutdown_lan_hmc failed: %d\n", ret);
5951 }
5952 }
5953
5954 /**
5955 * i40e_send_version - update firmware with driver version
5956 * @pf: PF struct
5957 */
i40e_send_version(struct i40e_pf * pf)5958 static void i40e_send_version(struct i40e_pf *pf)
5959 {
5960 struct i40e_driver_version dv;
5961
5962 dv.major_version = DRV_VERSION_MAJOR;
5963 dv.minor_version = DRV_VERSION_MINOR;
5964 dv.build_version = DRV_VERSION_BUILD;
5965 dv.subbuild_version = 0;
5966 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
5967 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5968 }
5969
5970 /**
5971 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5972 * @pf: board private structure
5973 * @reinit: if the Main VSI needs to re-initialized.
5974 **/
i40e_reset_and_rebuild(struct i40e_pf * pf,bool reinit)5975 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5976 {
5977 struct i40e_hw *hw = &pf->hw;
5978 i40e_status ret;
5979 u32 v;
5980
5981 /* Now we wait for GRST to settle out.
5982 * We don't have to delete the VEBs or VSIs from the hw switch
5983 * because the reset will make them disappear.
5984 */
5985 ret = i40e_pf_reset(hw);
5986 if (ret) {
5987 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5988 set_bit(__I40E_RESET_FAILED, &pf->state);
5989 goto clear_recovery;
5990 }
5991 pf->pfr_count++;
5992
5993 if (test_bit(__I40E_DOWN, &pf->state))
5994 goto clear_recovery;
5995 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5996
5997 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5998 ret = i40e_init_adminq(&pf->hw);
5999 if (ret) {
6000 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6001 goto clear_recovery;
6002 }
6003
6004 /* re-verify the eeprom if we just had an EMP reset */
6005 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
6006 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
6007 i40e_verify_eeprom(pf);
6008 }
6009
6010 i40e_clear_pxe_mode(hw);
6011 ret = i40e_get_capabilities(pf);
6012 if (ret) {
6013 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6014 ret);
6015 goto end_core_reset;
6016 }
6017
6018 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6019 hw->func_caps.num_rx_qp,
6020 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6021 if (ret) {
6022 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6023 goto end_core_reset;
6024 }
6025 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6026 if (ret) {
6027 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6028 goto end_core_reset;
6029 }
6030
6031 #ifdef CONFIG_I40E_DCB
6032 ret = i40e_init_pf_dcb(pf);
6033 if (ret) {
6034 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
6035 goto end_core_reset;
6036 }
6037 #endif /* CONFIG_I40E_DCB */
6038 #ifdef I40E_FCOE
6039 ret = i40e_init_pf_fcoe(pf);
6040 if (ret)
6041 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6042
6043 #endif
6044 /* do basic switch setup */
6045 ret = i40e_setup_pf_switch(pf, reinit);
6046 if (ret)
6047 goto end_core_reset;
6048
6049 /* Rebuild the VSIs and VEBs that existed before reset.
6050 * They are still in our local switch element arrays, so only
6051 * need to rebuild the switch model in the HW.
6052 *
6053 * If there were VEBs but the reconstitution failed, we'll try
6054 * try to recover minimal use by getting the basic PF VSI working.
6055 */
6056 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6057 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6058 /* find the one VEB connected to the MAC, and find orphans */
6059 for (v = 0; v < I40E_MAX_VEB; v++) {
6060 if (!pf->veb[v])
6061 continue;
6062
6063 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6064 pf->veb[v]->uplink_seid == 0) {
6065 ret = i40e_reconstitute_veb(pf->veb[v]);
6066
6067 if (!ret)
6068 continue;
6069
6070 /* If Main VEB failed, we're in deep doodoo,
6071 * so give up rebuilding the switch and set up
6072 * for minimal rebuild of PF VSI.
6073 * If orphan failed, we'll report the error
6074 * but try to keep going.
6075 */
6076 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6077 dev_info(&pf->pdev->dev,
6078 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6079 ret);
6080 pf->vsi[pf->lan_vsi]->uplink_seid
6081 = pf->mac_seid;
6082 break;
6083 } else if (pf->veb[v]->uplink_seid == 0) {
6084 dev_info(&pf->pdev->dev,
6085 "rebuild of orphan VEB failed: %d\n",
6086 ret);
6087 }
6088 }
6089 }
6090 }
6091
6092 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6093 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6094 /* no VEB, so rebuild only the Main VSI */
6095 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6096 if (ret) {
6097 dev_info(&pf->pdev->dev,
6098 "rebuild of Main VSI failed: %d\n", ret);
6099 goto end_core_reset;
6100 }
6101 }
6102
6103 /* reinit the misc interrupt */
6104 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6105 ret = i40e_setup_misc_vector(pf);
6106
6107 /* restart the VSIs that were rebuilt and running before the reset */
6108 i40e_pf_unquiesce_all_vsi(pf);
6109
6110 if (pf->num_alloc_vfs) {
6111 for (v = 0; v < pf->num_alloc_vfs; v++)
6112 i40e_reset_vf(&pf->vf[v], true);
6113 }
6114
6115 /* tell the firmware that we're starting */
6116 i40e_send_version(pf);
6117
6118 end_core_reset:
6119 clear_bit(__I40E_RESET_FAILED, &pf->state);
6120 clear_recovery:
6121 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6122 }
6123
6124 /**
6125 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6126 * @pf: board private structure
6127 *
6128 * Close up the VFs and other things in prep for a Core Reset,
6129 * then get ready to rebuild the world.
6130 **/
i40e_handle_reset_warning(struct i40e_pf * pf)6131 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6132 {
6133 i40e_prep_for_reset(pf);
6134 i40e_reset_and_rebuild(pf, false);
6135 }
6136
6137 /**
6138 * i40e_handle_mdd_event
6139 * @pf: pointer to the pf structure
6140 *
6141 * Called from the MDD irq handler to identify possibly malicious vfs
6142 **/
i40e_handle_mdd_event(struct i40e_pf * pf)6143 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6144 {
6145 struct i40e_hw *hw = &pf->hw;
6146 bool mdd_detected = false;
6147 bool pf_mdd_detected = false;
6148 struct i40e_vf *vf;
6149 u32 reg;
6150 int i;
6151
6152 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6153 return;
6154
6155 /* find what triggered the MDD event */
6156 reg = rd32(hw, I40E_GL_MDET_TX);
6157 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6158 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6159 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6160 u8 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6161 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6162 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6163 I40E_GL_MDET_TX_EVENT_SHIFT;
6164 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6165 I40E_GL_MDET_TX_QUEUE_SHIFT;
6166 if (netif_msg_tx_err(pf))
6167 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6168 event, queue, pf_num, vf_num);
6169 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6170 mdd_detected = true;
6171 }
6172 reg = rd32(hw, I40E_GL_MDET_RX);
6173 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6174 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6175 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6176 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6177 I40E_GL_MDET_RX_EVENT_SHIFT;
6178 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6179 I40E_GL_MDET_RX_QUEUE_SHIFT;
6180 if (netif_msg_rx_err(pf))
6181 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6182 event, queue, func);
6183 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6184 mdd_detected = true;
6185 }
6186
6187 if (mdd_detected) {
6188 reg = rd32(hw, I40E_PF_MDET_TX);
6189 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6190 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6191 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6192 pf_mdd_detected = true;
6193 }
6194 reg = rd32(hw, I40E_PF_MDET_RX);
6195 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6196 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6197 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6198 pf_mdd_detected = true;
6199 }
6200 /* Queue belongs to the PF, initiate a reset */
6201 if (pf_mdd_detected) {
6202 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6203 i40e_service_event_schedule(pf);
6204 }
6205 }
6206
6207 /* see if one of the VFs needs its hand slapped */
6208 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6209 vf = &(pf->vf[i]);
6210 reg = rd32(hw, I40E_VP_MDET_TX(i));
6211 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6212 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6213 vf->num_mdd_events++;
6214 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6215 i);
6216 }
6217
6218 reg = rd32(hw, I40E_VP_MDET_RX(i));
6219 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6220 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6221 vf->num_mdd_events++;
6222 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6223 i);
6224 }
6225
6226 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6227 dev_info(&pf->pdev->dev,
6228 "Too many MDD events on VF %d, disabled\n", i);
6229 dev_info(&pf->pdev->dev,
6230 "Use PF Control I/F to re-enable the VF\n");
6231 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6232 }
6233 }
6234
6235 /* re-enable mdd interrupt cause */
6236 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6237 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6238 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6239 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6240 i40e_flush(hw);
6241 }
6242
6243 #ifdef CONFIG_I40E_VXLAN
6244 /**
6245 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6246 * @pf: board private structure
6247 **/
i40e_sync_vxlan_filters_subtask(struct i40e_pf * pf)6248 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6249 {
6250 struct i40e_hw *hw = &pf->hw;
6251 i40e_status ret;
6252 u8 filter_index;
6253 __be16 port;
6254 int i;
6255
6256 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6257 return;
6258
6259 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6260
6261 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6262 if (pf->pending_vxlan_bitmap & (1 << i)) {
6263 pf->pending_vxlan_bitmap &= ~(1 << i);
6264 port = pf->vxlan_ports[i];
6265 ret = port ?
6266 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6267 I40E_AQC_TUNNEL_TYPE_VXLAN,
6268 &filter_index, NULL)
6269 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6270
6271 if (ret) {
6272 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6273 port ? "adding" : "deleting",
6274 ntohs(port), port ? i : i);
6275
6276 pf->vxlan_ports[i] = 0;
6277 } else {
6278 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6279 port ? "Added" : "Deleted",
6280 ntohs(port), port ? i : filter_index);
6281 }
6282 }
6283 }
6284 }
6285
6286 #endif
6287 /**
6288 * i40e_service_task - Run the driver's async subtasks
6289 * @work: pointer to work_struct containing our data
6290 **/
i40e_service_task(struct work_struct * work)6291 static void i40e_service_task(struct work_struct *work)
6292 {
6293 struct i40e_pf *pf = container_of(work,
6294 struct i40e_pf,
6295 service_task);
6296 unsigned long start_time = jiffies;
6297
6298 /* don't bother with service tasks if a reset is in progress */
6299 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6300 i40e_service_event_complete(pf);
6301 return;
6302 }
6303
6304 i40e_reset_subtask(pf);
6305 i40e_handle_mdd_event(pf);
6306 i40e_vc_process_vflr_event(pf);
6307 i40e_watchdog_subtask(pf);
6308 i40e_fdir_reinit_subtask(pf);
6309 i40e_check_hang_subtask(pf);
6310 i40e_sync_filters_subtask(pf);
6311 #ifdef CONFIG_I40E_VXLAN
6312 i40e_sync_vxlan_filters_subtask(pf);
6313 #endif
6314 i40e_clean_adminq_subtask(pf);
6315
6316 i40e_service_event_complete(pf);
6317
6318 /* If the tasks have taken longer than one timer cycle or there
6319 * is more work to be done, reschedule the service task now
6320 * rather than wait for the timer to tick again.
6321 */
6322 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6323 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6324 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6325 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6326 i40e_service_event_schedule(pf);
6327 }
6328
6329 /**
6330 * i40e_service_timer - timer callback
6331 * @data: pointer to PF struct
6332 **/
i40e_service_timer(unsigned long data)6333 static void i40e_service_timer(unsigned long data)
6334 {
6335 struct i40e_pf *pf = (struct i40e_pf *)data;
6336
6337 mod_timer(&pf->service_timer,
6338 round_jiffies(jiffies + pf->service_timer_period));
6339 i40e_service_event_schedule(pf);
6340 }
6341
6342 /**
6343 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6344 * @vsi: the VSI being configured
6345 **/
i40e_set_num_rings_in_vsi(struct i40e_vsi * vsi)6346 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6347 {
6348 struct i40e_pf *pf = vsi->back;
6349
6350 switch (vsi->type) {
6351 case I40E_VSI_MAIN:
6352 vsi->alloc_queue_pairs = pf->num_lan_qps;
6353 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6354 I40E_REQ_DESCRIPTOR_MULTIPLE);
6355 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6356 vsi->num_q_vectors = pf->num_lan_msix;
6357 else
6358 vsi->num_q_vectors = 1;
6359
6360 break;
6361
6362 case I40E_VSI_FDIR:
6363 vsi->alloc_queue_pairs = 1;
6364 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6365 I40E_REQ_DESCRIPTOR_MULTIPLE);
6366 vsi->num_q_vectors = 1;
6367 break;
6368
6369 case I40E_VSI_VMDQ2:
6370 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6371 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6372 I40E_REQ_DESCRIPTOR_MULTIPLE);
6373 vsi->num_q_vectors = pf->num_vmdq_msix;
6374 break;
6375
6376 case I40E_VSI_SRIOV:
6377 vsi->alloc_queue_pairs = pf->num_vf_qps;
6378 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6379 I40E_REQ_DESCRIPTOR_MULTIPLE);
6380 break;
6381
6382 #ifdef I40E_FCOE
6383 case I40E_VSI_FCOE:
6384 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6385 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6386 I40E_REQ_DESCRIPTOR_MULTIPLE);
6387 vsi->num_q_vectors = pf->num_fcoe_msix;
6388 break;
6389
6390 #endif /* I40E_FCOE */
6391 default:
6392 WARN_ON(1);
6393 return -ENODATA;
6394 }
6395
6396 return 0;
6397 }
6398
6399 /**
6400 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6401 * @type: VSI pointer
6402 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6403 *
6404 * On error: returns error code (negative)
6405 * On success: returns 0
6406 **/
i40e_vsi_alloc_arrays(struct i40e_vsi * vsi,bool alloc_qvectors)6407 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6408 {
6409 int size;
6410 int ret = 0;
6411
6412 /* allocate memory for both Tx and Rx ring pointers */
6413 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6414 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6415 if (!vsi->tx_rings)
6416 return -ENOMEM;
6417 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6418
6419 if (alloc_qvectors) {
6420 /* allocate memory for q_vector pointers */
6421 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6422 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6423 if (!vsi->q_vectors) {
6424 ret = -ENOMEM;
6425 goto err_vectors;
6426 }
6427 }
6428 return ret;
6429
6430 err_vectors:
6431 kfree(vsi->tx_rings);
6432 return ret;
6433 }
6434
6435 /**
6436 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6437 * @pf: board private structure
6438 * @type: type of VSI
6439 *
6440 * On error: returns error code (negative)
6441 * On success: returns vsi index in PF (positive)
6442 **/
i40e_vsi_mem_alloc(struct i40e_pf * pf,enum i40e_vsi_type type)6443 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6444 {
6445 int ret = -ENODEV;
6446 struct i40e_vsi *vsi;
6447 int vsi_idx;
6448 int i;
6449
6450 /* Need to protect the allocation of the VSIs at the PF level */
6451 mutex_lock(&pf->switch_mutex);
6452
6453 /* VSI list may be fragmented if VSI creation/destruction has
6454 * been happening. We can afford to do a quick scan to look
6455 * for any free VSIs in the list.
6456 *
6457 * find next empty vsi slot, looping back around if necessary
6458 */
6459 i = pf->next_vsi;
6460 while (i < pf->num_alloc_vsi && pf->vsi[i])
6461 i++;
6462 if (i >= pf->num_alloc_vsi) {
6463 i = 0;
6464 while (i < pf->next_vsi && pf->vsi[i])
6465 i++;
6466 }
6467
6468 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6469 vsi_idx = i; /* Found one! */
6470 } else {
6471 ret = -ENODEV;
6472 goto unlock_pf; /* out of VSI slots! */
6473 }
6474 pf->next_vsi = ++i;
6475
6476 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6477 if (!vsi) {
6478 ret = -ENOMEM;
6479 goto unlock_pf;
6480 }
6481 vsi->type = type;
6482 vsi->back = pf;
6483 set_bit(__I40E_DOWN, &vsi->state);
6484 vsi->flags = 0;
6485 vsi->idx = vsi_idx;
6486 vsi->rx_itr_setting = pf->rx_itr_default;
6487 vsi->tx_itr_setting = pf->tx_itr_default;
6488 vsi->netdev_registered = false;
6489 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6490 INIT_LIST_HEAD(&vsi->mac_filter_list);
6491 vsi->irqs_ready = false;
6492
6493 ret = i40e_set_num_rings_in_vsi(vsi);
6494 if (ret)
6495 goto err_rings;
6496
6497 ret = i40e_vsi_alloc_arrays(vsi, true);
6498 if (ret)
6499 goto err_rings;
6500
6501 /* Setup default MSIX irq handler for VSI */
6502 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6503
6504 pf->vsi[vsi_idx] = vsi;
6505 ret = vsi_idx;
6506 goto unlock_pf;
6507
6508 err_rings:
6509 pf->next_vsi = i - 1;
6510 kfree(vsi);
6511 unlock_pf:
6512 mutex_unlock(&pf->switch_mutex);
6513 return ret;
6514 }
6515
6516 /**
6517 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6518 * @type: VSI pointer
6519 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6520 *
6521 * On error: returns error code (negative)
6522 * On success: returns 0
6523 **/
i40e_vsi_free_arrays(struct i40e_vsi * vsi,bool free_qvectors)6524 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6525 {
6526 /* free the ring and vector containers */
6527 if (free_qvectors) {
6528 kfree(vsi->q_vectors);
6529 vsi->q_vectors = NULL;
6530 }
6531 kfree(vsi->tx_rings);
6532 vsi->tx_rings = NULL;
6533 vsi->rx_rings = NULL;
6534 }
6535
6536 /**
6537 * i40e_vsi_clear - Deallocate the VSI provided
6538 * @vsi: the VSI being un-configured
6539 **/
i40e_vsi_clear(struct i40e_vsi * vsi)6540 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6541 {
6542 struct i40e_pf *pf;
6543
6544 if (!vsi)
6545 return 0;
6546
6547 if (!vsi->back)
6548 goto free_vsi;
6549 pf = vsi->back;
6550
6551 mutex_lock(&pf->switch_mutex);
6552 if (!pf->vsi[vsi->idx]) {
6553 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6554 vsi->idx, vsi->idx, vsi, vsi->type);
6555 goto unlock_vsi;
6556 }
6557
6558 if (pf->vsi[vsi->idx] != vsi) {
6559 dev_err(&pf->pdev->dev,
6560 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6561 pf->vsi[vsi->idx]->idx,
6562 pf->vsi[vsi->idx],
6563 pf->vsi[vsi->idx]->type,
6564 vsi->idx, vsi, vsi->type);
6565 goto unlock_vsi;
6566 }
6567
6568 /* updates the pf for this cleared vsi */
6569 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6570 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6571
6572 i40e_vsi_free_arrays(vsi, true);
6573
6574 pf->vsi[vsi->idx] = NULL;
6575 if (vsi->idx < pf->next_vsi)
6576 pf->next_vsi = vsi->idx;
6577
6578 unlock_vsi:
6579 mutex_unlock(&pf->switch_mutex);
6580 free_vsi:
6581 kfree(vsi);
6582
6583 return 0;
6584 }
6585
6586 /**
6587 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6588 * @vsi: the VSI being cleaned
6589 **/
i40e_vsi_clear_rings(struct i40e_vsi * vsi)6590 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6591 {
6592 int i;
6593
6594 if (vsi->tx_rings && vsi->tx_rings[0]) {
6595 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6596 kfree_rcu(vsi->tx_rings[i], rcu);
6597 vsi->tx_rings[i] = NULL;
6598 vsi->rx_rings[i] = NULL;
6599 }
6600 }
6601 }
6602
6603 /**
6604 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6605 * @vsi: the VSI being configured
6606 **/
i40e_alloc_rings(struct i40e_vsi * vsi)6607 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6608 {
6609 struct i40e_ring *tx_ring, *rx_ring;
6610 struct i40e_pf *pf = vsi->back;
6611 int i;
6612
6613 /* Set basic values in the rings to be used later during open() */
6614 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6615 /* allocate space for both Tx and Rx in one shot */
6616 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6617 if (!tx_ring)
6618 goto err_out;
6619
6620 tx_ring->queue_index = i;
6621 tx_ring->reg_idx = vsi->base_queue + i;
6622 tx_ring->ring_active = false;
6623 tx_ring->vsi = vsi;
6624 tx_ring->netdev = vsi->netdev;
6625 tx_ring->dev = &pf->pdev->dev;
6626 tx_ring->count = vsi->num_desc;
6627 tx_ring->size = 0;
6628 tx_ring->dcb_tc = 0;
6629 vsi->tx_rings[i] = tx_ring;
6630
6631 rx_ring = &tx_ring[1];
6632 rx_ring->queue_index = i;
6633 rx_ring->reg_idx = vsi->base_queue + i;
6634 rx_ring->ring_active = false;
6635 rx_ring->vsi = vsi;
6636 rx_ring->netdev = vsi->netdev;
6637 rx_ring->dev = &pf->pdev->dev;
6638 rx_ring->count = vsi->num_desc;
6639 rx_ring->size = 0;
6640 rx_ring->dcb_tc = 0;
6641 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6642 set_ring_16byte_desc_enabled(rx_ring);
6643 else
6644 clear_ring_16byte_desc_enabled(rx_ring);
6645 vsi->rx_rings[i] = rx_ring;
6646 }
6647
6648 return 0;
6649
6650 err_out:
6651 i40e_vsi_clear_rings(vsi);
6652 return -ENOMEM;
6653 }
6654
6655 /**
6656 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6657 * @pf: board private structure
6658 * @vectors: the number of MSI-X vectors to request
6659 *
6660 * Returns the number of vectors reserved, or error
6661 **/
i40e_reserve_msix_vectors(struct i40e_pf * pf,int vectors)6662 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6663 {
6664 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6665 I40E_MIN_MSIX, vectors);
6666 if (vectors < 0) {
6667 dev_info(&pf->pdev->dev,
6668 "MSI-X vector reservation failed: %d\n", vectors);
6669 vectors = 0;
6670 }
6671
6672 return vectors;
6673 }
6674
6675 /**
6676 * i40e_init_msix - Setup the MSIX capability
6677 * @pf: board private structure
6678 *
6679 * Work with the OS to set up the MSIX vectors needed.
6680 *
6681 * Returns 0 on success, negative on failure
6682 **/
i40e_init_msix(struct i40e_pf * pf)6683 static int i40e_init_msix(struct i40e_pf *pf)
6684 {
6685 i40e_status err = 0;
6686 struct i40e_hw *hw = &pf->hw;
6687 int v_budget, i;
6688 int vec;
6689
6690 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6691 return -ENODEV;
6692
6693 /* The number of vectors we'll request will be comprised of:
6694 * - Add 1 for "other" cause for Admin Queue events, etc.
6695 * - The number of LAN queue pairs
6696 * - Queues being used for RSS.
6697 * We don't need as many as max_rss_size vectors.
6698 * use rss_size instead in the calculation since that
6699 * is governed by number of cpus in the system.
6700 * - assumes symmetric Tx/Rx pairing
6701 * - The number of VMDq pairs
6702 #ifdef I40E_FCOE
6703 * - The number of FCOE qps.
6704 #endif
6705 * Once we count this up, try the request.
6706 *
6707 * If we can't get what we want, we'll simplify to nearly nothing
6708 * and try again. If that still fails, we punt.
6709 */
6710 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6711 pf->num_vmdq_msix = pf->num_vmdq_qps;
6712 v_budget = 1 + pf->num_lan_msix;
6713 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6714 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6715 v_budget++;
6716
6717 #ifdef I40E_FCOE
6718 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6719 pf->num_fcoe_msix = pf->num_fcoe_qps;
6720 v_budget += pf->num_fcoe_msix;
6721 }
6722
6723 #endif
6724 /* Scale down if necessary, and the rings will share vectors */
6725 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6726
6727 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6728 GFP_KERNEL);
6729 if (!pf->msix_entries)
6730 return -ENOMEM;
6731
6732 for (i = 0; i < v_budget; i++)
6733 pf->msix_entries[i].entry = i;
6734 vec = i40e_reserve_msix_vectors(pf, v_budget);
6735
6736 if (vec != v_budget) {
6737 /* If we have limited resources, we will start with no vectors
6738 * for the special features and then allocate vectors to some
6739 * of these features based on the policy and at the end disable
6740 * the features that did not get any vectors.
6741 */
6742 #ifdef I40E_FCOE
6743 pf->num_fcoe_qps = 0;
6744 pf->num_fcoe_msix = 0;
6745 #endif
6746 pf->num_vmdq_msix = 0;
6747 }
6748
6749 if (vec < I40E_MIN_MSIX) {
6750 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6751 kfree(pf->msix_entries);
6752 pf->msix_entries = NULL;
6753 return -ENODEV;
6754
6755 } else if (vec == I40E_MIN_MSIX) {
6756 /* Adjust for minimal MSIX use */
6757 pf->num_vmdq_vsis = 0;
6758 pf->num_vmdq_qps = 0;
6759 pf->num_lan_qps = 1;
6760 pf->num_lan_msix = 1;
6761
6762 } else if (vec != v_budget) {
6763 /* reserve the misc vector */
6764 vec--;
6765
6766 /* Scale vector usage down */
6767 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6768 pf->num_vmdq_vsis = 1;
6769
6770 /* partition out the remaining vectors */
6771 switch (vec) {
6772 case 2:
6773 pf->num_lan_msix = 1;
6774 break;
6775 case 3:
6776 #ifdef I40E_FCOE
6777 /* give one vector to FCoE */
6778 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6779 pf->num_lan_msix = 1;
6780 pf->num_fcoe_msix = 1;
6781 }
6782 #else
6783 pf->num_lan_msix = 2;
6784 #endif
6785 break;
6786 default:
6787 #ifdef I40E_FCOE
6788 /* give one vector to FCoE */
6789 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6790 pf->num_fcoe_msix = 1;
6791 vec--;
6792 }
6793 #endif
6794 pf->num_lan_msix = min_t(int, (vec / 2),
6795 pf->num_lan_qps);
6796 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6797 I40E_DEFAULT_NUM_VMDQ_VSI);
6798 break;
6799 }
6800 }
6801
6802 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6803 (pf->num_vmdq_msix == 0)) {
6804 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6805 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6806 }
6807 #ifdef I40E_FCOE
6808
6809 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
6810 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
6811 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
6812 }
6813 #endif
6814 return err;
6815 }
6816
6817 /**
6818 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6819 * @vsi: the VSI being configured
6820 * @v_idx: index of the vector in the vsi struct
6821 *
6822 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6823 **/
i40e_vsi_alloc_q_vector(struct i40e_vsi * vsi,int v_idx)6824 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6825 {
6826 struct i40e_q_vector *q_vector;
6827
6828 /* allocate q_vector */
6829 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6830 if (!q_vector)
6831 return -ENOMEM;
6832
6833 q_vector->vsi = vsi;
6834 q_vector->v_idx = v_idx;
6835 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6836 if (vsi->netdev)
6837 netif_napi_add(vsi->netdev, &q_vector->napi,
6838 i40e_napi_poll, NAPI_POLL_WEIGHT);
6839
6840 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6841 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6842
6843 /* tie q_vector and vsi together */
6844 vsi->q_vectors[v_idx] = q_vector;
6845
6846 return 0;
6847 }
6848
6849 /**
6850 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6851 * @vsi: the VSI being configured
6852 *
6853 * We allocate one q_vector per queue interrupt. If allocation fails we
6854 * return -ENOMEM.
6855 **/
i40e_vsi_alloc_q_vectors(struct i40e_vsi * vsi)6856 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6857 {
6858 struct i40e_pf *pf = vsi->back;
6859 int v_idx, num_q_vectors;
6860 int err;
6861
6862 /* if not MSIX, give the one vector only to the LAN VSI */
6863 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6864 num_q_vectors = vsi->num_q_vectors;
6865 else if (vsi == pf->vsi[pf->lan_vsi])
6866 num_q_vectors = 1;
6867 else
6868 return -EINVAL;
6869
6870 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6871 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6872 if (err)
6873 goto err_out;
6874 }
6875
6876 return 0;
6877
6878 err_out:
6879 while (v_idx--)
6880 i40e_free_q_vector(vsi, v_idx);
6881
6882 return err;
6883 }
6884
6885 /**
6886 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6887 * @pf: board private structure to initialize
6888 **/
i40e_init_interrupt_scheme(struct i40e_pf * pf)6889 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6890 {
6891 int err = 0;
6892
6893 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6894 err = i40e_init_msix(pf);
6895 if (err) {
6896 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6897 #ifdef I40E_FCOE
6898 I40E_FLAG_FCOE_ENABLED |
6899 #endif
6900 I40E_FLAG_RSS_ENABLED |
6901 I40E_FLAG_DCB_CAPABLE |
6902 I40E_FLAG_SRIOV_ENABLED |
6903 I40E_FLAG_FD_SB_ENABLED |
6904 I40E_FLAG_FD_ATR_ENABLED |
6905 I40E_FLAG_VMDQ_ENABLED);
6906
6907 /* rework the queue expectations without MSIX */
6908 i40e_determine_queue_usage(pf);
6909 }
6910 }
6911
6912 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6913 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6914 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6915 err = pci_enable_msi(pf->pdev);
6916 if (err) {
6917 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6918 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6919 }
6920 }
6921
6922 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6923 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6924
6925 /* track first vector for misc interrupts */
6926 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6927 }
6928
6929 /**
6930 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6931 * @pf: board private structure
6932 *
6933 * This sets up the handler for MSIX 0, which is used to manage the
6934 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6935 * when in MSI or Legacy interrupt mode.
6936 **/
i40e_setup_misc_vector(struct i40e_pf * pf)6937 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6938 {
6939 struct i40e_hw *hw = &pf->hw;
6940 int err = 0;
6941
6942 /* Only request the irq if this is the first time through, and
6943 * not when we're rebuilding after a Reset
6944 */
6945 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6946 err = request_irq(pf->msix_entries[0].vector,
6947 i40e_intr, 0, pf->misc_int_name, pf);
6948 if (err) {
6949 dev_info(&pf->pdev->dev,
6950 "request_irq for %s failed: %d\n",
6951 pf->misc_int_name, err);
6952 return -EFAULT;
6953 }
6954 }
6955
6956 i40e_enable_misc_int_causes(hw);
6957
6958 /* associate no queues to the misc vector */
6959 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6960 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6961
6962 i40e_flush(hw);
6963
6964 i40e_irq_dynamic_enable_icr0(pf);
6965
6966 return err;
6967 }
6968
6969 /**
6970 * i40e_config_rss - Prepare for RSS if used
6971 * @pf: board private structure
6972 **/
i40e_config_rss(struct i40e_pf * pf)6973 static int i40e_config_rss(struct i40e_pf *pf)
6974 {
6975 /* Set of random keys generated using kernel random number generator */
6976 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6977 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6978 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6979 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6980 struct i40e_hw *hw = &pf->hw;
6981 u32 lut = 0;
6982 int i, j;
6983 u64 hena;
6984 u32 reg_val;
6985
6986 /* Fill out hash function seed */
6987 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6988 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6989
6990 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6991 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6992 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6993 hena |= I40E_DEFAULT_RSS_HENA;
6994 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6995 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6996
6997 /* Check capability and Set table size and register per hw expectation*/
6998 reg_val = rd32(hw, I40E_PFQF_CTL_0);
6999 if (hw->func_caps.rss_table_size == 512) {
7000 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7001 pf->rss_table_size = 512;
7002 } else {
7003 pf->rss_table_size = 128;
7004 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7005 }
7006 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7007
7008 /* Populate the LUT with max no. of queues in round robin fashion */
7009 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7010
7011 /* The assumption is that lan qp count will be the highest
7012 * qp count for any PF VSI that needs RSS.
7013 * If multiple VSIs need RSS support, all the qp counts
7014 * for those VSIs should be a power of 2 for RSS to work.
7015 * If LAN VSI is the only consumer for RSS then this requirement
7016 * is not necessary.
7017 */
7018 if (j == pf->rss_size)
7019 j = 0;
7020 /* lut = 4-byte sliding window of 4 lut entries */
7021 lut = (lut << 8) | (j &
7022 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7023 /* On i = 3, we have 4 entries in lut; write to the register */
7024 if ((i & 3) == 3)
7025 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7026 }
7027 i40e_flush(hw);
7028
7029 return 0;
7030 }
7031
7032 /**
7033 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7034 * @pf: board private structure
7035 * @queue_count: the requested queue count for rss.
7036 *
7037 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7038 * count which may be different from the requested queue count.
7039 **/
i40e_reconfig_rss_queues(struct i40e_pf * pf,int queue_count)7040 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7041 {
7042 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7043 return 0;
7044
7045 queue_count = min_t(int, queue_count, pf->rss_size_max);
7046
7047 if (queue_count != pf->rss_size) {
7048 i40e_prep_for_reset(pf);
7049
7050 pf->rss_size = queue_count;
7051
7052 i40e_reset_and_rebuild(pf, true);
7053 i40e_config_rss(pf);
7054 }
7055 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7056 return pf->rss_size;
7057 }
7058
7059 /**
7060 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7061 * @pf: board private structure to initialize
7062 *
7063 * i40e_sw_init initializes the Adapter private data structure.
7064 * Fields are initialized based on PCI device information and
7065 * OS network device settings (MTU size).
7066 **/
i40e_sw_init(struct i40e_pf * pf)7067 static int i40e_sw_init(struct i40e_pf *pf)
7068 {
7069 int err = 0;
7070 int size;
7071
7072 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7073 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7074 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7075 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7076 if (I40E_DEBUG_USER & debug)
7077 pf->hw.debug_mask = debug;
7078 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7079 I40E_DEFAULT_MSG_ENABLE);
7080 }
7081
7082 /* Set default capability flags */
7083 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7084 I40E_FLAG_MSI_ENABLED |
7085 I40E_FLAG_MSIX_ENABLED |
7086 I40E_FLAG_RX_1BUF_ENABLED;
7087
7088 /* Set default ITR */
7089 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7090 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7091
7092 /* Depending on PF configurations, it is possible that the RSS
7093 * maximum might end up larger than the available queues
7094 */
7095 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7096 pf->rss_size = 1;
7097 pf->rss_size_max = min_t(int, pf->rss_size_max,
7098 pf->hw.func_caps.num_tx_qp);
7099 if (pf->hw.func_caps.rss) {
7100 pf->flags |= I40E_FLAG_RSS_ENABLED;
7101 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7102 }
7103
7104 /* MFP mode enabled */
7105 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7106 pf->flags |= I40E_FLAG_MFP_ENABLED;
7107 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7108 }
7109
7110 /* FW/NVM is not yet fixed in this regard */
7111 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7112 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7113 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7114 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7115 /* Setup a counter for fd_atr per pf */
7116 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7117 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7118 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7119 /* Setup a counter for fd_sb per pf */
7120 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7121 } else {
7122 dev_info(&pf->pdev->dev,
7123 "Flow Director Sideband mode Disabled in MFP mode\n");
7124 }
7125 pf->fdir_pf_filter_count =
7126 pf->hw.func_caps.fd_filters_guaranteed;
7127 pf->hw.fdir_shared_filter_count =
7128 pf->hw.func_caps.fd_filters_best_effort;
7129 }
7130
7131 if (pf->hw.func_caps.vmdq) {
7132 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7133 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7134 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7135 }
7136
7137 #ifdef I40E_FCOE
7138 err = i40e_init_pf_fcoe(pf);
7139 if (err)
7140 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7141
7142 #endif /* I40E_FCOE */
7143 #ifdef CONFIG_PCI_IOV
7144 if (pf->hw.func_caps.num_vfs) {
7145 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7146 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7147 pf->num_req_vfs = min_t(int,
7148 pf->hw.func_caps.num_vfs,
7149 I40E_MAX_VF_COUNT);
7150 }
7151 #endif /* CONFIG_PCI_IOV */
7152 pf->eeprom_version = 0xDEAD;
7153 pf->lan_veb = I40E_NO_VEB;
7154 pf->lan_vsi = I40E_NO_VSI;
7155
7156 /* set up queue assignment tracking */
7157 size = sizeof(struct i40e_lump_tracking)
7158 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7159 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7160 if (!pf->qp_pile) {
7161 err = -ENOMEM;
7162 goto sw_init_done;
7163 }
7164 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7165 pf->qp_pile->search_hint = 0;
7166
7167 /* set up vector assignment tracking */
7168 size = sizeof(struct i40e_lump_tracking)
7169 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
7170 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7171 if (!pf->irq_pile) {
7172 kfree(pf->qp_pile);
7173 err = -ENOMEM;
7174 goto sw_init_done;
7175 }
7176 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
7177 pf->irq_pile->search_hint = 0;
7178
7179 pf->tx_timeout_recovery_level = 1;
7180
7181 mutex_init(&pf->switch_mutex);
7182
7183 sw_init_done:
7184 return err;
7185 }
7186
7187 /**
7188 * i40e_set_ntuple - set the ntuple feature flag and take action
7189 * @pf: board private structure to initialize
7190 * @features: the feature set that the stack is suggesting
7191 *
7192 * returns a bool to indicate if reset needs to happen
7193 **/
i40e_set_ntuple(struct i40e_pf * pf,netdev_features_t features)7194 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7195 {
7196 bool need_reset = false;
7197
7198 /* Check if Flow Director n-tuple support was enabled or disabled. If
7199 * the state changed, we need to reset.
7200 */
7201 if (features & NETIF_F_NTUPLE) {
7202 /* Enable filters and mark for reset */
7203 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7204 need_reset = true;
7205 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7206 } else {
7207 /* turn off filters, mark for reset and clear SW filter list */
7208 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7209 need_reset = true;
7210 i40e_fdir_filter_exit(pf);
7211 }
7212 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7213 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7214 /* reset fd counters */
7215 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7216 pf->fdir_pf_active_filters = 0;
7217 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7218 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7219 /* if ATR was auto disabled it can be re-enabled. */
7220 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7221 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7222 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7223 }
7224 return need_reset;
7225 }
7226
7227 /**
7228 * i40e_set_features - set the netdev feature flags
7229 * @netdev: ptr to the netdev being adjusted
7230 * @features: the feature set that the stack is suggesting
7231 **/
i40e_set_features(struct net_device * netdev,netdev_features_t features)7232 static int i40e_set_features(struct net_device *netdev,
7233 netdev_features_t features)
7234 {
7235 struct i40e_netdev_priv *np = netdev_priv(netdev);
7236 struct i40e_vsi *vsi = np->vsi;
7237 struct i40e_pf *pf = vsi->back;
7238 bool need_reset;
7239
7240 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7241 i40e_vlan_stripping_enable(vsi);
7242 else
7243 i40e_vlan_stripping_disable(vsi);
7244
7245 need_reset = i40e_set_ntuple(pf, features);
7246
7247 if (need_reset)
7248 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7249
7250 return 0;
7251 }
7252
7253 #ifdef CONFIG_I40E_VXLAN
7254 /**
7255 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7256 * @pf: board private structure
7257 * @port: The UDP port to look up
7258 *
7259 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7260 **/
i40e_get_vxlan_port_idx(struct i40e_pf * pf,__be16 port)7261 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7262 {
7263 u8 i;
7264
7265 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7266 if (pf->vxlan_ports[i] == port)
7267 return i;
7268 }
7269
7270 return i;
7271 }
7272
7273 /**
7274 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7275 * @netdev: This physical port's netdev
7276 * @sa_family: Socket Family that VXLAN is notifying us about
7277 * @port: New UDP port number that VXLAN started listening to
7278 **/
i40e_add_vxlan_port(struct net_device * netdev,sa_family_t sa_family,__be16 port)7279 static void i40e_add_vxlan_port(struct net_device *netdev,
7280 sa_family_t sa_family, __be16 port)
7281 {
7282 struct i40e_netdev_priv *np = netdev_priv(netdev);
7283 struct i40e_vsi *vsi = np->vsi;
7284 struct i40e_pf *pf = vsi->back;
7285 u8 next_idx;
7286 u8 idx;
7287
7288 if (sa_family == AF_INET6)
7289 return;
7290
7291 idx = i40e_get_vxlan_port_idx(pf, port);
7292
7293 /* Check if port already exists */
7294 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7295 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7296 return;
7297 }
7298
7299 /* Now check if there is space to add the new port */
7300 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7301
7302 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7303 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7304 ntohs(port));
7305 return;
7306 }
7307
7308 /* New port: add it and mark its index in the bitmap */
7309 pf->vxlan_ports[next_idx] = port;
7310 pf->pending_vxlan_bitmap |= (1 << next_idx);
7311
7312 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7313 }
7314
7315 /**
7316 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7317 * @netdev: This physical port's netdev
7318 * @sa_family: Socket Family that VXLAN is notifying us about
7319 * @port: UDP port number that VXLAN stopped listening to
7320 **/
i40e_del_vxlan_port(struct net_device * netdev,sa_family_t sa_family,__be16 port)7321 static void i40e_del_vxlan_port(struct net_device *netdev,
7322 sa_family_t sa_family, __be16 port)
7323 {
7324 struct i40e_netdev_priv *np = netdev_priv(netdev);
7325 struct i40e_vsi *vsi = np->vsi;
7326 struct i40e_pf *pf = vsi->back;
7327 u8 idx;
7328
7329 if (sa_family == AF_INET6)
7330 return;
7331
7332 idx = i40e_get_vxlan_port_idx(pf, port);
7333
7334 /* Check if port already exists */
7335 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7336 /* if port exists, set it to 0 (mark for deletion)
7337 * and make it pending
7338 */
7339 pf->vxlan_ports[idx] = 0;
7340
7341 pf->pending_vxlan_bitmap |= (1 << idx);
7342
7343 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7344 } else {
7345 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7346 ntohs(port));
7347 }
7348 }
7349
7350 #endif
i40e_get_phys_port_id(struct net_device * netdev,struct netdev_phys_port_id * ppid)7351 static int i40e_get_phys_port_id(struct net_device *netdev,
7352 struct netdev_phys_port_id *ppid)
7353 {
7354 struct i40e_netdev_priv *np = netdev_priv(netdev);
7355 struct i40e_pf *pf = np->vsi->back;
7356 struct i40e_hw *hw = &pf->hw;
7357
7358 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7359 return -EOPNOTSUPP;
7360
7361 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7362 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7363
7364 return 0;
7365 }
7366
7367 #ifdef HAVE_FDB_OPS
7368 #ifdef USE_CONST_DEV_UC_CHAR
i40e_ndo_fdb_add(struct ndmsg * ndm,struct nlattr * tb[],struct net_device * dev,const unsigned char * addr,u16 flags)7369 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7370 struct net_device *dev,
7371 const unsigned char *addr,
7372 u16 flags)
7373 #else
7374 static int i40e_ndo_fdb_add(struct ndmsg *ndm,
7375 struct net_device *dev,
7376 unsigned char *addr,
7377 u16 flags)
7378 #endif
7379 {
7380 struct i40e_netdev_priv *np = netdev_priv(dev);
7381 struct i40e_pf *pf = np->vsi->back;
7382 int err = 0;
7383
7384 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7385 return -EOPNOTSUPP;
7386
7387 /* Hardware does not support aging addresses so if a
7388 * ndm_state is given only allow permanent addresses
7389 */
7390 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7391 netdev_info(dev, "FDB only supports static addresses\n");
7392 return -EINVAL;
7393 }
7394
7395 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7396 err = dev_uc_add_excl(dev, addr);
7397 else if (is_multicast_ether_addr(addr))
7398 err = dev_mc_add_excl(dev, addr);
7399 else
7400 err = -EINVAL;
7401
7402 /* Only return duplicate errors if NLM_F_EXCL is set */
7403 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7404 err = 0;
7405
7406 return err;
7407 }
7408
7409 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7410 #ifdef USE_CONST_DEV_UC_CHAR
i40e_ndo_fdb_del(struct ndmsg * ndm,struct net_device * dev,const unsigned char * addr)7411 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7412 struct net_device *dev,
7413 const unsigned char *addr)
7414 #else
7415 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7416 struct net_device *dev,
7417 unsigned char *addr)
7418 #endif
7419 {
7420 struct i40e_netdev_priv *np = netdev_priv(dev);
7421 struct i40e_pf *pf = np->vsi->back;
7422 int err = -EOPNOTSUPP;
7423
7424 if (ndm->ndm_state & NUD_PERMANENT) {
7425 netdev_info(dev, "FDB only supports static addresses\n");
7426 return -EINVAL;
7427 }
7428
7429 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7430 if (is_unicast_ether_addr(addr))
7431 err = dev_uc_del(dev, addr);
7432 else if (is_multicast_ether_addr(addr))
7433 err = dev_mc_del(dev, addr);
7434 else
7435 err = -EINVAL;
7436 }
7437
7438 return err;
7439 }
7440
i40e_ndo_fdb_dump(struct sk_buff * skb,struct netlink_callback * cb,struct net_device * dev,struct net_device * filter_dev,int idx)7441 static int i40e_ndo_fdb_dump(struct sk_buff *skb,
7442 struct netlink_callback *cb,
7443 struct net_device *dev,
7444 struct net_device *filter_dev,
7445 int idx)
7446 {
7447 struct i40e_netdev_priv *np = netdev_priv(dev);
7448 struct i40e_pf *pf = np->vsi->back;
7449
7450 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
7451 idx = ndo_dflt_fdb_dump(skb, cb, dev, filter_dev, idx);
7452
7453 return idx;
7454 }
7455
7456 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
7457 #endif /* HAVE_FDB_OPS */
7458 static const struct net_device_ops i40e_netdev_ops = {
7459 .ndo_open = i40e_open,
7460 .ndo_stop = i40e_close,
7461 .ndo_start_xmit = i40e_lan_xmit_frame,
7462 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7463 .ndo_set_rx_mode = i40e_set_rx_mode,
7464 .ndo_validate_addr = eth_validate_addr,
7465 .ndo_set_mac_address = i40e_set_mac,
7466 .ndo_change_mtu = i40e_change_mtu,
7467 .ndo_do_ioctl = i40e_ioctl,
7468 .ndo_tx_timeout = i40e_tx_timeout,
7469 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7470 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7471 #ifdef CONFIG_NET_POLL_CONTROLLER
7472 .ndo_poll_controller = i40e_netpoll,
7473 #endif
7474 .ndo_setup_tc = i40e_setup_tc,
7475 #ifdef I40E_FCOE
7476 .ndo_fcoe_enable = i40e_fcoe_enable,
7477 .ndo_fcoe_disable = i40e_fcoe_disable,
7478 #endif
7479 .ndo_set_features = i40e_set_features,
7480 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7481 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7482 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7483 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7484 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7485 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7486 #ifdef CONFIG_I40E_VXLAN
7487 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7488 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7489 #endif
7490 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7491 #ifdef HAVE_FDB_OPS
7492 .ndo_fdb_add = i40e_ndo_fdb_add,
7493 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7494 .ndo_fdb_del = i40e_ndo_fdb_del,
7495 .ndo_fdb_dump = i40e_ndo_fdb_dump,
7496 #endif
7497 #endif
7498 };
7499
7500 /**
7501 * i40e_config_netdev - Setup the netdev flags
7502 * @vsi: the VSI being configured
7503 *
7504 * Returns 0 on success, negative value on failure
7505 **/
i40e_config_netdev(struct i40e_vsi * vsi)7506 static int i40e_config_netdev(struct i40e_vsi *vsi)
7507 {
7508 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7509 struct i40e_pf *pf = vsi->back;
7510 struct i40e_hw *hw = &pf->hw;
7511 struct i40e_netdev_priv *np;
7512 struct net_device *netdev;
7513 u8 mac_addr[ETH_ALEN];
7514 int etherdev_size;
7515
7516 etherdev_size = sizeof(struct i40e_netdev_priv);
7517 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7518 if (!netdev)
7519 return -ENOMEM;
7520
7521 vsi->netdev = netdev;
7522 np = netdev_priv(netdev);
7523 np->vsi = vsi;
7524
7525 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7526 NETIF_F_GSO_UDP_TUNNEL |
7527 NETIF_F_TSO;
7528
7529 netdev->features = NETIF_F_SG |
7530 NETIF_F_IP_CSUM |
7531 NETIF_F_SCTP_CSUM |
7532 NETIF_F_HIGHDMA |
7533 NETIF_F_GSO_UDP_TUNNEL |
7534 NETIF_F_HW_VLAN_CTAG_TX |
7535 NETIF_F_HW_VLAN_CTAG_RX |
7536 NETIF_F_HW_VLAN_CTAG_FILTER |
7537 NETIF_F_IPV6_CSUM |
7538 NETIF_F_TSO |
7539 NETIF_F_TSO_ECN |
7540 NETIF_F_TSO6 |
7541 NETIF_F_RXCSUM |
7542 NETIF_F_RXHASH |
7543 0;
7544
7545 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7546 netdev->features |= NETIF_F_NTUPLE;
7547
7548 /* copy netdev features into list of user selectable features */
7549 netdev->hw_features |= netdev->features;
7550
7551 if (vsi->type == I40E_VSI_MAIN) {
7552 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7553 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7554 /* The following steps are necessary to prevent reception
7555 * of tagged packets - some older NVM configurations load a
7556 * default a MAC-VLAN filter that accepts any tagged packet
7557 * which must be replaced by a normal filter.
7558 */
7559 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
7560 i40e_add_filter(vsi, mac_addr,
7561 I40E_VLAN_ANY, false, true);
7562 } else {
7563 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7564 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7565 pf->vsi[pf->lan_vsi]->netdev->name);
7566 random_ether_addr(mac_addr);
7567 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7568 }
7569 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7570
7571 ether_addr_copy(netdev->dev_addr, mac_addr);
7572 ether_addr_copy(netdev->perm_addr, mac_addr);
7573 /* vlan gets same features (except vlan offload)
7574 * after any tweaks for specific VSI types
7575 */
7576 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7577 NETIF_F_HW_VLAN_CTAG_RX |
7578 NETIF_F_HW_VLAN_CTAG_FILTER);
7579 netdev->priv_flags |= IFF_UNICAST_FLT;
7580 netdev->priv_flags |= IFF_SUPP_NOFCS;
7581 /* Setup netdev TC information */
7582 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7583
7584 netdev->netdev_ops = &i40e_netdev_ops;
7585 netdev->watchdog_timeo = 5 * HZ;
7586 i40e_set_ethtool_ops(netdev);
7587 #ifdef I40E_FCOE
7588 i40e_fcoe_config_netdev(netdev, vsi);
7589 #endif
7590
7591 return 0;
7592 }
7593
7594 /**
7595 * i40e_vsi_delete - Delete a VSI from the switch
7596 * @vsi: the VSI being removed
7597 *
7598 * Returns 0 on success, negative value on failure
7599 **/
i40e_vsi_delete(struct i40e_vsi * vsi)7600 static void i40e_vsi_delete(struct i40e_vsi *vsi)
7601 {
7602 /* remove default VSI is not allowed */
7603 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
7604 return;
7605
7606 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
7607 }
7608
7609 /**
7610 * i40e_add_vsi - Add a VSI to the switch
7611 * @vsi: the VSI being configured
7612 *
7613 * This initializes a VSI context depending on the VSI type to be added and
7614 * passes it down to the add_vsi aq command.
7615 **/
i40e_add_vsi(struct i40e_vsi * vsi)7616 static int i40e_add_vsi(struct i40e_vsi *vsi)
7617 {
7618 int ret = -ENODEV;
7619 struct i40e_mac_filter *f, *ftmp;
7620 struct i40e_pf *pf = vsi->back;
7621 struct i40e_hw *hw = &pf->hw;
7622 struct i40e_vsi_context ctxt;
7623 u8 enabled_tc = 0x1; /* TC0 enabled */
7624 int f_count = 0;
7625
7626 memset(&ctxt, 0, sizeof(ctxt));
7627 switch (vsi->type) {
7628 case I40E_VSI_MAIN:
7629 /* The PF's main VSI is already setup as part of the
7630 * device initialization, so we'll not bother with
7631 * the add_vsi call, but we will retrieve the current
7632 * VSI context.
7633 */
7634 ctxt.seid = pf->main_vsi_seid;
7635 ctxt.pf_num = pf->hw.pf_id;
7636 ctxt.vf_num = 0;
7637 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
7638 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7639 if (ret) {
7640 dev_info(&pf->pdev->dev,
7641 "couldn't get pf vsi config, err %d, aq_err %d\n",
7642 ret, pf->hw.aq.asq_last_status);
7643 return -ENOENT;
7644 }
7645 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7646 vsi->info.valid_sections = 0;
7647
7648 vsi->seid = ctxt.seid;
7649 vsi->id = ctxt.vsi_number;
7650
7651 enabled_tc = i40e_pf_get_tc_map(pf);
7652
7653 /* MFP mode setup queue map and update VSI */
7654 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7655 memset(&ctxt, 0, sizeof(ctxt));
7656 ctxt.seid = pf->main_vsi_seid;
7657 ctxt.pf_num = pf->hw.pf_id;
7658 ctxt.vf_num = 0;
7659 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
7660 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7661 if (ret) {
7662 dev_info(&pf->pdev->dev,
7663 "update vsi failed, aq_err=%d\n",
7664 pf->hw.aq.asq_last_status);
7665 ret = -ENOENT;
7666 goto err;
7667 }
7668 /* update the local VSI info queue map */
7669 i40e_vsi_update_queue_map(vsi, &ctxt);
7670 vsi->info.valid_sections = 0;
7671 } else {
7672 /* Default/Main VSI is only enabled for TC0
7673 * reconfigure it to enable all TCs that are
7674 * available on the port in SFP mode.
7675 */
7676 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7677 if (ret) {
7678 dev_info(&pf->pdev->dev,
7679 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
7680 enabled_tc, ret,
7681 pf->hw.aq.asq_last_status);
7682 ret = -ENOENT;
7683 }
7684 }
7685 break;
7686
7687 case I40E_VSI_FDIR:
7688 ctxt.pf_num = hw->pf_id;
7689 ctxt.vf_num = 0;
7690 ctxt.uplink_seid = vsi->uplink_seid;
7691 ctxt.connection_type = 0x1; /* regular data port */
7692 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7693 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7694 break;
7695
7696 case I40E_VSI_VMDQ2:
7697 ctxt.pf_num = hw->pf_id;
7698 ctxt.vf_num = 0;
7699 ctxt.uplink_seid = vsi->uplink_seid;
7700 ctxt.connection_type = 0x1; /* regular data port */
7701 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
7702
7703 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7704
7705 /* This VSI is connected to VEB so the switch_id
7706 * should be set to zero by default.
7707 */
7708 ctxt.info.switch_id = 0;
7709 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7710
7711 /* Setup the VSI tx/rx queue map for TC0 only for now */
7712 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7713 break;
7714
7715 case I40E_VSI_SRIOV:
7716 ctxt.pf_num = hw->pf_id;
7717 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
7718 ctxt.uplink_seid = vsi->uplink_seid;
7719 ctxt.connection_type = 0x1; /* regular data port */
7720 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
7721
7722 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7723
7724 /* This VSI is connected to VEB so the switch_id
7725 * should be set to zero by default.
7726 */
7727 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7728
7729 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
7730 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7731 if (pf->vf[vsi->vf_id].spoofchk) {
7732 ctxt.info.valid_sections |=
7733 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7734 ctxt.info.sec_flags |=
7735 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7736 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7737 }
7738 /* Setup the VSI tx/rx queue map for TC0 only for now */
7739 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7740 break;
7741
7742 #ifdef I40E_FCOE
7743 case I40E_VSI_FCOE:
7744 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
7745 if (ret) {
7746 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
7747 return ret;
7748 }
7749 break;
7750
7751 #endif /* I40E_FCOE */
7752 default:
7753 return -ENODEV;
7754 }
7755
7756 if (vsi->type != I40E_VSI_MAIN) {
7757 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
7758 if (ret) {
7759 dev_info(&vsi->back->pdev->dev,
7760 "add vsi failed, aq_err=%d\n",
7761 vsi->back->hw.aq.asq_last_status);
7762 ret = -ENOENT;
7763 goto err;
7764 }
7765 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7766 vsi->info.valid_sections = 0;
7767 vsi->seid = ctxt.seid;
7768 vsi->id = ctxt.vsi_number;
7769 }
7770
7771 /* If macvlan filters already exist, force them to get loaded */
7772 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
7773 f->changed = true;
7774 f_count++;
7775
7776 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
7777 struct i40e_aqc_remove_macvlan_element_data element;
7778
7779 memset(&element, 0, sizeof(element));
7780 ether_addr_copy(element.mac_addr, f->macaddr);
7781 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7782 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
7783 &element, 1, NULL);
7784 if (ret) {
7785 /* some older FW has a different default */
7786 element.flags |=
7787 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
7788 i40e_aq_remove_macvlan(hw, vsi->seid,
7789 &element, 1, NULL);
7790 }
7791
7792 i40e_aq_mac_address_write(hw,
7793 I40E_AQC_WRITE_TYPE_LAA_WOL,
7794 f->macaddr, NULL);
7795 }
7796 }
7797 if (f_count) {
7798 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
7799 pf->flags |= I40E_FLAG_FILTER_SYNC;
7800 }
7801
7802 /* Update VSI BW information */
7803 ret = i40e_vsi_get_bw_info(vsi);
7804 if (ret) {
7805 dev_info(&pf->pdev->dev,
7806 "couldn't get vsi bw info, err %d, aq_err %d\n",
7807 ret, pf->hw.aq.asq_last_status);
7808 /* VSI is already added so not tearing that up */
7809 ret = 0;
7810 }
7811
7812 err:
7813 return ret;
7814 }
7815
7816 /**
7817 * i40e_vsi_release - Delete a VSI and free its resources
7818 * @vsi: the VSI being removed
7819 *
7820 * Returns 0 on success or < 0 on error
7821 **/
i40e_vsi_release(struct i40e_vsi * vsi)7822 int i40e_vsi_release(struct i40e_vsi *vsi)
7823 {
7824 struct i40e_mac_filter *f, *ftmp;
7825 struct i40e_veb *veb = NULL;
7826 struct i40e_pf *pf;
7827 u16 uplink_seid;
7828 int i, n;
7829
7830 pf = vsi->back;
7831
7832 /* release of a VEB-owner or last VSI is not allowed */
7833 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
7834 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
7835 vsi->seid, vsi->uplink_seid);
7836 return -ENODEV;
7837 }
7838 if (vsi == pf->vsi[pf->lan_vsi] &&
7839 !test_bit(__I40E_DOWN, &pf->state)) {
7840 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
7841 return -ENODEV;
7842 }
7843
7844 uplink_seid = vsi->uplink_seid;
7845 if (vsi->type != I40E_VSI_SRIOV) {
7846 if (vsi->netdev_registered) {
7847 vsi->netdev_registered = false;
7848 if (vsi->netdev) {
7849 /* results in a call to i40e_close() */
7850 unregister_netdev(vsi->netdev);
7851 }
7852 } else {
7853 i40e_vsi_close(vsi);
7854 }
7855 i40e_vsi_disable_irq(vsi);
7856 }
7857
7858 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
7859 i40e_del_filter(vsi, f->macaddr, f->vlan,
7860 f->is_vf, f->is_netdev);
7861 i40e_sync_vsi_filters(vsi);
7862
7863 i40e_vsi_delete(vsi);
7864 i40e_vsi_free_q_vectors(vsi);
7865 if (vsi->netdev) {
7866 free_netdev(vsi->netdev);
7867 vsi->netdev = NULL;
7868 }
7869 i40e_vsi_clear_rings(vsi);
7870 i40e_vsi_clear(vsi);
7871
7872 /* If this was the last thing on the VEB, except for the
7873 * controlling VSI, remove the VEB, which puts the controlling
7874 * VSI onto the next level down in the switch.
7875 *
7876 * Well, okay, there's one more exception here: don't remove
7877 * the orphan VEBs yet. We'll wait for an explicit remove request
7878 * from up the network stack.
7879 */
7880 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
7881 if (pf->vsi[i] &&
7882 pf->vsi[i]->uplink_seid == uplink_seid &&
7883 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7884 n++; /* count the VSIs */
7885 }
7886 }
7887 for (i = 0; i < I40E_MAX_VEB; i++) {
7888 if (!pf->veb[i])
7889 continue;
7890 if (pf->veb[i]->uplink_seid == uplink_seid)
7891 n++; /* count the VEBs */
7892 if (pf->veb[i]->seid == uplink_seid)
7893 veb = pf->veb[i];
7894 }
7895 if (n == 0 && veb && veb->uplink_seid != 0)
7896 i40e_veb_release(veb);
7897
7898 return 0;
7899 }
7900
7901 /**
7902 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7903 * @vsi: ptr to the VSI
7904 *
7905 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7906 * corresponding SW VSI structure and initializes num_queue_pairs for the
7907 * newly allocated VSI.
7908 *
7909 * Returns 0 on success or negative on failure
7910 **/
i40e_vsi_setup_vectors(struct i40e_vsi * vsi)7911 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7912 {
7913 int ret = -ENOENT;
7914 struct i40e_pf *pf = vsi->back;
7915
7916 if (vsi->q_vectors[0]) {
7917 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7918 vsi->seid);
7919 return -EEXIST;
7920 }
7921
7922 if (vsi->base_vector) {
7923 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7924 vsi->seid, vsi->base_vector);
7925 return -EEXIST;
7926 }
7927
7928 ret = i40e_vsi_alloc_q_vectors(vsi);
7929 if (ret) {
7930 dev_info(&pf->pdev->dev,
7931 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7932 vsi->num_q_vectors, vsi->seid, ret);
7933 vsi->num_q_vectors = 0;
7934 goto vector_setup_out;
7935 }
7936
7937 if (vsi->num_q_vectors)
7938 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7939 vsi->num_q_vectors, vsi->idx);
7940 if (vsi->base_vector < 0) {
7941 dev_info(&pf->pdev->dev,
7942 "failed to get queue tracking for VSI %d, err=%d\n",
7943 vsi->seid, vsi->base_vector);
7944 i40e_vsi_free_q_vectors(vsi);
7945 ret = -ENOENT;
7946 goto vector_setup_out;
7947 }
7948
7949 vector_setup_out:
7950 return ret;
7951 }
7952
7953 /**
7954 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7955 * @vsi: pointer to the vsi.
7956 *
7957 * This re-allocates a vsi's queue resources.
7958 *
7959 * Returns pointer to the successfully allocated and configured VSI sw struct
7960 * on success, otherwise returns NULL on failure.
7961 **/
i40e_vsi_reinit_setup(struct i40e_vsi * vsi)7962 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7963 {
7964 struct i40e_pf *pf = vsi->back;
7965 u8 enabled_tc;
7966 int ret;
7967
7968 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7969 i40e_vsi_clear_rings(vsi);
7970
7971 i40e_vsi_free_arrays(vsi, false);
7972 i40e_set_num_rings_in_vsi(vsi);
7973 ret = i40e_vsi_alloc_arrays(vsi, false);
7974 if (ret)
7975 goto err_vsi;
7976
7977 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7978 if (ret < 0) {
7979 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7980 vsi->seid, ret);
7981 goto err_vsi;
7982 }
7983 vsi->base_queue = ret;
7984
7985 /* Update the FW view of the VSI. Force a reset of TC and queue
7986 * layout configurations.
7987 */
7988 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7989 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7990 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7991 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7992
7993 /* assign it some queues */
7994 ret = i40e_alloc_rings(vsi);
7995 if (ret)
7996 goto err_rings;
7997
7998 /* map all of the rings to the q_vectors */
7999 i40e_vsi_map_rings_to_vectors(vsi);
8000 return vsi;
8001
8002 err_rings:
8003 i40e_vsi_free_q_vectors(vsi);
8004 if (vsi->netdev_registered) {
8005 vsi->netdev_registered = false;
8006 unregister_netdev(vsi->netdev);
8007 free_netdev(vsi->netdev);
8008 vsi->netdev = NULL;
8009 }
8010 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8011 err_vsi:
8012 i40e_vsi_clear(vsi);
8013 return NULL;
8014 }
8015
8016 /**
8017 * i40e_vsi_setup - Set up a VSI by a given type
8018 * @pf: board private structure
8019 * @type: VSI type
8020 * @uplink_seid: the switch element to link to
8021 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8022 *
8023 * This allocates the sw VSI structure and its queue resources, then add a VSI
8024 * to the identified VEB.
8025 *
8026 * Returns pointer to the successfully allocated and configure VSI sw struct on
8027 * success, otherwise returns NULL on failure.
8028 **/
i40e_vsi_setup(struct i40e_pf * pf,u8 type,u16 uplink_seid,u32 param1)8029 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8030 u16 uplink_seid, u32 param1)
8031 {
8032 struct i40e_vsi *vsi = NULL;
8033 struct i40e_veb *veb = NULL;
8034 int ret, i;
8035 int v_idx;
8036
8037 /* The requested uplink_seid must be either
8038 * - the PF's port seid
8039 * no VEB is needed because this is the PF
8040 * or this is a Flow Director special case VSI
8041 * - seid of an existing VEB
8042 * - seid of a VSI that owns an existing VEB
8043 * - seid of a VSI that doesn't own a VEB
8044 * a new VEB is created and the VSI becomes the owner
8045 * - seid of the PF VSI, which is what creates the first VEB
8046 * this is a special case of the previous
8047 *
8048 * Find which uplink_seid we were given and create a new VEB if needed
8049 */
8050 for (i = 0; i < I40E_MAX_VEB; i++) {
8051 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8052 veb = pf->veb[i];
8053 break;
8054 }
8055 }
8056
8057 if (!veb && uplink_seid != pf->mac_seid) {
8058
8059 for (i = 0; i < pf->num_alloc_vsi; i++) {
8060 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8061 vsi = pf->vsi[i];
8062 break;
8063 }
8064 }
8065 if (!vsi) {
8066 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8067 uplink_seid);
8068 return NULL;
8069 }
8070
8071 if (vsi->uplink_seid == pf->mac_seid)
8072 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8073 vsi->tc_config.enabled_tc);
8074 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8075 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8076 vsi->tc_config.enabled_tc);
8077
8078 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8079 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8080 veb = pf->veb[i];
8081 }
8082 if (!veb) {
8083 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8084 return NULL;
8085 }
8086
8087 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8088 uplink_seid = veb->seid;
8089 }
8090
8091 /* get vsi sw struct */
8092 v_idx = i40e_vsi_mem_alloc(pf, type);
8093 if (v_idx < 0)
8094 goto err_alloc;
8095 vsi = pf->vsi[v_idx];
8096 if (!vsi)
8097 goto err_alloc;
8098 vsi->type = type;
8099 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8100
8101 if (type == I40E_VSI_MAIN)
8102 pf->lan_vsi = v_idx;
8103 else if (type == I40E_VSI_SRIOV)
8104 vsi->vf_id = param1;
8105 /* assign it some queues */
8106 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8107 vsi->idx);
8108 if (ret < 0) {
8109 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
8110 vsi->seid, ret);
8111 goto err_vsi;
8112 }
8113 vsi->base_queue = ret;
8114
8115 /* get a VSI from the hardware */
8116 vsi->uplink_seid = uplink_seid;
8117 ret = i40e_add_vsi(vsi);
8118 if (ret)
8119 goto err_vsi;
8120
8121 switch (vsi->type) {
8122 /* setup the netdev if needed */
8123 case I40E_VSI_MAIN:
8124 case I40E_VSI_VMDQ2:
8125 case I40E_VSI_FCOE:
8126 ret = i40e_config_netdev(vsi);
8127 if (ret)
8128 goto err_netdev;
8129 ret = register_netdev(vsi->netdev);
8130 if (ret)
8131 goto err_netdev;
8132 vsi->netdev_registered = true;
8133 netif_carrier_off(vsi->netdev);
8134 #ifdef CONFIG_I40E_DCB
8135 /* Setup DCB netlink interface */
8136 i40e_dcbnl_setup(vsi);
8137 #endif /* CONFIG_I40E_DCB */
8138 /* fall through */
8139
8140 case I40E_VSI_FDIR:
8141 /* set up vectors and rings if needed */
8142 ret = i40e_vsi_setup_vectors(vsi);
8143 if (ret)
8144 goto err_msix;
8145
8146 ret = i40e_alloc_rings(vsi);
8147 if (ret)
8148 goto err_rings;
8149
8150 /* map all of the rings to the q_vectors */
8151 i40e_vsi_map_rings_to_vectors(vsi);
8152
8153 i40e_vsi_reset_stats(vsi);
8154 break;
8155
8156 default:
8157 /* no netdev or rings for the other VSI types */
8158 break;
8159 }
8160
8161 return vsi;
8162
8163 err_rings:
8164 i40e_vsi_free_q_vectors(vsi);
8165 err_msix:
8166 if (vsi->netdev_registered) {
8167 vsi->netdev_registered = false;
8168 unregister_netdev(vsi->netdev);
8169 free_netdev(vsi->netdev);
8170 vsi->netdev = NULL;
8171 }
8172 err_netdev:
8173 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8174 err_vsi:
8175 i40e_vsi_clear(vsi);
8176 err_alloc:
8177 return NULL;
8178 }
8179
8180 /**
8181 * i40e_veb_get_bw_info - Query VEB BW information
8182 * @veb: the veb to query
8183 *
8184 * Query the Tx scheduler BW configuration data for given VEB
8185 **/
i40e_veb_get_bw_info(struct i40e_veb * veb)8186 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8187 {
8188 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8189 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8190 struct i40e_pf *pf = veb->pf;
8191 struct i40e_hw *hw = &pf->hw;
8192 u32 tc_bw_max;
8193 int ret = 0;
8194 int i;
8195
8196 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8197 &bw_data, NULL);
8198 if (ret) {
8199 dev_info(&pf->pdev->dev,
8200 "query veb bw config failed, aq_err=%d\n",
8201 hw->aq.asq_last_status);
8202 goto out;
8203 }
8204
8205 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8206 &ets_data, NULL);
8207 if (ret) {
8208 dev_info(&pf->pdev->dev,
8209 "query veb bw ets config failed, aq_err=%d\n",
8210 hw->aq.asq_last_status);
8211 goto out;
8212 }
8213
8214 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8215 veb->bw_max_quanta = ets_data.tc_bw_max;
8216 veb->is_abs_credits = bw_data.absolute_credits_enable;
8217 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8218 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8219 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8220 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8221 veb->bw_tc_limit_credits[i] =
8222 le16_to_cpu(bw_data.tc_bw_limits[i]);
8223 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8224 }
8225
8226 out:
8227 return ret;
8228 }
8229
8230 /**
8231 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8232 * @pf: board private structure
8233 *
8234 * On error: returns error code (negative)
8235 * On success: returns vsi index in PF (positive)
8236 **/
i40e_veb_mem_alloc(struct i40e_pf * pf)8237 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8238 {
8239 int ret = -ENOENT;
8240 struct i40e_veb *veb;
8241 int i;
8242
8243 /* Need to protect the allocation of switch elements at the PF level */
8244 mutex_lock(&pf->switch_mutex);
8245
8246 /* VEB list may be fragmented if VEB creation/destruction has
8247 * been happening. We can afford to do a quick scan to look
8248 * for any free slots in the list.
8249 *
8250 * find next empty veb slot, looping back around if necessary
8251 */
8252 i = 0;
8253 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8254 i++;
8255 if (i >= I40E_MAX_VEB) {
8256 ret = -ENOMEM;
8257 goto err_alloc_veb; /* out of VEB slots! */
8258 }
8259
8260 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8261 if (!veb) {
8262 ret = -ENOMEM;
8263 goto err_alloc_veb;
8264 }
8265 veb->pf = pf;
8266 veb->idx = i;
8267 veb->enabled_tc = 1;
8268
8269 pf->veb[i] = veb;
8270 ret = i;
8271 err_alloc_veb:
8272 mutex_unlock(&pf->switch_mutex);
8273 return ret;
8274 }
8275
8276 /**
8277 * i40e_switch_branch_release - Delete a branch of the switch tree
8278 * @branch: where to start deleting
8279 *
8280 * This uses recursion to find the tips of the branch to be
8281 * removed, deleting until we get back to and can delete this VEB.
8282 **/
i40e_switch_branch_release(struct i40e_veb * branch)8283 static void i40e_switch_branch_release(struct i40e_veb *branch)
8284 {
8285 struct i40e_pf *pf = branch->pf;
8286 u16 branch_seid = branch->seid;
8287 u16 veb_idx = branch->idx;
8288 int i;
8289
8290 /* release any VEBs on this VEB - RECURSION */
8291 for (i = 0; i < I40E_MAX_VEB; i++) {
8292 if (!pf->veb[i])
8293 continue;
8294 if (pf->veb[i]->uplink_seid == branch->seid)
8295 i40e_switch_branch_release(pf->veb[i]);
8296 }
8297
8298 /* Release the VSIs on this VEB, but not the owner VSI.
8299 *
8300 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8301 * the VEB itself, so don't use (*branch) after this loop.
8302 */
8303 for (i = 0; i < pf->num_alloc_vsi; i++) {
8304 if (!pf->vsi[i])
8305 continue;
8306 if (pf->vsi[i]->uplink_seid == branch_seid &&
8307 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8308 i40e_vsi_release(pf->vsi[i]);
8309 }
8310 }
8311
8312 /* There's one corner case where the VEB might not have been
8313 * removed, so double check it here and remove it if needed.
8314 * This case happens if the veb was created from the debugfs
8315 * commands and no VSIs were added to it.
8316 */
8317 if (pf->veb[veb_idx])
8318 i40e_veb_release(pf->veb[veb_idx]);
8319 }
8320
8321 /**
8322 * i40e_veb_clear - remove veb struct
8323 * @veb: the veb to remove
8324 **/
i40e_veb_clear(struct i40e_veb * veb)8325 static void i40e_veb_clear(struct i40e_veb *veb)
8326 {
8327 if (!veb)
8328 return;
8329
8330 if (veb->pf) {
8331 struct i40e_pf *pf = veb->pf;
8332
8333 mutex_lock(&pf->switch_mutex);
8334 if (pf->veb[veb->idx] == veb)
8335 pf->veb[veb->idx] = NULL;
8336 mutex_unlock(&pf->switch_mutex);
8337 }
8338
8339 kfree(veb);
8340 }
8341
8342 /**
8343 * i40e_veb_release - Delete a VEB and free its resources
8344 * @veb: the VEB being removed
8345 **/
i40e_veb_release(struct i40e_veb * veb)8346 void i40e_veb_release(struct i40e_veb *veb)
8347 {
8348 struct i40e_vsi *vsi = NULL;
8349 struct i40e_pf *pf;
8350 int i, n = 0;
8351
8352 pf = veb->pf;
8353
8354 /* find the remaining VSI and check for extras */
8355 for (i = 0; i < pf->num_alloc_vsi; i++) {
8356 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8357 n++;
8358 vsi = pf->vsi[i];
8359 }
8360 }
8361 if (n != 1) {
8362 dev_info(&pf->pdev->dev,
8363 "can't remove VEB %d with %d VSIs left\n",
8364 veb->seid, n);
8365 return;
8366 }
8367
8368 /* move the remaining VSI to uplink veb */
8369 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8370 if (veb->uplink_seid) {
8371 vsi->uplink_seid = veb->uplink_seid;
8372 if (veb->uplink_seid == pf->mac_seid)
8373 vsi->veb_idx = I40E_NO_VEB;
8374 else
8375 vsi->veb_idx = veb->veb_idx;
8376 } else {
8377 /* floating VEB */
8378 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8379 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8380 }
8381
8382 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8383 i40e_veb_clear(veb);
8384 }
8385
8386 /**
8387 * i40e_add_veb - create the VEB in the switch
8388 * @veb: the VEB to be instantiated
8389 * @vsi: the controlling VSI
8390 **/
i40e_add_veb(struct i40e_veb * veb,struct i40e_vsi * vsi)8391 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8392 {
8393 bool is_default = false;
8394 bool is_cloud = false;
8395 int ret;
8396
8397 /* get a VEB from the hardware */
8398 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8399 veb->enabled_tc, is_default,
8400 is_cloud, &veb->seid, NULL);
8401 if (ret) {
8402 dev_info(&veb->pf->pdev->dev,
8403 "couldn't add VEB, err %d, aq_err %d\n",
8404 ret, veb->pf->hw.aq.asq_last_status);
8405 return -EPERM;
8406 }
8407
8408 /* get statistics counter */
8409 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8410 &veb->stats_idx, NULL, NULL, NULL);
8411 if (ret) {
8412 dev_info(&veb->pf->pdev->dev,
8413 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8414 ret, veb->pf->hw.aq.asq_last_status);
8415 return -EPERM;
8416 }
8417 ret = i40e_veb_get_bw_info(veb);
8418 if (ret) {
8419 dev_info(&veb->pf->pdev->dev,
8420 "couldn't get VEB bw info, err %d, aq_err %d\n",
8421 ret, veb->pf->hw.aq.asq_last_status);
8422 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8423 return -ENOENT;
8424 }
8425
8426 vsi->uplink_seid = veb->seid;
8427 vsi->veb_idx = veb->idx;
8428 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8429
8430 return 0;
8431 }
8432
8433 /**
8434 * i40e_veb_setup - Set up a VEB
8435 * @pf: board private structure
8436 * @flags: VEB setup flags
8437 * @uplink_seid: the switch element to link to
8438 * @vsi_seid: the initial VSI seid
8439 * @enabled_tc: Enabled TC bit-map
8440 *
8441 * This allocates the sw VEB structure and links it into the switch
8442 * It is possible and legal for this to be a duplicate of an already
8443 * existing VEB. It is also possible for both uplink and vsi seids
8444 * to be zero, in order to create a floating VEB.
8445 *
8446 * Returns pointer to the successfully allocated VEB sw struct on
8447 * success, otherwise returns NULL on failure.
8448 **/
i40e_veb_setup(struct i40e_pf * pf,u16 flags,u16 uplink_seid,u16 vsi_seid,u8 enabled_tc)8449 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8450 u16 uplink_seid, u16 vsi_seid,
8451 u8 enabled_tc)
8452 {
8453 struct i40e_veb *veb, *uplink_veb = NULL;
8454 int vsi_idx, veb_idx;
8455 int ret;
8456
8457 /* if one seid is 0, the other must be 0 to create a floating relay */
8458 if ((uplink_seid == 0 || vsi_seid == 0) &&
8459 (uplink_seid + vsi_seid != 0)) {
8460 dev_info(&pf->pdev->dev,
8461 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8462 uplink_seid, vsi_seid);
8463 return NULL;
8464 }
8465
8466 /* make sure there is such a vsi and uplink */
8467 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8468 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8469 break;
8470 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8471 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8472 vsi_seid);
8473 return NULL;
8474 }
8475
8476 if (uplink_seid && uplink_seid != pf->mac_seid) {
8477 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8478 if (pf->veb[veb_idx] &&
8479 pf->veb[veb_idx]->seid == uplink_seid) {
8480 uplink_veb = pf->veb[veb_idx];
8481 break;
8482 }
8483 }
8484 if (!uplink_veb) {
8485 dev_info(&pf->pdev->dev,
8486 "uplink seid %d not found\n", uplink_seid);
8487 return NULL;
8488 }
8489 }
8490
8491 /* get veb sw struct */
8492 veb_idx = i40e_veb_mem_alloc(pf);
8493 if (veb_idx < 0)
8494 goto err_alloc;
8495 veb = pf->veb[veb_idx];
8496 veb->flags = flags;
8497 veb->uplink_seid = uplink_seid;
8498 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8499 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8500
8501 /* create the VEB in the switch */
8502 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8503 if (ret)
8504 goto err_veb;
8505 if (vsi_idx == pf->lan_vsi)
8506 pf->lan_veb = veb->idx;
8507
8508 return veb;
8509
8510 err_veb:
8511 i40e_veb_clear(veb);
8512 err_alloc:
8513 return NULL;
8514 }
8515
8516 /**
8517 * i40e_setup_pf_switch_element - set pf vars based on switch type
8518 * @pf: board private structure
8519 * @ele: element we are building info from
8520 * @num_reported: total number of elements
8521 * @printconfig: should we print the contents
8522 *
8523 * helper function to assist in extracting a few useful SEID values.
8524 **/
i40e_setup_pf_switch_element(struct i40e_pf * pf,struct i40e_aqc_switch_config_element_resp * ele,u16 num_reported,bool printconfig)8525 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8526 struct i40e_aqc_switch_config_element_resp *ele,
8527 u16 num_reported, bool printconfig)
8528 {
8529 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8530 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8531 u8 element_type = ele->element_type;
8532 u16 seid = le16_to_cpu(ele->seid);
8533
8534 if (printconfig)
8535 dev_info(&pf->pdev->dev,
8536 "type=%d seid=%d uplink=%d downlink=%d\n",
8537 element_type, seid, uplink_seid, downlink_seid);
8538
8539 switch (element_type) {
8540 case I40E_SWITCH_ELEMENT_TYPE_MAC:
8541 pf->mac_seid = seid;
8542 break;
8543 case I40E_SWITCH_ELEMENT_TYPE_VEB:
8544 /* Main VEB? */
8545 if (uplink_seid != pf->mac_seid)
8546 break;
8547 if (pf->lan_veb == I40E_NO_VEB) {
8548 int v;
8549
8550 /* find existing or else empty VEB */
8551 for (v = 0; v < I40E_MAX_VEB; v++) {
8552 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
8553 pf->lan_veb = v;
8554 break;
8555 }
8556 }
8557 if (pf->lan_veb == I40E_NO_VEB) {
8558 v = i40e_veb_mem_alloc(pf);
8559 if (v < 0)
8560 break;
8561 pf->lan_veb = v;
8562 }
8563 }
8564
8565 pf->veb[pf->lan_veb]->seid = seid;
8566 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
8567 pf->veb[pf->lan_veb]->pf = pf;
8568 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
8569 break;
8570 case I40E_SWITCH_ELEMENT_TYPE_VSI:
8571 if (num_reported != 1)
8572 break;
8573 /* This is immediately after a reset so we can assume this is
8574 * the PF's VSI
8575 */
8576 pf->mac_seid = uplink_seid;
8577 pf->pf_seid = downlink_seid;
8578 pf->main_vsi_seid = seid;
8579 if (printconfig)
8580 dev_info(&pf->pdev->dev,
8581 "pf_seid=%d main_vsi_seid=%d\n",
8582 pf->pf_seid, pf->main_vsi_seid);
8583 break;
8584 case I40E_SWITCH_ELEMENT_TYPE_PF:
8585 case I40E_SWITCH_ELEMENT_TYPE_VF:
8586 case I40E_SWITCH_ELEMENT_TYPE_EMP:
8587 case I40E_SWITCH_ELEMENT_TYPE_BMC:
8588 case I40E_SWITCH_ELEMENT_TYPE_PE:
8589 case I40E_SWITCH_ELEMENT_TYPE_PA:
8590 /* ignore these for now */
8591 break;
8592 default:
8593 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
8594 element_type, seid);
8595 break;
8596 }
8597 }
8598
8599 /**
8600 * i40e_fetch_switch_configuration - Get switch config from firmware
8601 * @pf: board private structure
8602 * @printconfig: should we print the contents
8603 *
8604 * Get the current switch configuration from the device and
8605 * extract a few useful SEID values.
8606 **/
i40e_fetch_switch_configuration(struct i40e_pf * pf,bool printconfig)8607 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
8608 {
8609 struct i40e_aqc_get_switch_config_resp *sw_config;
8610 u16 next_seid = 0;
8611 int ret = 0;
8612 u8 *aq_buf;
8613 int i;
8614
8615 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
8616 if (!aq_buf)
8617 return -ENOMEM;
8618
8619 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
8620 do {
8621 u16 num_reported, num_total;
8622
8623 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
8624 I40E_AQ_LARGE_BUF,
8625 &next_seid, NULL);
8626 if (ret) {
8627 dev_info(&pf->pdev->dev,
8628 "get switch config failed %d aq_err=%x\n",
8629 ret, pf->hw.aq.asq_last_status);
8630 kfree(aq_buf);
8631 return -ENOENT;
8632 }
8633
8634 num_reported = le16_to_cpu(sw_config->header.num_reported);
8635 num_total = le16_to_cpu(sw_config->header.num_total);
8636
8637 if (printconfig)
8638 dev_info(&pf->pdev->dev,
8639 "header: %d reported %d total\n",
8640 num_reported, num_total);
8641
8642 for (i = 0; i < num_reported; i++) {
8643 struct i40e_aqc_switch_config_element_resp *ele =
8644 &sw_config->element[i];
8645
8646 i40e_setup_pf_switch_element(pf, ele, num_reported,
8647 printconfig);
8648 }
8649 } while (next_seid != 0);
8650
8651 kfree(aq_buf);
8652 return ret;
8653 }
8654
8655 /**
8656 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
8657 * @pf: board private structure
8658 * @reinit: if the Main VSI needs to re-initialized.
8659 *
8660 * Returns 0 on success, negative value on failure
8661 **/
i40e_setup_pf_switch(struct i40e_pf * pf,bool reinit)8662 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
8663 {
8664 int ret;
8665
8666 /* find out what's out there already */
8667 ret = i40e_fetch_switch_configuration(pf, false);
8668 if (ret) {
8669 dev_info(&pf->pdev->dev,
8670 "couldn't fetch switch config, err %d, aq_err %d\n",
8671 ret, pf->hw.aq.asq_last_status);
8672 return ret;
8673 }
8674 i40e_pf_reset_stats(pf);
8675
8676 /* first time setup */
8677 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
8678 struct i40e_vsi *vsi = NULL;
8679 u16 uplink_seid;
8680
8681 /* Set up the PF VSI associated with the PF's main VSI
8682 * that is already in the HW switch
8683 */
8684 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8685 uplink_seid = pf->veb[pf->lan_veb]->seid;
8686 else
8687 uplink_seid = pf->mac_seid;
8688 if (pf->lan_vsi == I40E_NO_VSI)
8689 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
8690 else if (reinit)
8691 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
8692 if (!vsi) {
8693 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
8694 i40e_fdir_teardown(pf);
8695 return -EAGAIN;
8696 }
8697 } else {
8698 /* force a reset of TC and queue layout configurations */
8699 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8700 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8701 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8702 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8703 }
8704 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
8705
8706 i40e_fdir_sb_setup(pf);
8707
8708 /* Setup static PF queue filter control settings */
8709 ret = i40e_setup_pf_filter_control(pf);
8710 if (ret) {
8711 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
8712 ret);
8713 /* Failure here should not stop continuing other steps */
8714 }
8715
8716 /* enable RSS in the HW, even for only one queue, as the stack can use
8717 * the hash
8718 */
8719 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
8720 i40e_config_rss(pf);
8721
8722 /* fill in link information and enable LSE reporting */
8723 i40e_update_link_info(&pf->hw, true);
8724 i40e_link_event(pf);
8725
8726 /* Initialize user-specific link properties */
8727 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8728 I40E_AQ_AN_COMPLETED) ? true : false);
8729
8730 i40e_ptp_init(pf);
8731
8732 return ret;
8733 }
8734
8735 /**
8736 * i40e_determine_queue_usage - Work out queue distribution
8737 * @pf: board private structure
8738 **/
i40e_determine_queue_usage(struct i40e_pf * pf)8739 static void i40e_determine_queue_usage(struct i40e_pf *pf)
8740 {
8741 int queues_left;
8742
8743 pf->num_lan_qps = 0;
8744 #ifdef I40E_FCOE
8745 pf->num_fcoe_qps = 0;
8746 #endif
8747
8748 /* Find the max queues to be put into basic use. We'll always be
8749 * using TC0, whether or not DCB is running, and TC0 will get the
8750 * big RSS set.
8751 */
8752 queues_left = pf->hw.func_caps.num_tx_qp;
8753
8754 if ((queues_left == 1) ||
8755 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8756 /* one qp for PF, no queues for anything else */
8757 queues_left = 0;
8758 pf->rss_size = pf->num_lan_qps = 1;
8759
8760 /* make sure all the fancies are disabled */
8761 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8762 #ifdef I40E_FCOE
8763 I40E_FLAG_FCOE_ENABLED |
8764 #endif
8765 I40E_FLAG_FD_SB_ENABLED |
8766 I40E_FLAG_FD_ATR_ENABLED |
8767 I40E_FLAG_DCB_CAPABLE |
8768 I40E_FLAG_SRIOV_ENABLED |
8769 I40E_FLAG_VMDQ_ENABLED);
8770 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8771 I40E_FLAG_FD_SB_ENABLED |
8772 I40E_FLAG_FD_ATR_ENABLED |
8773 I40E_FLAG_DCB_CAPABLE))) {
8774 /* one qp for PF */
8775 pf->rss_size = pf->num_lan_qps = 1;
8776 queues_left -= pf->num_lan_qps;
8777
8778 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8779 #ifdef I40E_FCOE
8780 I40E_FLAG_FCOE_ENABLED |
8781 #endif
8782 I40E_FLAG_FD_SB_ENABLED |
8783 I40E_FLAG_FD_ATR_ENABLED |
8784 I40E_FLAG_DCB_ENABLED |
8785 I40E_FLAG_VMDQ_ENABLED);
8786 } else {
8787 /* Not enough queues for all TCs */
8788 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
8789 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
8790 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8791 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
8792 }
8793 pf->num_lan_qps = pf->rss_size_max;
8794 queues_left -= pf->num_lan_qps;
8795 }
8796
8797 #ifdef I40E_FCOE
8798 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
8799 if (I40E_DEFAULT_FCOE <= queues_left) {
8800 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
8801 } else if (I40E_MINIMUM_FCOE <= queues_left) {
8802 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
8803 } else {
8804 pf->num_fcoe_qps = 0;
8805 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
8806 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
8807 }
8808
8809 queues_left -= pf->num_fcoe_qps;
8810 }
8811
8812 #endif
8813 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8814 if (queues_left > 1) {
8815 queues_left -= 1; /* save 1 queue for FD */
8816 } else {
8817 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8818 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
8819 }
8820 }
8821
8822 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8823 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
8824 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
8825 (queues_left / pf->num_vf_qps));
8826 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
8827 }
8828
8829 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8830 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
8831 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
8832 (queues_left / pf->num_vmdq_qps));
8833 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
8834 }
8835
8836 pf->queues_left = queues_left;
8837 #ifdef I40E_FCOE
8838 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
8839 #endif
8840 }
8841
8842 /**
8843 * i40e_setup_pf_filter_control - Setup PF static filter control
8844 * @pf: PF to be setup
8845 *
8846 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8847 * settings. If PE/FCoE are enabled then it will also set the per PF
8848 * based filter sizes required for them. It also enables Flow director,
8849 * ethertype and macvlan type filter settings for the pf.
8850 *
8851 * Returns 0 on success, negative on failure
8852 **/
i40e_setup_pf_filter_control(struct i40e_pf * pf)8853 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8854 {
8855 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8856
8857 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8858
8859 /* Flow Director is enabled */
8860 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8861 settings->enable_fdir = true;
8862
8863 /* Ethtype and MACVLAN filters enabled for PF */
8864 settings->enable_ethtype = true;
8865 settings->enable_macvlan = true;
8866
8867 if (i40e_set_filter_control(&pf->hw, settings))
8868 return -ENOENT;
8869
8870 return 0;
8871 }
8872
8873 #define INFO_STRING_LEN 255
i40e_print_features(struct i40e_pf * pf)8874 static void i40e_print_features(struct i40e_pf *pf)
8875 {
8876 struct i40e_hw *hw = &pf->hw;
8877 char *buf, *string;
8878
8879 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8880 if (!string) {
8881 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8882 return;
8883 }
8884
8885 buf = string;
8886
8887 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8888 #ifdef CONFIG_PCI_IOV
8889 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8890 #endif
8891 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8892 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8893
8894 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8895 buf += sprintf(buf, "RSS ");
8896 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8897 buf += sprintf(buf, "FD_ATR ");
8898 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8899 buf += sprintf(buf, "FD_SB ");
8900 buf += sprintf(buf, "NTUPLE ");
8901 }
8902 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
8903 buf += sprintf(buf, "DCB ");
8904 if (pf->flags & I40E_FLAG_PTP)
8905 buf += sprintf(buf, "PTP ");
8906 #ifdef I40E_FCOE
8907 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
8908 buf += sprintf(buf, "FCOE ");
8909 #endif
8910
8911 BUG_ON(buf > (string + INFO_STRING_LEN));
8912 dev_info(&pf->pdev->dev, "%s\n", string);
8913 kfree(string);
8914 }
8915
8916 /**
8917 * i40e_probe - Device initialization routine
8918 * @pdev: PCI device information struct
8919 * @ent: entry in i40e_pci_tbl
8920 *
8921 * i40e_probe initializes a pf identified by a pci_dev structure.
8922 * The OS initialization, configuring of the pf private structure,
8923 * and a hardware reset occur.
8924 *
8925 * Returns 0 on success, negative on failure
8926 **/
i40e_probe(struct pci_dev * pdev,const struct pci_device_id * ent)8927 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8928 {
8929 struct i40e_pf *pf;
8930 struct i40e_hw *hw;
8931 static u16 pfs_found;
8932 u16 link_status;
8933 int err = 0;
8934 u32 len;
8935 u32 i;
8936
8937 err = pci_enable_device_mem(pdev);
8938 if (err)
8939 return err;
8940
8941 /* set up for high or low dma */
8942 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8943 if (err) {
8944 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8945 if (err) {
8946 dev_err(&pdev->dev,
8947 "DMA configuration failed: 0x%x\n", err);
8948 goto err_dma;
8949 }
8950 }
8951
8952 /* set up pci connections */
8953 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8954 IORESOURCE_MEM), i40e_driver_name);
8955 if (err) {
8956 dev_info(&pdev->dev,
8957 "pci_request_selected_regions failed %d\n", err);
8958 goto err_pci_reg;
8959 }
8960
8961 pci_enable_pcie_error_reporting(pdev);
8962 pci_set_master(pdev);
8963
8964 /* Now that we have a PCI connection, we need to do the
8965 * low level device setup. This is primarily setting up
8966 * the Admin Queue structures and then querying for the
8967 * device's current profile information.
8968 */
8969 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8970 if (!pf) {
8971 err = -ENOMEM;
8972 goto err_pf_alloc;
8973 }
8974 pf->next_vsi = 0;
8975 pf->pdev = pdev;
8976 set_bit(__I40E_DOWN, &pf->state);
8977
8978 hw = &pf->hw;
8979 hw->back = pf;
8980 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8981 pci_resource_len(pdev, 0));
8982 if (!hw->hw_addr) {
8983 err = -EIO;
8984 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8985 (unsigned int)pci_resource_start(pdev, 0),
8986 (unsigned int)pci_resource_len(pdev, 0), err);
8987 goto err_ioremap;
8988 }
8989 hw->vendor_id = pdev->vendor;
8990 hw->device_id = pdev->device;
8991 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8992 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8993 hw->subsystem_device_id = pdev->subsystem_device;
8994 hw->bus.device = PCI_SLOT(pdev->devfn);
8995 hw->bus.func = PCI_FUNC(pdev->devfn);
8996 pf->instance = pfs_found;
8997
8998 /* do a special CORER for clearing PXE mode once at init */
8999 if (hw->revision_id == 0 &&
9000 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9001 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9002 i40e_flush(hw);
9003 msleep(200);
9004 pf->corer_count++;
9005
9006 i40e_clear_pxe_mode(hw);
9007 }
9008
9009 /* Reset here to make sure all is clean and to define PF 'n' */
9010 i40e_clear_hw(hw);
9011 err = i40e_pf_reset(hw);
9012 if (err) {
9013 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9014 goto err_pf_reset;
9015 }
9016 pf->pfr_count++;
9017
9018 hw->aq.num_arq_entries = I40E_AQ_LEN;
9019 hw->aq.num_asq_entries = I40E_AQ_LEN;
9020 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9021 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9022 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9023 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
9024 "%s-pf%d:misc",
9025 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
9026
9027 err = i40e_init_shared_code(hw);
9028 if (err) {
9029 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9030 goto err_pf_reset;
9031 }
9032
9033 /* set up a default setting for link flow control */
9034 pf->hw.fc.requested_mode = I40E_FC_NONE;
9035
9036 err = i40e_init_adminq(hw);
9037 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9038 if (err) {
9039 dev_info(&pdev->dev,
9040 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9041 goto err_pf_reset;
9042 }
9043
9044 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9045 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9046 dev_info(&pdev->dev,
9047 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9048 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9049 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9050 dev_info(&pdev->dev,
9051 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9052
9053
9054 i40e_verify_eeprom(pf);
9055
9056 /* Rev 0 hardware was never productized */
9057 if (hw->revision_id < 1)
9058 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9059
9060 i40e_clear_pxe_mode(hw);
9061 err = i40e_get_capabilities(pf);
9062 if (err)
9063 goto err_adminq_setup;
9064
9065 err = i40e_sw_init(pf);
9066 if (err) {
9067 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9068 goto err_sw_init;
9069 }
9070
9071 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9072 hw->func_caps.num_rx_qp,
9073 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9074 if (err) {
9075 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9076 goto err_init_lan_hmc;
9077 }
9078
9079 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9080 if (err) {
9081 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9082 err = -ENOENT;
9083 goto err_configure_lan_hmc;
9084 }
9085
9086 i40e_get_mac_addr(hw, hw->mac.addr);
9087 if (!is_valid_ether_addr(hw->mac.addr)) {
9088 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9089 err = -EIO;
9090 goto err_mac_addr;
9091 }
9092 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9093 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9094 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9095 if (is_valid_ether_addr(hw->mac.port_addr))
9096 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9097 #ifdef I40E_FCOE
9098 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9099 if (err)
9100 dev_info(&pdev->dev,
9101 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9102 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9103 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9104 hw->mac.san_addr);
9105 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9106 }
9107 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9108 #endif /* I40E_FCOE */
9109
9110 pci_set_drvdata(pdev, pf);
9111 pci_save_state(pdev);
9112 #ifdef CONFIG_I40E_DCB
9113 err = i40e_init_pf_dcb(pf);
9114 if (err) {
9115 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
9116 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9117 /* Continue without DCB enabled */
9118 }
9119 #endif /* CONFIG_I40E_DCB */
9120
9121 /* set up periodic task facility */
9122 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9123 pf->service_timer_period = HZ;
9124
9125 INIT_WORK(&pf->service_task, i40e_service_task);
9126 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9127 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9128 pf->link_check_timeout = jiffies;
9129
9130 /* WoL defaults to disabled */
9131 pf->wol_en = false;
9132 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9133
9134 /* set up the main switch operations */
9135 i40e_determine_queue_usage(pf);
9136 i40e_init_interrupt_scheme(pf);
9137
9138 /* The number of VSIs reported by the FW is the minimum guaranteed
9139 * to us; HW supports far more and we share the remaining pool with
9140 * the other PFs. We allocate space for more than the guarantee with
9141 * the understanding that we might not get them all later.
9142 */
9143 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9144 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9145 else
9146 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9147
9148 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9149 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9150 pf->vsi = kzalloc(len, GFP_KERNEL);
9151 if (!pf->vsi) {
9152 err = -ENOMEM;
9153 goto err_switch_setup;
9154 }
9155
9156 err = i40e_setup_pf_switch(pf, false);
9157 if (err) {
9158 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9159 goto err_vsis;
9160 }
9161 /* if FDIR VSI was set up, start it now */
9162 for (i = 0; i < pf->num_alloc_vsi; i++) {
9163 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9164 i40e_vsi_open(pf->vsi[i]);
9165 break;
9166 }
9167 }
9168
9169 /* The main driver is (mostly) up and happy. We need to set this state
9170 * before setting up the misc vector or we get a race and the vector
9171 * ends up disabled forever.
9172 */
9173 clear_bit(__I40E_DOWN, &pf->state);
9174
9175 /* In case of MSIX we are going to setup the misc vector right here
9176 * to handle admin queue events etc. In case of legacy and MSI
9177 * the misc functionality and queue processing is combined in
9178 * the same vector and that gets setup at open.
9179 */
9180 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9181 err = i40e_setup_misc_vector(pf);
9182 if (err) {
9183 dev_info(&pdev->dev,
9184 "setup of misc vector failed: %d\n", err);
9185 goto err_vsis;
9186 }
9187 }
9188
9189 #ifdef CONFIG_PCI_IOV
9190 /* prep for VF support */
9191 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9192 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9193 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9194 u32 val;
9195
9196 /* disable link interrupts for VFs */
9197 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9198 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9199 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9200 i40e_flush(hw);
9201
9202 if (pci_num_vf(pdev)) {
9203 dev_info(&pdev->dev,
9204 "Active VFs found, allocating resources.\n");
9205 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9206 if (err)
9207 dev_info(&pdev->dev,
9208 "Error %d allocating resources for existing VFs\n",
9209 err);
9210 }
9211 }
9212 #endif /* CONFIG_PCI_IOV */
9213
9214 pfs_found++;
9215
9216 i40e_dbg_pf_init(pf);
9217
9218 /* tell the firmware that we're starting */
9219 i40e_send_version(pf);
9220
9221 /* since everything's happy, start the service_task timer */
9222 mod_timer(&pf->service_timer,
9223 round_jiffies(jiffies + pf->service_timer_period));
9224
9225 #ifdef I40E_FCOE
9226 /* create FCoE interface */
9227 i40e_fcoe_vsi_setup(pf);
9228
9229 #endif
9230 /* Get the negotiated link width and speed from PCI config space */
9231 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9232
9233 i40e_set_pci_config_data(hw, link_status);
9234
9235 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9236 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9237 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9238 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9239 "Unknown"),
9240 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9241 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9242 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9243 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9244 "Unknown"));
9245
9246 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9247 hw->bus.speed < i40e_bus_speed_8000) {
9248 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9249 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9250 }
9251
9252 /* print a string summarizing features */
9253 i40e_print_features(pf);
9254
9255 return 0;
9256
9257 /* Unwind what we've done if something failed in the setup */
9258 err_vsis:
9259 set_bit(__I40E_DOWN, &pf->state);
9260 i40e_clear_interrupt_scheme(pf);
9261 kfree(pf->vsi);
9262 err_switch_setup:
9263 i40e_reset_interrupt_capability(pf);
9264 del_timer_sync(&pf->service_timer);
9265 err_mac_addr:
9266 err_configure_lan_hmc:
9267 (void)i40e_shutdown_lan_hmc(hw);
9268 err_init_lan_hmc:
9269 kfree(pf->qp_pile);
9270 kfree(pf->irq_pile);
9271 err_sw_init:
9272 err_adminq_setup:
9273 (void)i40e_shutdown_adminq(hw);
9274 err_pf_reset:
9275 iounmap(hw->hw_addr);
9276 err_ioremap:
9277 kfree(pf);
9278 err_pf_alloc:
9279 pci_disable_pcie_error_reporting(pdev);
9280 pci_release_selected_regions(pdev,
9281 pci_select_bars(pdev, IORESOURCE_MEM));
9282 err_pci_reg:
9283 err_dma:
9284 pci_disable_device(pdev);
9285 return err;
9286 }
9287
9288 /**
9289 * i40e_remove - Device removal routine
9290 * @pdev: PCI device information struct
9291 *
9292 * i40e_remove is called by the PCI subsystem to alert the driver
9293 * that is should release a PCI device. This could be caused by a
9294 * Hot-Plug event, or because the driver is going to be removed from
9295 * memory.
9296 **/
i40e_remove(struct pci_dev * pdev)9297 static void i40e_remove(struct pci_dev *pdev)
9298 {
9299 struct i40e_pf *pf = pci_get_drvdata(pdev);
9300 i40e_status ret_code;
9301 int i;
9302
9303 i40e_dbg_pf_exit(pf);
9304
9305 i40e_ptp_stop(pf);
9306
9307 /* no more scheduling of any task */
9308 set_bit(__I40E_DOWN, &pf->state);
9309 del_timer_sync(&pf->service_timer);
9310 cancel_work_sync(&pf->service_task);
9311
9312 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9313 i40e_free_vfs(pf);
9314 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9315 }
9316
9317 i40e_fdir_teardown(pf);
9318
9319 /* If there is a switch structure or any orphans, remove them.
9320 * This will leave only the PF's VSI remaining.
9321 */
9322 for (i = 0; i < I40E_MAX_VEB; i++) {
9323 if (!pf->veb[i])
9324 continue;
9325
9326 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9327 pf->veb[i]->uplink_seid == 0)
9328 i40e_switch_branch_release(pf->veb[i]);
9329 }
9330
9331 /* Now we can shutdown the PF's VSI, just before we kill
9332 * adminq and hmc.
9333 */
9334 if (pf->vsi[pf->lan_vsi])
9335 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9336
9337 i40e_stop_misc_vector(pf);
9338 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9339 synchronize_irq(pf->msix_entries[0].vector);
9340 free_irq(pf->msix_entries[0].vector, pf);
9341 }
9342
9343 /* shutdown and destroy the HMC */
9344 if (pf->hw.hmc.hmc_obj) {
9345 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9346 if (ret_code)
9347 dev_warn(&pdev->dev,
9348 "Failed to destroy the HMC resources: %d\n",
9349 ret_code);
9350 }
9351
9352 /* shutdown the adminq */
9353 ret_code = i40e_shutdown_adminq(&pf->hw);
9354 if (ret_code)
9355 dev_warn(&pdev->dev,
9356 "Failed to destroy the Admin Queue resources: %d\n",
9357 ret_code);
9358
9359 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9360 i40e_clear_interrupt_scheme(pf);
9361 for (i = 0; i < pf->num_alloc_vsi; i++) {
9362 if (pf->vsi[i]) {
9363 i40e_vsi_clear_rings(pf->vsi[i]);
9364 i40e_vsi_clear(pf->vsi[i]);
9365 pf->vsi[i] = NULL;
9366 }
9367 }
9368
9369 for (i = 0; i < I40E_MAX_VEB; i++) {
9370 kfree(pf->veb[i]);
9371 pf->veb[i] = NULL;
9372 }
9373
9374 kfree(pf->qp_pile);
9375 kfree(pf->irq_pile);
9376 kfree(pf->vsi);
9377
9378 iounmap(pf->hw.hw_addr);
9379 kfree(pf);
9380 pci_release_selected_regions(pdev,
9381 pci_select_bars(pdev, IORESOURCE_MEM));
9382
9383 pci_disable_pcie_error_reporting(pdev);
9384 pci_disable_device(pdev);
9385 }
9386
9387 /**
9388 * i40e_pci_error_detected - warning that something funky happened in PCI land
9389 * @pdev: PCI device information struct
9390 *
9391 * Called to warn that something happened and the error handling steps
9392 * are in progress. Allows the driver to quiesce things, be ready for
9393 * remediation.
9394 **/
i40e_pci_error_detected(struct pci_dev * pdev,enum pci_channel_state error)9395 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9396 enum pci_channel_state error)
9397 {
9398 struct i40e_pf *pf = pci_get_drvdata(pdev);
9399
9400 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9401
9402 /* shutdown all operations */
9403 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9404 rtnl_lock();
9405 i40e_prep_for_reset(pf);
9406 rtnl_unlock();
9407 }
9408
9409 /* Request a slot reset */
9410 return PCI_ERS_RESULT_NEED_RESET;
9411 }
9412
9413 /**
9414 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9415 * @pdev: PCI device information struct
9416 *
9417 * Called to find if the driver can work with the device now that
9418 * the pci slot has been reset. If a basic connection seems good
9419 * (registers are readable and have sane content) then return a
9420 * happy little PCI_ERS_RESULT_xxx.
9421 **/
i40e_pci_error_slot_reset(struct pci_dev * pdev)9422 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9423 {
9424 struct i40e_pf *pf = pci_get_drvdata(pdev);
9425 pci_ers_result_t result;
9426 int err;
9427 u32 reg;
9428
9429 dev_info(&pdev->dev, "%s\n", __func__);
9430 if (pci_enable_device_mem(pdev)) {
9431 dev_info(&pdev->dev,
9432 "Cannot re-enable PCI device after reset.\n");
9433 result = PCI_ERS_RESULT_DISCONNECT;
9434 } else {
9435 pci_set_master(pdev);
9436 pci_restore_state(pdev);
9437 pci_save_state(pdev);
9438 pci_wake_from_d3(pdev, false);
9439
9440 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9441 if (reg == 0)
9442 result = PCI_ERS_RESULT_RECOVERED;
9443 else
9444 result = PCI_ERS_RESULT_DISCONNECT;
9445 }
9446
9447 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9448 if (err) {
9449 dev_info(&pdev->dev,
9450 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9451 err);
9452 /* non-fatal, continue */
9453 }
9454
9455 return result;
9456 }
9457
9458 /**
9459 * i40e_pci_error_resume - restart operations after PCI error recovery
9460 * @pdev: PCI device information struct
9461 *
9462 * Called to allow the driver to bring things back up after PCI error
9463 * and/or reset recovery has finished.
9464 **/
i40e_pci_error_resume(struct pci_dev * pdev)9465 static void i40e_pci_error_resume(struct pci_dev *pdev)
9466 {
9467 struct i40e_pf *pf = pci_get_drvdata(pdev);
9468
9469 dev_info(&pdev->dev, "%s\n", __func__);
9470 if (test_bit(__I40E_SUSPENDED, &pf->state))
9471 return;
9472
9473 rtnl_lock();
9474 i40e_handle_reset_warning(pf);
9475 rtnl_lock();
9476 }
9477
9478 /**
9479 * i40e_shutdown - PCI callback for shutting down
9480 * @pdev: PCI device information struct
9481 **/
i40e_shutdown(struct pci_dev * pdev)9482 static void i40e_shutdown(struct pci_dev *pdev)
9483 {
9484 struct i40e_pf *pf = pci_get_drvdata(pdev);
9485 struct i40e_hw *hw = &pf->hw;
9486
9487 set_bit(__I40E_SUSPENDED, &pf->state);
9488 set_bit(__I40E_DOWN, &pf->state);
9489 rtnl_lock();
9490 i40e_prep_for_reset(pf);
9491 rtnl_unlock();
9492
9493 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9494 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9495
9496 if (system_state == SYSTEM_POWER_OFF) {
9497 pci_wake_from_d3(pdev, pf->wol_en);
9498 pci_set_power_state(pdev, PCI_D3hot);
9499 }
9500 }
9501
9502 #ifdef CONFIG_PM
9503 /**
9504 * i40e_suspend - PCI callback for moving to D3
9505 * @pdev: PCI device information struct
9506 **/
i40e_suspend(struct pci_dev * pdev,pm_message_t state)9507 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
9508 {
9509 struct i40e_pf *pf = pci_get_drvdata(pdev);
9510 struct i40e_hw *hw = &pf->hw;
9511
9512 set_bit(__I40E_SUSPENDED, &pf->state);
9513 set_bit(__I40E_DOWN, &pf->state);
9514 rtnl_lock();
9515 i40e_prep_for_reset(pf);
9516 rtnl_unlock();
9517
9518 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9519 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9520
9521 pci_wake_from_d3(pdev, pf->wol_en);
9522 pci_set_power_state(pdev, PCI_D3hot);
9523
9524 return 0;
9525 }
9526
9527 /**
9528 * i40e_resume - PCI callback for waking up from D3
9529 * @pdev: PCI device information struct
9530 **/
i40e_resume(struct pci_dev * pdev)9531 static int i40e_resume(struct pci_dev *pdev)
9532 {
9533 struct i40e_pf *pf = pci_get_drvdata(pdev);
9534 u32 err;
9535
9536 pci_set_power_state(pdev, PCI_D0);
9537 pci_restore_state(pdev);
9538 /* pci_restore_state() clears dev->state_saves, so
9539 * call pci_save_state() again to restore it.
9540 */
9541 pci_save_state(pdev);
9542
9543 err = pci_enable_device_mem(pdev);
9544 if (err) {
9545 dev_err(&pdev->dev,
9546 "%s: Cannot enable PCI device from suspend\n",
9547 __func__);
9548 return err;
9549 }
9550 pci_set_master(pdev);
9551
9552 /* no wakeup events while running */
9553 pci_wake_from_d3(pdev, false);
9554
9555 /* handling the reset will rebuild the device state */
9556 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
9557 clear_bit(__I40E_DOWN, &pf->state);
9558 rtnl_lock();
9559 i40e_reset_and_rebuild(pf, false);
9560 rtnl_unlock();
9561 }
9562
9563 return 0;
9564 }
9565
9566 #endif
9567 static const struct pci_error_handlers i40e_err_handler = {
9568 .error_detected = i40e_pci_error_detected,
9569 .slot_reset = i40e_pci_error_slot_reset,
9570 .resume = i40e_pci_error_resume,
9571 };
9572
9573 static struct pci_driver i40e_driver = {
9574 .name = i40e_driver_name,
9575 .id_table = i40e_pci_tbl,
9576 .probe = i40e_probe,
9577 .remove = i40e_remove,
9578 #ifdef CONFIG_PM
9579 .suspend = i40e_suspend,
9580 .resume = i40e_resume,
9581 #endif
9582 .shutdown = i40e_shutdown,
9583 .err_handler = &i40e_err_handler,
9584 .sriov_configure = i40e_pci_sriov_configure,
9585 };
9586
9587 /**
9588 * i40e_init_module - Driver registration routine
9589 *
9590 * i40e_init_module is the first routine called when the driver is
9591 * loaded. All it does is register with the PCI subsystem.
9592 **/
i40e_init_module(void)9593 static int __init i40e_init_module(void)
9594 {
9595 pr_info("%s: %s - version %s\n", i40e_driver_name,
9596 i40e_driver_string, i40e_driver_version_str);
9597 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
9598 i40e_dbg_init();
9599 return pci_register_driver(&i40e_driver);
9600 }
9601 module_init(i40e_init_module);
9602
9603 /**
9604 * i40e_exit_module - Driver exit cleanup routine
9605 *
9606 * i40e_exit_module is called just before the driver is removed
9607 * from memory.
9608 **/
i40e_exit_module(void)9609 static void __exit i40e_exit_module(void)
9610 {
9611 pci_unregister_driver(&i40e_driver);
9612 i40e_dbg_exit();
9613 }
9614 module_exit(i40e_exit_module);
9615