1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 #include "../wifi.h"
27 #include "../pci.h"
28 #include "../base.h"
29 #include "../stats.h"
30 #include "reg.h"
31 #include "def.h"
32 #include "phy.h"
33 #include "trx.h"
34 #include "led.h"
35 #include "dm.h"
36 #include "fw.h"
37
_rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff * skb,u8 hw_queue)38 static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
39 {
40 __le16 fc = rtl_get_fc(skb);
41
42 if (unlikely(ieee80211_is_beacon(fc)))
43 return QSLT_BEACON;
44 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
45 return QSLT_MGNT;
46
47 return skb->priority;
48 }
49
50 /* mac80211's rate_idx is like this:
51 *
52 * 2.4G band:rx_status->band == IEEE80211_BAND_2GHZ
53 *
54 * B/G rate:
55 * (rx_status->flag & RX_FLAG_HT) = 0,
56 * DESC92C_RATE1M-->DESC92C_RATE54M ==> idx is 0-->11,
57 *
58 * N rate:
59 * (rx_status->flag & RX_FLAG_HT) = 1,
60 * DESC92C_RATEMCS0-->DESC92C_RATEMCS15 ==> idx is 0-->15
61 *
62 * 5G band:rx_status->band == IEEE80211_BAND_5GHZ
63 * A rate:
64 * (rx_status->flag & RX_FLAG_HT) = 0,
65 * DESC92C_RATE6M-->DESC92C_RATE54M ==> idx is 0-->7,
66 *
67 * N rate:
68 * (rx_status->flag & RX_FLAG_HT) = 1,
69 * DESC92C_RATEMCS0-->DESC92C_RATEMCS15 ==> idx is 0-->15
70 */
_rtl8723be_rate_mapping(struct ieee80211_hw * hw,bool isht,u8 desc_rate)71 static int _rtl8723be_rate_mapping(struct ieee80211_hw *hw,
72 bool isht, u8 desc_rate)
73 {
74 int rate_idx;
75
76 if (!isht) {
77 if (IEEE80211_BAND_2GHZ == hw->conf.chandef.chan->band) {
78 switch (desc_rate) {
79 case DESC92C_RATE1M:
80 rate_idx = 0;
81 break;
82 case DESC92C_RATE2M:
83 rate_idx = 1;
84 break;
85 case DESC92C_RATE5_5M:
86 rate_idx = 2;
87 break;
88 case DESC92C_RATE11M:
89 rate_idx = 3;
90 break;
91 case DESC92C_RATE6M:
92 rate_idx = 4;
93 break;
94 case DESC92C_RATE9M:
95 rate_idx = 5;
96 break;
97 case DESC92C_RATE12M:
98 rate_idx = 6;
99 break;
100 case DESC92C_RATE18M:
101 rate_idx = 7;
102 break;
103 case DESC92C_RATE24M:
104 rate_idx = 8;
105 break;
106 case DESC92C_RATE36M:
107 rate_idx = 9;
108 break;
109 case DESC92C_RATE48M:
110 rate_idx = 10;
111 break;
112 case DESC92C_RATE54M:
113 rate_idx = 11;
114 break;
115 default:
116 rate_idx = 0;
117 break;
118 }
119 } else {
120 switch (desc_rate) {
121 case DESC92C_RATE6M:
122 rate_idx = 0;
123 break;
124 case DESC92C_RATE9M:
125 rate_idx = 1;
126 break;
127 case DESC92C_RATE12M:
128 rate_idx = 2;
129 break;
130 case DESC92C_RATE18M:
131 rate_idx = 3;
132 break;
133 case DESC92C_RATE24M:
134 rate_idx = 4;
135 break;
136 case DESC92C_RATE36M:
137 rate_idx = 5;
138 break;
139 case DESC92C_RATE48M:
140 rate_idx = 6;
141 break;
142 case DESC92C_RATE54M:
143 rate_idx = 7;
144 break;
145 default:
146 rate_idx = 0;
147 break;
148 }
149 }
150 } else {
151 switch (desc_rate) {
152 case DESC92C_RATEMCS0:
153 rate_idx = 0;
154 break;
155 case DESC92C_RATEMCS1:
156 rate_idx = 1;
157 break;
158 case DESC92C_RATEMCS2:
159 rate_idx = 2;
160 break;
161 case DESC92C_RATEMCS3:
162 rate_idx = 3;
163 break;
164 case DESC92C_RATEMCS4:
165 rate_idx = 4;
166 break;
167 case DESC92C_RATEMCS5:
168 rate_idx = 5;
169 break;
170 case DESC92C_RATEMCS6:
171 rate_idx = 6;
172 break;
173 case DESC92C_RATEMCS7:
174 rate_idx = 7;
175 break;
176 case DESC92C_RATEMCS8:
177 rate_idx = 8;
178 break;
179 case DESC92C_RATEMCS9:
180 rate_idx = 9;
181 break;
182 case DESC92C_RATEMCS10:
183 rate_idx = 10;
184 break;
185 case DESC92C_RATEMCS11:
186 rate_idx = 11;
187 break;
188 case DESC92C_RATEMCS12:
189 rate_idx = 12;
190 break;
191 case DESC92C_RATEMCS13:
192 rate_idx = 13;
193 break;
194 case DESC92C_RATEMCS14:
195 rate_idx = 14;
196 break;
197 case DESC92C_RATEMCS15:
198 rate_idx = 15;
199 break;
200 default:
201 rate_idx = 0;
202 break;
203 }
204 }
205 return rate_idx;
206 }
207
_rtl8723be_query_rxphystatus(struct ieee80211_hw * hw,struct rtl_stats * pstatus,u8 * pdesc,struct rx_fwinfo_8723be * p_drvinfo,bool bpacket_match_bssid,bool bpacket_toself,bool packet_beacon)208 static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
209 struct rtl_stats *pstatus, u8 *pdesc,
210 struct rx_fwinfo_8723be *p_drvinfo,
211 bool bpacket_match_bssid,
212 bool bpacket_toself,
213 bool packet_beacon)
214 {
215 struct rtl_priv *rtlpriv = rtl_priv(hw);
216 struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
217 char rx_pwr_all = 0, rx_pwr[4];
218 u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
219 u8 i, max_spatial_stream;
220 u32 rssi, total_rssi = 0;
221 bool is_cck = pstatus->is_cck;
222 u8 lan_idx, vga_idx;
223
224 /* Record it for next packet processing */
225 pstatus->packet_matchbssid = bpacket_match_bssid;
226 pstatus->packet_toself = bpacket_toself;
227 pstatus->packet_beacon = packet_beacon;
228 pstatus->rx_mimo_signalquality[0] = -1;
229 pstatus->rx_mimo_signalquality[1] = -1;
230
231 if (is_cck) {
232 u8 cck_highpwr;
233 u8 cck_agc_rpt;
234
235 cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
236
237 /* (1)Hardware does not provide RSSI for CCK */
238 /* (2)PWDB, Average PWDB cacluated by
239 * hardware (for rate adaptive)
240 */
241 cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
242 BIT(9));
243
244 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
245 vga_idx = (cck_agc_rpt & 0x1f);
246
247 switch (lan_idx) {
248 /* 46 53 73 95 201301231630 */
249 /* 46 53 77 99 201301241630 */
250 case 6:
251 rx_pwr_all = -34 - (2 * vga_idx);
252 break;
253 case 4:
254 rx_pwr_all = -14 - (2 * vga_idx);
255 break;
256 case 1:
257 rx_pwr_all = 6 - (2 * vga_idx);
258 break;
259 case 0:
260 rx_pwr_all = 16 - (2 * vga_idx);
261 break;
262 default:
263 break;
264 }
265
266 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
267 if (pwdb_all > 100)
268 pwdb_all = 100;
269
270 pstatus->rx_pwdb_all = pwdb_all;
271 pstatus->bt_rx_rssi_percentage = pwdb_all;
272 pstatus->recvsignalpower = rx_pwr_all;
273
274 /* (3) Get Signal Quality (EVM) */
275 if (bpacket_match_bssid) {
276 u8 sq, sq_rpt;
277 if (pstatus->rx_pwdb_all > 40) {
278 sq = 100;
279 } else {
280 sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
281 if (sq_rpt > 64)
282 sq = 0;
283 else if (sq_rpt < 20)
284 sq = 100;
285 else
286 sq = ((64 - sq_rpt) * 100) / 44;
287 }
288 pstatus->signalquality = sq;
289 pstatus->rx_mimo_signalquality[0] = sq;
290 pstatus->rx_mimo_signalquality[1] = -1;
291 }
292 } else {
293 /* (1)Get RSSI for HT rate */
294 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
295 /* we will judge RF RX path now. */
296 if (rtlpriv->dm.rfpath_rxenable[i])
297 rf_rx_num++;
298
299 rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
300 - 110;
301
302 pstatus->rx_pwr[i] = rx_pwr[i];
303 /* Translate DBM to percentage. */
304 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
305 total_rssi += rssi;
306
307 pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
308 }
309
310 /* (2)PWDB, Average PWDB cacluated by
311 * hardware (for rate adaptive)
312 */
313 rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
314 0x7f) - 110;
315
316 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
317 pwdb_all_bt = pwdb_all;
318 pstatus->rx_pwdb_all = pwdb_all;
319 pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
320 pstatus->rxpower = rx_pwr_all;
321 pstatus->recvsignalpower = rx_pwr_all;
322
323 /* (3)EVM of HT rate */
324 if (pstatus->rate >= DESC92C_RATEMCS8 &&
325 pstatus->rate <= DESC92C_RATEMCS15)
326 max_spatial_stream = 2;
327 else
328 max_spatial_stream = 1;
329
330 for (i = 0; i < max_spatial_stream; i++) {
331 evm = rtl_evm_db_to_percentage(
332 p_phystrpt->stream_rxevm[i]);
333
334 if (bpacket_match_bssid) {
335 /* Fill value in RFD, Get the first
336 * spatial stream only
337 */
338 if (i == 0)
339 pstatus->signalquality =
340 (u8)(evm & 0xff);
341 pstatus->rx_mimo_signalquality[i] =
342 (u8)(evm & 0xff);
343 }
344 }
345
346 if (bpacket_match_bssid) {
347 for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
348 rtl_priv(hw)->dm.cfo_tail[i] =
349 (int)p_phystrpt->path_cfotail[i];
350
351 if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
352 rtl_priv(hw)->dm.packet_count = 0;
353 else
354 rtl_priv(hw)->dm.packet_count++;
355 }
356 }
357
358 /* UI BSS List signal strength(in percentage),
359 * make it good looking, from 0~100.
360 */
361 if (is_cck)
362 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
363 pwdb_all));
364 else if (rf_rx_num != 0)
365 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
366 total_rssi /= rf_rx_num));
367 }
368
_rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw * hw,struct sk_buff * skb,struct rtl_stats * pstatus,u8 * pdesc,struct rx_fwinfo_8723be * p_drvinfo)369 static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
370 struct sk_buff *skb,
371 struct rtl_stats *pstatus,
372 u8 *pdesc,
373 struct rx_fwinfo_8723be *p_drvinfo)
374 {
375 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
376 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
377 struct ieee80211_hdr *hdr;
378 u8 *tmp_buf;
379 u8 *praddr;
380 u8 *psaddr;
381 u16 fc, type;
382 bool packet_matchbssid, packet_toself, packet_beacon;
383
384 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
385
386 hdr = (struct ieee80211_hdr *)tmp_buf;
387 fc = le16_to_cpu(hdr->frame_control);
388 type = WLAN_FC_GET_TYPE(hdr->frame_control);
389 praddr = hdr->addr1;
390 psaddr = ieee80211_get_SA(hdr);
391 memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
392
393 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
394 (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
395 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
396 hdr->addr2 : hdr->addr3)) &&
397 (!pstatus->hwerror) &&
398 (!pstatus->crc) && (!pstatus->icv));
399
400 packet_toself = packet_matchbssid &&
401 (ether_addr_equal(praddr, rtlefuse->dev_addr));
402
403 /* YP: packet_beacon is not initialized,
404 * this assignment is neccesary,
405 * otherwise it counld be true in this case
406 * the situation is much worse in Kernel 3.10
407 */
408 if (ieee80211_is_beacon(hdr->frame_control))
409 packet_beacon = true;
410 else
411 packet_beacon = false;
412
413 if (packet_beacon && packet_matchbssid)
414 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
415
416 _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
417 packet_matchbssid,
418 packet_toself,
419 packet_beacon);
420
421 rtl_process_phyinfo(hw, tmp_buf, pstatus);
422 }
423
_rtl8723be_insert_emcontent(struct rtl_tcb_desc * ptcb_desc,u8 * virtualaddress)424 static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
425 u8 *virtualaddress)
426 {
427 u32 dwtmp = 0;
428 memset(virtualaddress, 0, 8);
429
430 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
431 if (ptcb_desc->empkt_num == 1) {
432 dwtmp = ptcb_desc->empkt_len[0];
433 } else {
434 dwtmp = ptcb_desc->empkt_len[0];
435 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
436 dwtmp += ptcb_desc->empkt_len[1];
437 }
438 SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
439
440 if (ptcb_desc->empkt_num <= 3) {
441 dwtmp = ptcb_desc->empkt_len[2];
442 } else {
443 dwtmp = ptcb_desc->empkt_len[2];
444 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
445 dwtmp += ptcb_desc->empkt_len[3];
446 }
447 SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
448 if (ptcb_desc->empkt_num <= 5) {
449 dwtmp = ptcb_desc->empkt_len[4];
450 } else {
451 dwtmp = ptcb_desc->empkt_len[4];
452 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
453 dwtmp += ptcb_desc->empkt_len[5];
454 }
455 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
456 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
457 if (ptcb_desc->empkt_num <= 7) {
458 dwtmp = ptcb_desc->empkt_len[6];
459 } else {
460 dwtmp = ptcb_desc->empkt_len[6];
461 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
462 dwtmp += ptcb_desc->empkt_len[7];
463 }
464 SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
465 if (ptcb_desc->empkt_num <= 9) {
466 dwtmp = ptcb_desc->empkt_len[8];
467 } else {
468 dwtmp = ptcb_desc->empkt_len[8];
469 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
470 dwtmp += ptcb_desc->empkt_len[9];
471 }
472 SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
473 }
474
rtl8723be_rx_query_desc(struct ieee80211_hw * hw,struct rtl_stats * status,struct ieee80211_rx_status * rx_status,u8 * pdesc,struct sk_buff * skb)475 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
476 struct rtl_stats *status,
477 struct ieee80211_rx_status *rx_status,
478 u8 *pdesc, struct sk_buff *skb)
479 {
480 struct rtl_priv *rtlpriv = rtl_priv(hw);
481 struct rx_fwinfo_8723be *p_drvinfo;
482 struct ieee80211_hdr *hdr;
483
484 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
485
486 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
487 status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
488 RX_DRV_INFO_SIZE_UNIT;
489 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
490 status->icv = (u16) GET_RX_DESC_ICV(pdesc);
491 status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
492 status->hwerror = (status->crc | status->icv);
493 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
494 status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
495 status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
496 status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
497 status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
498 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
499 status->rx_is40Mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
500 status->bandwidth = (u8)GET_RX_DESC_BW(pdesc);
501 status->macid = GET_RX_DESC_MACID(pdesc);
502 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
503
504 status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
505
506 if (GET_RX_STATUS_DESC_RPT_SEL(pdesc))
507 status->packet_report_type = C2H_PACKET;
508 else
509 status->packet_report_type = NORMAL_RX;
510
511
512 if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
513 status->wake_match = BIT(2);
514 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
515 status->wake_match = BIT(1);
516 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
517 status->wake_match = BIT(0);
518 else
519 status->wake_match = 0;
520 if (status->wake_match)
521 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
522 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
523 status->wake_match);
524 rx_status->freq = hw->conf.chandef.chan->center_freq;
525 rx_status->band = hw->conf.chandef.chan->band;
526
527 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
528 status->rx_bufshift);
529
530 if (status->crc)
531 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
532
533 if (status->rx_is40Mhzpacket)
534 rx_status->flag |= RX_FLAG_40MHZ;
535
536 if (status->is_ht)
537 rx_status->flag |= RX_FLAG_HT;
538
539 rx_status->flag |= RX_FLAG_MACTIME_START;
540
541 /* hw will set status->decrypted true, if it finds the
542 * frame is open data frame or mgmt frame.
543 * So hw will not decryption robust managment frame
544 * for IEEE80211w but still set status->decrypted
545 * true, so here we should set it back to undecrypted
546 * for IEEE80211w frame, and mac80211 sw will help
547 * to decrypt it
548 */
549 if (status->decrypted) {
550 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
551 (ieee80211_has_protected(hdr->frame_control)))
552 rx_status->flag |= RX_FLAG_DECRYPTED;
553 else
554 rx_status->flag &= ~RX_FLAG_DECRYPTED;
555 }
556
557 /* rate_idx: index of data rate into band's
558 * supported rates or MCS index if HT rates
559 * are use (RX_FLAG_HT)
560 */
561 rx_status->rate_idx = _rtl8723be_rate_mapping(hw, status->is_ht,
562 status->rate);
563
564 rx_status->mactime = status->timestamp_low;
565 if (phystatus) {
566 p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
567 status->rx_bufshift);
568
569 _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
570 pdesc, p_drvinfo);
571 }
572 rx_status->signal = status->recvsignalpower + 10;
573 if (status->packet_report_type == TX_REPORT2) {
574 status->macid_valid_entry[0] =
575 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
576 status->macid_valid_entry[1] =
577 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
578 }
579 return true;
580 }
581
rtl8723be_tx_fill_desc(struct ieee80211_hw * hw,struct ieee80211_hdr * hdr,u8 * pdesc_tx,u8 * txbd,struct ieee80211_tx_info * info,struct ieee80211_sta * sta,struct sk_buff * skb,u8 hw_queue,struct rtl_tcb_desc * ptcb_desc)582 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
583 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
584 u8 *txbd, struct ieee80211_tx_info *info,
585 struct ieee80211_sta *sta, struct sk_buff *skb,
586 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
587 {
588 struct rtl_priv *rtlpriv = rtl_priv(hw);
589 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
590 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
591 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
592 u8 *pdesc = (u8 *)pdesc_tx;
593 u16 seq_number;
594 __le16 fc = hdr->frame_control;
595 unsigned int buf_len = 0;
596 unsigned int skb_len = skb->len;
597 u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
598 bool firstseg = ((hdr->seq_ctrl &
599 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
600 bool lastseg = ((hdr->frame_control &
601 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
602 dma_addr_t mapping;
603 u8 bw_40 = 0;
604 u8 short_gi = 0;
605
606 if (mac->opmode == NL80211_IFTYPE_STATION) {
607 bw_40 = mac->bw_40;
608 } else if (mac->opmode == NL80211_IFTYPE_AP ||
609 mac->opmode == NL80211_IFTYPE_ADHOC) {
610 if (sta)
611 bw_40 = sta->ht_cap.cap &
612 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
613 }
614 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
615 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
616 /* reserve 8 byte for AMPDU early mode */
617 if (rtlhal->earlymode_enable) {
618 skb_push(skb, EM_HDR_LEN);
619 memset(skb->data, 0, EM_HDR_LEN);
620 }
621 buf_len = skb->len;
622 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
623 PCI_DMA_TODEVICE);
624 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
625 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error");
626 return;
627 }
628 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723be));
629 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
630 firstseg = true;
631 lastseg = true;
632 }
633 if (firstseg) {
634 if (rtlhal->earlymode_enable) {
635 SET_TX_DESC_PKT_OFFSET(pdesc, 1);
636 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
637 EM_HDR_LEN);
638 if (ptcb_desc->empkt_num) {
639 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
640 "Insert 8 byte.pTcb->EMPktNum:%d\n",
641 ptcb_desc->empkt_num);
642 _rtl8723be_insert_emcontent(ptcb_desc,
643 (u8 *)(skb->data));
644 }
645 } else {
646 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
647 }
648
649 /* ptcb_desc->use_driver_rate = true; */
650 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
651 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
652 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
653 else
654 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
655
656 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
657
658 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
659 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
660 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
661 }
662 SET_TX_DESC_SEQ(pdesc, seq_number);
663 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
664 !ptcb_desc->cts_enable) ?
665 1 : 0));
666 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
667 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ?
668 1 : 0));
669
670 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
671
672 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
673 SET_TX_DESC_RTS_SHORT(pdesc,
674 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
675 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
676 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
677
678 if (ptcb_desc->tx_enable_sw_calc_duration)
679 SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
680
681 if (bw_40) {
682 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
683 SET_TX_DESC_DATA_BW(pdesc, 1);
684 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
685 } else {
686 SET_TX_DESC_DATA_BW(pdesc, 0);
687 SET_TX_DESC_TX_SUB_CARRIER(pdesc, mac->cur_40_prime_sc);
688 }
689 } else {
690 SET_TX_DESC_DATA_BW(pdesc, 0);
691 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
692 }
693
694 SET_TX_DESC_LINIP(pdesc, 0);
695 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
696 if (sta) {
697 u8 ampdu_density = sta->ht_cap.ampdu_density;
698 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
699 }
700 if (info->control.hw_key) {
701 struct ieee80211_key_conf *keyconf =
702 info->control.hw_key;
703 switch (keyconf->cipher) {
704 case WLAN_CIPHER_SUITE_WEP40:
705 case WLAN_CIPHER_SUITE_WEP104:
706 case WLAN_CIPHER_SUITE_TKIP:
707 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
708 break;
709 case WLAN_CIPHER_SUITE_CCMP:
710 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
711 break;
712 default:
713 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
714 break;
715 }
716 }
717
718 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
719 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
720 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
721 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
722 1 : 0);
723 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
724
725 /* Set TxRate and RTSRate in TxDesc */
726 /* This prevent Tx initial rate of new-coming packets */
727 /* from being overwritten by retried packet rate.*/
728 if (ieee80211_is_data_qos(fc)) {
729 if (mac->rdg_en) {
730 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
731 "Enable RDG function.\n");
732 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
733 SET_TX_DESC_HTC(pdesc, 1);
734 }
735 }
736 }
737
738 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
739 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
740 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
741 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
742 /* if (rtlpriv->dm.useramask) { */
743 if (1) {
744 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
745 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
746 } else {
747 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
748 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
749 }
750 if (!ieee80211_is_data_qos(fc)) {
751 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
752 SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
753 }
754 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
755 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
756 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
757 SET_TX_DESC_BMC(pdesc, 1);
758 }
759
760 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
761 }
762
rtl8723be_tx_fill_cmddesc(struct ieee80211_hw * hw,u8 * pdesc,bool firstseg,bool lastseg,struct sk_buff * skb)763 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
764 bool firstseg, bool lastseg,
765 struct sk_buff *skb)
766 {
767 struct rtl_priv *rtlpriv = rtl_priv(hw);
768 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
769 u8 fw_queue = QSLT_BEACON;
770
771 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
772 skb->data, skb->len,
773 PCI_DMA_TODEVICE);
774
775 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
776 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
777 "DMA mapping error");
778 return;
779 }
780 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
781
782 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
783
784 SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
785
786 SET_TX_DESC_SEQ(pdesc, 0);
787
788 SET_TX_DESC_LINIP(pdesc, 0);
789
790 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
791
792 SET_TX_DESC_FIRST_SEG(pdesc, 1);
793 SET_TX_DESC_LAST_SEG(pdesc, 1);
794
795 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
796
797 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
798
799 SET_TX_DESC_RATE_ID(pdesc, 0);
800 SET_TX_DESC_MACID(pdesc, 0);
801
802 SET_TX_DESC_OWN(pdesc, 1);
803
804 SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
805
806 SET_TX_DESC_FIRST_SEG(pdesc, 1);
807 SET_TX_DESC_LAST_SEG(pdesc, 1);
808
809 SET_TX_DESC_USE_RATE(pdesc, 1);
810
811 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
812 "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
813 }
814
rtl8723be_set_desc(struct ieee80211_hw * hw,u8 * pdesc,bool istx,u8 desc_name,u8 * val)815 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
816 bool istx, u8 desc_name, u8 *val)
817 {
818 if (istx) {
819 switch (desc_name) {
820 case HW_DESC_OWN:
821 SET_TX_DESC_OWN(pdesc, 1);
822 break;
823 case HW_DESC_TX_NEXTDESC_ADDR:
824 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
825 break;
826 default:
827 RT_ASSERT(false, "ERR txdesc :%d not process\n",
828 desc_name);
829 break;
830 }
831 } else {
832 switch (desc_name) {
833 case HW_DESC_RXOWN:
834 SET_RX_DESC_OWN(pdesc, 1);
835 break;
836 case HW_DESC_RXBUFF_ADDR:
837 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
838 break;
839 case HW_DESC_RXPKT_LEN:
840 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
841 break;
842 case HW_DESC_RXERO:
843 SET_RX_DESC_EOR(pdesc, 1);
844 break;
845 default:
846 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
847 desc_name);
848 break;
849 }
850 }
851 }
852
rtl8723be_get_desc(u8 * pdesc,bool istx,u8 desc_name)853 u32 rtl8723be_get_desc(u8 *pdesc, bool istx, u8 desc_name)
854 {
855 u32 ret = 0;
856
857 if (istx) {
858 switch (desc_name) {
859 case HW_DESC_OWN:
860 ret = GET_TX_DESC_OWN(pdesc);
861 break;
862 case HW_DESC_TXBUFF_ADDR:
863 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
864 break;
865 default:
866 RT_ASSERT(false, "ERR txdesc :%d not process\n",
867 desc_name);
868 break;
869 }
870 } else {
871 switch (desc_name) {
872 case HW_DESC_OWN:
873 ret = GET_RX_DESC_OWN(pdesc);
874 break;
875 case HW_DESC_RXPKT_LEN:
876 ret = GET_RX_DESC_PKT_LEN(pdesc);
877 break;
878 case HW_DESC_RXBUFF_ADDR:
879 ret = GET_RX_DESC_BUFF_ADDR(pdesc);
880 break;
881 default:
882 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
883 desc_name);
884 break;
885 }
886 }
887 return ret;
888 }
889
rtl8723be_is_tx_desc_closed(struct ieee80211_hw * hw,u8 hw_queue,u16 index)890 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
891 u8 hw_queue, u16 index)
892 {
893 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
894 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
895 u8 *entry = (u8 *)(&ring->desc[ring->idx]);
896 u8 own = (u8)rtl8723be_get_desc(entry, true, HW_DESC_OWN);
897
898 /*beacon packet will only use the first
899 *descriptor defautly,and the own may not
900 *be cleared by the hardware
901 */
902 if (own)
903 return false;
904 return true;
905 }
906
rtl8723be_tx_polling(struct ieee80211_hw * hw,u8 hw_queue)907 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
908 {
909 struct rtl_priv *rtlpriv = rtl_priv(hw);
910 if (hw_queue == BEACON_QUEUE) {
911 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
912 } else {
913 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
914 BIT(0) << (hw_queue));
915 }
916 }
917
rtl8723be_rx_command_packet(struct ieee80211_hw * hw,struct rtl_stats status,struct sk_buff * skb)918 u32 rtl8723be_rx_command_packet(struct ieee80211_hw *hw,
919 struct rtl_stats status,
920 struct sk_buff *skb)
921 {
922 u32 result = 0;
923 struct rtl_priv *rtlpriv = rtl_priv(hw);
924
925 switch (status.packet_report_type) {
926 case NORMAL_RX:
927 result = 0;
928 break;
929 case C2H_PACKET:
930 rtl8723be_c2h_packet_handler(hw, skb->data,
931 (u8)skb->len);
932 result = 1;
933 break;
934 default:
935 RT_TRACE(rtlpriv, COMP_RECV, DBG_TRACE,
936 "No this packet type!!\n");
937 break;
938 }
939
940 return result;
941 }
942