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1 /*
2  * i.MX21 pinctrl driver based on imx pinmux core
3  *
4  * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11 
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/platform_device.h>
15 #include <linux/pinctrl/pinctrl.h>
16 
17 #include "pinctrl-imx1.h"
18 
19 #define PAD_ID(port, pin)	((port) * 32 + (pin))
20 #define PA	0
21 #define PB	1
22 #define PC	2
23 #define PD	3
24 #define PE	4
25 #define PF	5
26 
27 enum imx21_pads {
28 	MX21_PAD_LSCLK		= PAD_ID(PA, 5),
29 	MX21_PAD_LD0		= PAD_ID(PA, 6),
30 	MX21_PAD_LD1		= PAD_ID(PA, 7),
31 	MX21_PAD_LD2		= PAD_ID(PA, 8),
32 	MX21_PAD_LD3		= PAD_ID(PA, 9),
33 	MX21_PAD_LD4		= PAD_ID(PA, 10),
34 	MX21_PAD_LD5		= PAD_ID(PA, 11),
35 	MX21_PAD_LD6		= PAD_ID(PA, 12),
36 	MX21_PAD_LD7		= PAD_ID(PA, 13),
37 	MX21_PAD_LD8		= PAD_ID(PA, 14),
38 	MX21_PAD_LD9		= PAD_ID(PA, 15),
39 	MX21_PAD_LD10		= PAD_ID(PA, 16),
40 	MX21_PAD_LD11		= PAD_ID(PA, 17),
41 	MX21_PAD_LD12		= PAD_ID(PA, 18),
42 	MX21_PAD_LD13		= PAD_ID(PA, 19),
43 	MX21_PAD_LD14		= PAD_ID(PA, 20),
44 	MX21_PAD_LD15		= PAD_ID(PA, 21),
45 	MX21_PAD_LD16		= PAD_ID(PA, 22),
46 	MX21_PAD_LD17		= PAD_ID(PA, 23),
47 	MX21_PAD_REV		= PAD_ID(PA, 24),
48 	MX21_PAD_CLS		= PAD_ID(PA, 25),
49 	MX21_PAD_PS		= PAD_ID(PA, 26),
50 	MX21_PAD_SPL_SPR	= PAD_ID(PA, 27),
51 	MX21_PAD_HSYNC		= PAD_ID(PA, 28),
52 	MX21_PAD_VSYNC		= PAD_ID(PA, 29),
53 	MX21_PAD_CONTRAST	= PAD_ID(PA, 30),
54 	MX21_PAD_OE_ACD		= PAD_ID(PA, 31),
55 	MX21_PAD_SD2_D0		= PAD_ID(PB, 4),
56 	MX21_PAD_SD2_D1		= PAD_ID(PB, 5),
57 	MX21_PAD_SD2_D2		= PAD_ID(PB, 6),
58 	MX21_PAD_SD2_D3		= PAD_ID(PB, 7),
59 	MX21_PAD_SD2_CMD	= PAD_ID(PB, 8),
60 	MX21_PAD_SD2_CLK	= PAD_ID(PB, 9),
61 	MX21_PAD_CSI_D0		= PAD_ID(PB, 10),
62 	MX21_PAD_CSI_D1		= PAD_ID(PB, 11),
63 	MX21_PAD_CSI_D2		= PAD_ID(PB, 12),
64 	MX21_PAD_CSI_D3		= PAD_ID(PB, 13),
65 	MX21_PAD_CSI_D4		= PAD_ID(PB, 14),
66 	MX21_PAD_CSI_MCLK	= PAD_ID(PB, 15),
67 	MX21_PAD_CSI_PIXCLK	= PAD_ID(PB, 16),
68 	MX21_PAD_CSI_D5		= PAD_ID(PB, 17),
69 	MX21_PAD_CSI_D6		= PAD_ID(PB, 18),
70 	MX21_PAD_CSI_D7		= PAD_ID(PB, 19),
71 	MX21_PAD_CSI_VSYNC	= PAD_ID(PB, 20),
72 	MX21_PAD_CSI_HSYNC	= PAD_ID(PB, 21),
73 	MX21_PAD_USB_BYP	= PAD_ID(PB, 22),
74 	MX21_PAD_USB_PWR	= PAD_ID(PB, 23),
75 	MX21_PAD_USB_OC		= PAD_ID(PB, 24),
76 	MX21_PAD_USBH_ON	= PAD_ID(PB, 25),
77 	MX21_PAD_USBH1_FS	= PAD_ID(PB, 26),
78 	MX21_PAD_USBH1_OE	= PAD_ID(PB, 27),
79 	MX21_PAD_USBH1_TXDM	= PAD_ID(PB, 28),
80 	MX21_PAD_USBH1_TXDP	= PAD_ID(PB, 29),
81 	MX21_PAD_USBH1_RXDM	= PAD_ID(PB, 30),
82 	MX21_PAD_USBH1_RXDP	= PAD_ID(PB, 31),
83 	MX21_PAD_USBG_SDA	= PAD_ID(PC, 5),
84 	MX21_PAD_USBG_SCL	= PAD_ID(PC, 6),
85 	MX21_PAD_USBG_ON	= PAD_ID(PC, 7),
86 	MX21_PAD_USBG_FS	= PAD_ID(PC, 8),
87 	MX21_PAD_USBG_OE	= PAD_ID(PC, 9),
88 	MX21_PAD_USBG_TXDM	= PAD_ID(PC, 10),
89 	MX21_PAD_USBG_TXDP	= PAD_ID(PC, 11),
90 	MX21_PAD_USBG_RXDM	= PAD_ID(PC, 12),
91 	MX21_PAD_USBG_RXDP	= PAD_ID(PC, 13),
92 	MX21_PAD_TOUT		= PAD_ID(PC, 14),
93 	MX21_PAD_TIN		= PAD_ID(PC, 15),
94 	MX21_PAD_SAP_FS		= PAD_ID(PC, 16),
95 	MX21_PAD_SAP_RXD	= PAD_ID(PC, 17),
96 	MX21_PAD_SAP_TXD	= PAD_ID(PC, 18),
97 	MX21_PAD_SAP_CLK	= PAD_ID(PC, 19),
98 	MX21_PAD_SSI1_FS	= PAD_ID(PC, 20),
99 	MX21_PAD_SSI1_RXD	= PAD_ID(PC, 21),
100 	MX21_PAD_SSI1_TXD	= PAD_ID(PC, 22),
101 	MX21_PAD_SSI1_CLK	= PAD_ID(PC, 23),
102 	MX21_PAD_SSI2_FS	= PAD_ID(PC, 24),
103 	MX21_PAD_SSI2_RXD	= PAD_ID(PC, 25),
104 	MX21_PAD_SSI2_TXD	= PAD_ID(PC, 26),
105 	MX21_PAD_SSI2_CLK	= PAD_ID(PC, 27),
106 	MX21_PAD_SSI3_FS	= PAD_ID(PC, 28),
107 	MX21_PAD_SSI3_RXD	= PAD_ID(PC, 29),
108 	MX21_PAD_SSI3_TXD	= PAD_ID(PC, 30),
109 	MX21_PAD_SSI3_CLK	= PAD_ID(PC, 31),
110 	MX21_PAD_I2C_DATA	= PAD_ID(PD, 17),
111 	MX21_PAD_I2C_CLK	= PAD_ID(PD, 18),
112 	MX21_PAD_CSPI2_SS2	= PAD_ID(PD, 19),
113 	MX21_PAD_CSPI2_SS1	= PAD_ID(PD, 20),
114 	MX21_PAD_CSPI2_SS0	= PAD_ID(PD, 21),
115 	MX21_PAD_CSPI2_SCLK	= PAD_ID(PD, 22),
116 	MX21_PAD_CSPI2_MISO	= PAD_ID(PD, 23),
117 	MX21_PAD_CSPI2_MOSI	= PAD_ID(PD, 24),
118 	MX21_PAD_CSPI1_RDY	= PAD_ID(PD, 25),
119 	MX21_PAD_CSPI1_SS2	= PAD_ID(PD, 26),
120 	MX21_PAD_CSPI1_SS1	= PAD_ID(PD, 27),
121 	MX21_PAD_CSPI1_SS0	= PAD_ID(PD, 28),
122 	MX21_PAD_CSPI1_SCLK	= PAD_ID(PD, 29),
123 	MX21_PAD_CSPI1_MISO	= PAD_ID(PD, 30),
124 	MX21_PAD_CSPI1_MOSI	= PAD_ID(PD, 31),
125 	MX21_PAD_TEST_WB2	= PAD_ID(PE, 0),
126 	MX21_PAD_TEST_WB1	= PAD_ID(PE, 1),
127 	MX21_PAD_TEST_WB0	= PAD_ID(PE, 2),
128 	MX21_PAD_UART2_CTS	= PAD_ID(PE, 3),
129 	MX21_PAD_UART2_RTS	= PAD_ID(PE, 4),
130 	MX21_PAD_PWMO		= PAD_ID(PE, 5),
131 	MX21_PAD_UART2_TXD	= PAD_ID(PE, 6),
132 	MX21_PAD_UART2_RXD	= PAD_ID(PE, 7),
133 	MX21_PAD_UART3_TXD	= PAD_ID(PE, 8),
134 	MX21_PAD_UART3_RXD	= PAD_ID(PE, 9),
135 	MX21_PAD_UART3_CTS	= PAD_ID(PE, 10),
136 	MX21_PAD_UART3_RTS	= PAD_ID(PE, 11),
137 	MX21_PAD_UART1_TXD	= PAD_ID(PE, 12),
138 	MX21_PAD_UART1_RXD	= PAD_ID(PE, 13),
139 	MX21_PAD_UART1_CTS	= PAD_ID(PE, 14),
140 	MX21_PAD_UART1_RTS	= PAD_ID(PE, 15),
141 	MX21_PAD_RTCK		= PAD_ID(PE, 16),
142 	MX21_PAD_RESET_OUT	= PAD_ID(PE, 17),
143 	MX21_PAD_SD1_D0		= PAD_ID(PE, 18),
144 	MX21_PAD_SD1_D1		= PAD_ID(PE, 19),
145 	MX21_PAD_SD1_D2		= PAD_ID(PE, 20),
146 	MX21_PAD_SD1_D3		= PAD_ID(PE, 21),
147 	MX21_PAD_SD1_CMD	= PAD_ID(PE, 22),
148 	MX21_PAD_SD1_CLK	= PAD_ID(PE, 23),
149 	MX21_PAD_NFRB		= PAD_ID(PF, 0),
150 	MX21_PAD_NFCE		= PAD_ID(PF, 1),
151 	MX21_PAD_NFWP		= PAD_ID(PF, 2),
152 	MX21_PAD_NFCLE		= PAD_ID(PF, 3),
153 	MX21_PAD_NFALE		= PAD_ID(PF, 4),
154 	MX21_PAD_NFRE		= PAD_ID(PF, 5),
155 	MX21_PAD_NFWE		= PAD_ID(PF, 6),
156 	MX21_PAD_NFIO0		= PAD_ID(PF, 7),
157 	MX21_PAD_NFIO1		= PAD_ID(PF, 8),
158 	MX21_PAD_NFIO2		= PAD_ID(PF, 9),
159 	MX21_PAD_NFIO3		= PAD_ID(PF, 10),
160 	MX21_PAD_NFIO4		= PAD_ID(PF, 11),
161 	MX21_PAD_NFIO5		= PAD_ID(PF, 12),
162 	MX21_PAD_NFIO6		= PAD_ID(PF, 13),
163 	MX21_PAD_NFIO7		= PAD_ID(PF, 14),
164 	MX21_PAD_CLKO		= PAD_ID(PF, 15),
165 	MX21_PAD_RESERVED	= PAD_ID(PF, 16),
166 	MX21_PAD_CS4		= PAD_ID(PF, 21),
167 	MX21_PAD_CS5		= PAD_ID(PF, 22),
168 };
169 
170 /* Pad names for the pinmux subsystem */
171 static const struct pinctrl_pin_desc imx21_pinctrl_pads[] = {
172 	IMX_PINCTRL_PIN(MX21_PAD_LSCLK),
173 	IMX_PINCTRL_PIN(MX21_PAD_LD0),
174 	IMX_PINCTRL_PIN(MX21_PAD_LD1),
175 	IMX_PINCTRL_PIN(MX21_PAD_LD2),
176 	IMX_PINCTRL_PIN(MX21_PAD_LD3),
177 	IMX_PINCTRL_PIN(MX21_PAD_LD4),
178 	IMX_PINCTRL_PIN(MX21_PAD_LD5),
179 	IMX_PINCTRL_PIN(MX21_PAD_LD6),
180 	IMX_PINCTRL_PIN(MX21_PAD_LD7),
181 	IMX_PINCTRL_PIN(MX21_PAD_LD8),
182 	IMX_PINCTRL_PIN(MX21_PAD_LD9),
183 	IMX_PINCTRL_PIN(MX21_PAD_LD10),
184 	IMX_PINCTRL_PIN(MX21_PAD_LD11),
185 	IMX_PINCTRL_PIN(MX21_PAD_LD12),
186 	IMX_PINCTRL_PIN(MX21_PAD_LD13),
187 	IMX_PINCTRL_PIN(MX21_PAD_LD14),
188 	IMX_PINCTRL_PIN(MX21_PAD_LD15),
189 	IMX_PINCTRL_PIN(MX21_PAD_LD16),
190 	IMX_PINCTRL_PIN(MX21_PAD_LD17),
191 	IMX_PINCTRL_PIN(MX21_PAD_REV),
192 	IMX_PINCTRL_PIN(MX21_PAD_CLS),
193 	IMX_PINCTRL_PIN(MX21_PAD_PS),
194 	IMX_PINCTRL_PIN(MX21_PAD_SPL_SPR),
195 	IMX_PINCTRL_PIN(MX21_PAD_HSYNC),
196 	IMX_PINCTRL_PIN(MX21_PAD_VSYNC),
197 	IMX_PINCTRL_PIN(MX21_PAD_CONTRAST),
198 	IMX_PINCTRL_PIN(MX21_PAD_OE_ACD),
199 	IMX_PINCTRL_PIN(MX21_PAD_SD2_D0),
200 	IMX_PINCTRL_PIN(MX21_PAD_SD2_D1),
201 	IMX_PINCTRL_PIN(MX21_PAD_SD2_D2),
202 	IMX_PINCTRL_PIN(MX21_PAD_SD2_D3),
203 	IMX_PINCTRL_PIN(MX21_PAD_SD2_CMD),
204 	IMX_PINCTRL_PIN(MX21_PAD_SD2_CLK),
205 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D0),
206 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D1),
207 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D2),
208 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D3),
209 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D4),
210 	IMX_PINCTRL_PIN(MX21_PAD_CSI_MCLK),
211 	IMX_PINCTRL_PIN(MX21_PAD_CSI_PIXCLK),
212 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D5),
213 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D6),
214 	IMX_PINCTRL_PIN(MX21_PAD_CSI_D7),
215 	IMX_PINCTRL_PIN(MX21_PAD_CSI_VSYNC),
216 	IMX_PINCTRL_PIN(MX21_PAD_CSI_HSYNC),
217 	IMX_PINCTRL_PIN(MX21_PAD_USB_BYP),
218 	IMX_PINCTRL_PIN(MX21_PAD_USB_PWR),
219 	IMX_PINCTRL_PIN(MX21_PAD_USB_OC),
220 	IMX_PINCTRL_PIN(MX21_PAD_USBH_ON),
221 	IMX_PINCTRL_PIN(MX21_PAD_USBH1_FS),
222 	IMX_PINCTRL_PIN(MX21_PAD_USBH1_OE),
223 	IMX_PINCTRL_PIN(MX21_PAD_USBH1_TXDM),
224 	IMX_PINCTRL_PIN(MX21_PAD_USBH1_TXDP),
225 	IMX_PINCTRL_PIN(MX21_PAD_USBH1_RXDM),
226 	IMX_PINCTRL_PIN(MX21_PAD_USBH1_RXDP),
227 	IMX_PINCTRL_PIN(MX21_PAD_USBG_SDA),
228 	IMX_PINCTRL_PIN(MX21_PAD_USBG_SCL),
229 	IMX_PINCTRL_PIN(MX21_PAD_USBG_ON),
230 	IMX_PINCTRL_PIN(MX21_PAD_USBG_FS),
231 	IMX_PINCTRL_PIN(MX21_PAD_USBG_OE),
232 	IMX_PINCTRL_PIN(MX21_PAD_USBG_TXDM),
233 	IMX_PINCTRL_PIN(MX21_PAD_USBG_TXDP),
234 	IMX_PINCTRL_PIN(MX21_PAD_USBG_RXDM),
235 	IMX_PINCTRL_PIN(MX21_PAD_USBG_RXDP),
236 	IMX_PINCTRL_PIN(MX21_PAD_TOUT),
237 	IMX_PINCTRL_PIN(MX21_PAD_TIN),
238 	IMX_PINCTRL_PIN(MX21_PAD_SAP_FS),
239 	IMX_PINCTRL_PIN(MX21_PAD_SAP_RXD),
240 	IMX_PINCTRL_PIN(MX21_PAD_SAP_TXD),
241 	IMX_PINCTRL_PIN(MX21_PAD_SAP_CLK),
242 	IMX_PINCTRL_PIN(MX21_PAD_SSI1_FS),
243 	IMX_PINCTRL_PIN(MX21_PAD_SSI1_RXD),
244 	IMX_PINCTRL_PIN(MX21_PAD_SSI1_TXD),
245 	IMX_PINCTRL_PIN(MX21_PAD_SSI1_CLK),
246 	IMX_PINCTRL_PIN(MX21_PAD_SSI2_FS),
247 	IMX_PINCTRL_PIN(MX21_PAD_SSI2_RXD),
248 	IMX_PINCTRL_PIN(MX21_PAD_SSI2_TXD),
249 	IMX_PINCTRL_PIN(MX21_PAD_SSI2_CLK),
250 	IMX_PINCTRL_PIN(MX21_PAD_SSI3_FS),
251 	IMX_PINCTRL_PIN(MX21_PAD_SSI3_RXD),
252 	IMX_PINCTRL_PIN(MX21_PAD_SSI3_TXD),
253 	IMX_PINCTRL_PIN(MX21_PAD_SSI3_CLK),
254 	IMX_PINCTRL_PIN(MX21_PAD_I2C_DATA),
255 	IMX_PINCTRL_PIN(MX21_PAD_I2C_CLK),
256 	IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SS2),
257 	IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SS1),
258 	IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SS0),
259 	IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SCLK),
260 	IMX_PINCTRL_PIN(MX21_PAD_CSPI2_MISO),
261 	IMX_PINCTRL_PIN(MX21_PAD_CSPI2_MOSI),
262 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_RDY),
263 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SS2),
264 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SS1),
265 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SS0),
266 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SCLK),
267 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_MISO),
268 	IMX_PINCTRL_PIN(MX21_PAD_CSPI1_MOSI),
269 	IMX_PINCTRL_PIN(MX21_PAD_TEST_WB2),
270 	IMX_PINCTRL_PIN(MX21_PAD_TEST_WB1),
271 	IMX_PINCTRL_PIN(MX21_PAD_TEST_WB0),
272 	IMX_PINCTRL_PIN(MX21_PAD_UART2_CTS),
273 	IMX_PINCTRL_PIN(MX21_PAD_UART2_RTS),
274 	IMX_PINCTRL_PIN(MX21_PAD_PWMO),
275 	IMX_PINCTRL_PIN(MX21_PAD_UART2_TXD),
276 	IMX_PINCTRL_PIN(MX21_PAD_UART2_RXD),
277 	IMX_PINCTRL_PIN(MX21_PAD_UART3_TXD),
278 	IMX_PINCTRL_PIN(MX21_PAD_UART3_RXD),
279 	IMX_PINCTRL_PIN(MX21_PAD_UART3_CTS),
280 	IMX_PINCTRL_PIN(MX21_PAD_UART3_RTS),
281 	IMX_PINCTRL_PIN(MX21_PAD_UART1_TXD),
282 	IMX_PINCTRL_PIN(MX21_PAD_UART1_RXD),
283 	IMX_PINCTRL_PIN(MX21_PAD_UART1_CTS),
284 	IMX_PINCTRL_PIN(MX21_PAD_UART1_RTS),
285 	IMX_PINCTRL_PIN(MX21_PAD_RTCK),
286 	IMX_PINCTRL_PIN(MX21_PAD_RESET_OUT),
287 	IMX_PINCTRL_PIN(MX21_PAD_SD1_D0),
288 	IMX_PINCTRL_PIN(MX21_PAD_SD1_D1),
289 	IMX_PINCTRL_PIN(MX21_PAD_SD1_D2),
290 	IMX_PINCTRL_PIN(MX21_PAD_SD1_D3),
291 	IMX_PINCTRL_PIN(MX21_PAD_SD1_CMD),
292 	IMX_PINCTRL_PIN(MX21_PAD_SD1_CLK),
293 	IMX_PINCTRL_PIN(MX21_PAD_NFRB),
294 	IMX_PINCTRL_PIN(MX21_PAD_NFCE),
295 	IMX_PINCTRL_PIN(MX21_PAD_NFWP),
296 	IMX_PINCTRL_PIN(MX21_PAD_NFCLE),
297 	IMX_PINCTRL_PIN(MX21_PAD_NFALE),
298 	IMX_PINCTRL_PIN(MX21_PAD_NFRE),
299 	IMX_PINCTRL_PIN(MX21_PAD_NFWE),
300 	IMX_PINCTRL_PIN(MX21_PAD_NFIO0),
301 	IMX_PINCTRL_PIN(MX21_PAD_NFIO1),
302 	IMX_PINCTRL_PIN(MX21_PAD_NFIO2),
303 	IMX_PINCTRL_PIN(MX21_PAD_NFIO3),
304 	IMX_PINCTRL_PIN(MX21_PAD_NFIO4),
305 	IMX_PINCTRL_PIN(MX21_PAD_NFIO5),
306 	IMX_PINCTRL_PIN(MX21_PAD_NFIO6),
307 	IMX_PINCTRL_PIN(MX21_PAD_NFIO7),
308 	IMX_PINCTRL_PIN(MX21_PAD_CLKO),
309 	IMX_PINCTRL_PIN(MX21_PAD_RESERVED),
310 	IMX_PINCTRL_PIN(MX21_PAD_CS4),
311 	IMX_PINCTRL_PIN(MX21_PAD_CS5),
312 };
313 
314 static struct imx1_pinctrl_soc_info imx21_pinctrl_info = {
315 	.pins	= imx21_pinctrl_pads,
316 	.npins	= ARRAY_SIZE(imx21_pinctrl_pads),
317 };
318 
imx21_pinctrl_probe(struct platform_device * pdev)319 static int __init imx21_pinctrl_probe(struct platform_device *pdev)
320 {
321 	return imx1_pinctrl_core_probe(pdev, &imx21_pinctrl_info);
322 }
323 
324 static const struct of_device_id imx21_pinctrl_of_match[] = {
325 	{ .compatible = "fsl,imx21-iomuxc", },
326 	{ }
327 };
328 MODULE_DEVICE_TABLE(of, imx21_pinctrl_of_match);
329 
330 static struct platform_driver imx21_pinctrl_driver = {
331 	.driver	= {
332 		.name		= "imx21-pinctrl",
333 		.owner		= THIS_MODULE,
334 		.of_match_table	= imx21_pinctrl_of_match,
335 	},
336 	.remove	= imx1_pinctrl_core_remove,
337 };
338 module_platform_driver_probe(imx21_pinctrl_driver, imx21_pinctrl_probe);
339 
340 MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
341 MODULE_DESCRIPTION("Freescale i.MX21 pinctrl driver");
342 MODULE_LICENSE("GPL");
343