1 /*
2 * Marvell Armada XP pinctrl driver based on mvebu pinctrl core
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This file supports the three variants of Armada XP SoCs that are
14 * available: mv78230, mv78260 and mv78460. From a pin muxing
15 * perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460
16 * both have 67 MPP pins (more GPIOs and address lines for the memory
17 * bus mainly).
18 */
19
20 #include <linux/err.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/of.h>
27 #include <linux/of_device.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/bitops.h>
30
31 #include "pinctrl-mvebu.h"
32
33 static void __iomem *mpp_base;
34
armada_xp_mpp_ctrl_get(unsigned pid,unsigned long * config)35 static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config)
36 {
37 return default_mpp_ctrl_get(mpp_base, pid, config);
38 }
39
armada_xp_mpp_ctrl_set(unsigned pid,unsigned long config)40 static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config)
41 {
42 return default_mpp_ctrl_set(mpp_base, pid, config);
43 }
44
45 enum armada_xp_variant {
46 V_MV78230 = BIT(0),
47 V_MV78260 = BIT(1),
48 V_MV78460 = BIT(2),
49 V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460),
50 V_MV78260_PLUS = (V_MV78260 | V_MV78460),
51 };
52
53 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
54 MPP_MODE(0,
55 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
56 MPP_VAR_FUNCTION(0x1, "ge0", "txclko", V_MV78230_PLUS),
57 MPP_VAR_FUNCTION(0x4, "lcd", "d0", V_MV78230_PLUS)),
58 MPP_MODE(1,
59 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
60 MPP_VAR_FUNCTION(0x1, "ge0", "txd0", V_MV78230_PLUS),
61 MPP_VAR_FUNCTION(0x4, "lcd", "d1", V_MV78230_PLUS)),
62 MPP_MODE(2,
63 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
64 MPP_VAR_FUNCTION(0x1, "ge0", "txd1", V_MV78230_PLUS),
65 MPP_VAR_FUNCTION(0x4, "lcd", "d2", V_MV78230_PLUS)),
66 MPP_MODE(3,
67 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
68 MPP_VAR_FUNCTION(0x1, "ge0", "txd2", V_MV78230_PLUS),
69 MPP_VAR_FUNCTION(0x4, "lcd", "d3", V_MV78230_PLUS)),
70 MPP_MODE(4,
71 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
72 MPP_VAR_FUNCTION(0x1, "ge0", "txd3", V_MV78230_PLUS),
73 MPP_VAR_FUNCTION(0x4, "lcd", "d4", V_MV78230_PLUS)),
74 MPP_MODE(5,
75 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
76 MPP_VAR_FUNCTION(0x1, "ge0", "txctl", V_MV78230_PLUS),
77 MPP_VAR_FUNCTION(0x4, "lcd", "d5", V_MV78230_PLUS)),
78 MPP_MODE(6,
79 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
80 MPP_VAR_FUNCTION(0x1, "ge0", "rxd0", V_MV78230_PLUS),
81 MPP_VAR_FUNCTION(0x4, "lcd", "d6", V_MV78230_PLUS)),
82 MPP_MODE(7,
83 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
84 MPP_VAR_FUNCTION(0x1, "ge0", "rxd1", V_MV78230_PLUS),
85 MPP_VAR_FUNCTION(0x4, "lcd", "d7", V_MV78230_PLUS)),
86 MPP_MODE(8,
87 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
88 MPP_VAR_FUNCTION(0x1, "ge0", "rxd2", V_MV78230_PLUS),
89 MPP_VAR_FUNCTION(0x4, "lcd", "d8", V_MV78230_PLUS)),
90 MPP_MODE(9,
91 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
92 MPP_VAR_FUNCTION(0x1, "ge0", "rxd3", V_MV78230_PLUS),
93 MPP_VAR_FUNCTION(0x4, "lcd", "d9", V_MV78230_PLUS)),
94 MPP_MODE(10,
95 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
96 MPP_VAR_FUNCTION(0x1, "ge0", "rxctl", V_MV78230_PLUS),
97 MPP_VAR_FUNCTION(0x4, "lcd", "d10", V_MV78230_PLUS)),
98 MPP_MODE(11,
99 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
100 MPP_VAR_FUNCTION(0x1, "ge0", "rxclk", V_MV78230_PLUS),
101 MPP_VAR_FUNCTION(0x4, "lcd", "d11", V_MV78230_PLUS)),
102 MPP_MODE(12,
103 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
104 MPP_VAR_FUNCTION(0x1, "ge0", "txd4", V_MV78230_PLUS),
105 MPP_VAR_FUNCTION(0x2, "ge1", "clkout", V_MV78230_PLUS),
106 MPP_VAR_FUNCTION(0x4, "lcd", "d12", V_MV78230_PLUS)),
107 MPP_MODE(13,
108 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
109 MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS),
110 MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS),
111 MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)),
112 MPP_MODE(14,
113 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
114 MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS),
115 MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS),
116 MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)),
117 MPP_MODE(15,
118 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
119 MPP_VAR_FUNCTION(0x1, "ge0", "txd7", V_MV78230_PLUS),
120 MPP_VAR_FUNCTION(0x2, "ge1", "txd2", V_MV78230_PLUS),
121 MPP_VAR_FUNCTION(0x4, "lcd", "d15", V_MV78230_PLUS)),
122 MPP_MODE(16,
123 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
124 MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS),
125 MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS),
126 MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)),
127 MPP_MODE(17,
128 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
129 MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS),
130 MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS),
131 MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)),
132 MPP_MODE(18,
133 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
134 MPP_VAR_FUNCTION(0x1, "ge0", "rxerr", V_MV78230_PLUS),
135 MPP_VAR_FUNCTION(0x2, "ge1", "rxd0", V_MV78230_PLUS),
136 MPP_VAR_FUNCTION(0x3, "ptp", "trig", V_MV78230_PLUS),
137 MPP_VAR_FUNCTION(0x4, "lcd", "d18", V_MV78230_PLUS)),
138 MPP_MODE(19,
139 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
140 MPP_VAR_FUNCTION(0x1, "ge0", "crs", V_MV78230_PLUS),
141 MPP_VAR_FUNCTION(0x2, "ge1", "rxd1", V_MV78230_PLUS),
142 MPP_VAR_FUNCTION(0x3, "ptp", "evreq", V_MV78230_PLUS),
143 MPP_VAR_FUNCTION(0x4, "lcd", "d19", V_MV78230_PLUS)),
144 MPP_MODE(20,
145 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
146 MPP_VAR_FUNCTION(0x1, "ge0", "rxd4", V_MV78230_PLUS),
147 MPP_VAR_FUNCTION(0x2, "ge1", "rxd2", V_MV78230_PLUS),
148 MPP_VAR_FUNCTION(0x3, "ptp", "clk", V_MV78230_PLUS),
149 MPP_VAR_FUNCTION(0x4, "lcd", "d20", V_MV78230_PLUS)),
150 MPP_MODE(21,
151 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
152 MPP_VAR_FUNCTION(0x1, "ge0", "rxd5", V_MV78230_PLUS),
153 MPP_VAR_FUNCTION(0x2, "ge1", "rxd3", V_MV78230_PLUS),
154 MPP_VAR_FUNCTION(0x3, "mem", "bat", V_MV78230_PLUS),
155 MPP_VAR_FUNCTION(0x4, "lcd", "d21", V_MV78230_PLUS)),
156 MPP_MODE(22,
157 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
158 MPP_VAR_FUNCTION(0x1, "ge0", "rxd6", V_MV78230_PLUS),
159 MPP_VAR_FUNCTION(0x2, "ge1", "rxctl", V_MV78230_PLUS),
160 MPP_VAR_FUNCTION(0x3, "sata0", "prsnt", V_MV78230_PLUS),
161 MPP_VAR_FUNCTION(0x4, "lcd", "d22", V_MV78230_PLUS)),
162 MPP_MODE(23,
163 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
164 MPP_VAR_FUNCTION(0x1, "ge0", "rxd7", V_MV78230_PLUS),
165 MPP_VAR_FUNCTION(0x2, "ge1", "rxclk", V_MV78230_PLUS),
166 MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
167 MPP_VAR_FUNCTION(0x4, "lcd", "d23", V_MV78230_PLUS)),
168 MPP_MODE(24,
169 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
170 MPP_VAR_FUNCTION(0x1, "sata1", "prsnt", V_MV78230_PLUS),
171 MPP_VAR_FUNCTION(0x3, "tdm", "rst", V_MV78230_PLUS),
172 MPP_VAR_FUNCTION(0x4, "lcd", "hsync", V_MV78230_PLUS)),
173 MPP_MODE(25,
174 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
175 MPP_VAR_FUNCTION(0x1, "sata0", "prsnt", V_MV78230_PLUS),
176 MPP_VAR_FUNCTION(0x3, "tdm", "pclk", V_MV78230_PLUS),
177 MPP_VAR_FUNCTION(0x4, "lcd", "vsync", V_MV78230_PLUS)),
178 MPP_MODE(26,
179 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
180 MPP_VAR_FUNCTION(0x3, "tdm", "fsync", V_MV78230_PLUS),
181 MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS)),
182 MPP_MODE(27,
183 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
184 MPP_VAR_FUNCTION(0x1, "ptp", "trig", V_MV78230_PLUS),
185 MPP_VAR_FUNCTION(0x3, "tdm", "dtx", V_MV78230_PLUS),
186 MPP_VAR_FUNCTION(0x4, "lcd", "e", V_MV78230_PLUS)),
187 MPP_MODE(28,
188 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
189 MPP_VAR_FUNCTION(0x1, "ptp", "evreq", V_MV78230_PLUS),
190 MPP_VAR_FUNCTION(0x3, "tdm", "drx", V_MV78230_PLUS),
191 MPP_VAR_FUNCTION(0x4, "lcd", "pwm", V_MV78230_PLUS)),
192 MPP_MODE(29,
193 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
194 MPP_VAR_FUNCTION(0x1, "ptp", "clk", V_MV78230_PLUS),
195 MPP_VAR_FUNCTION(0x3, "tdm", "int0", V_MV78230_PLUS),
196 MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS)),
197 MPP_MODE(30,
198 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
199 MPP_VAR_FUNCTION(0x1, "sd0", "clk", V_MV78230_PLUS),
200 MPP_VAR_FUNCTION(0x3, "tdm", "int1", V_MV78230_PLUS)),
201 MPP_MODE(31,
202 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
203 MPP_VAR_FUNCTION(0x1, "sd0", "cmd", V_MV78230_PLUS),
204 MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS)),
205 MPP_MODE(32,
206 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
207 MPP_VAR_FUNCTION(0x1, "sd0", "d0", V_MV78230_PLUS),
208 MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS)),
209 MPP_MODE(33,
210 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
211 MPP_VAR_FUNCTION(0x1, "sd0", "d1", V_MV78230_PLUS),
212 MPP_VAR_FUNCTION(0x3, "tdm", "int4", V_MV78230_PLUS),
213 MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS)),
214 MPP_MODE(34,
215 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
216 MPP_VAR_FUNCTION(0x1, "sd0", "d2", V_MV78230_PLUS),
217 MPP_VAR_FUNCTION(0x2, "sata0", "prsnt", V_MV78230_PLUS),
218 MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS)),
219 MPP_MODE(35,
220 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
221 MPP_VAR_FUNCTION(0x1, "sd0", "d3", V_MV78230_PLUS),
222 MPP_VAR_FUNCTION(0x2, "sata1", "prsnt", V_MV78230_PLUS),
223 MPP_VAR_FUNCTION(0x3, "tdm", "int6", V_MV78230_PLUS)),
224 MPP_MODE(36,
225 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
226 MPP_VAR_FUNCTION(0x1, "spi", "mosi", V_MV78230_PLUS)),
227 MPP_MODE(37,
228 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
229 MPP_VAR_FUNCTION(0x1, "spi", "miso", V_MV78230_PLUS)),
230 MPP_MODE(38,
231 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
232 MPP_VAR_FUNCTION(0x1, "spi", "sck", V_MV78230_PLUS)),
233 MPP_MODE(39,
234 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
235 MPP_VAR_FUNCTION(0x1, "spi", "cs0", V_MV78230_PLUS)),
236 MPP_MODE(40,
237 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
238 MPP_VAR_FUNCTION(0x1, "spi", "cs1", V_MV78230_PLUS),
239 MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS),
240 MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
241 MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS)),
242 MPP_MODE(41,
243 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
244 MPP_VAR_FUNCTION(0x1, "spi", "cs2", V_MV78230_PLUS),
245 MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS),
246 MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
247 MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS),
248 MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS)),
249 MPP_MODE(42,
250 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
251 MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS),
252 MPP_VAR_FUNCTION(0x2, "uart0", "cts", V_MV78230_PLUS),
253 MPP_VAR_FUNCTION(0x3, "tdm", "int7", V_MV78230_PLUS),
254 MPP_VAR_FUNCTION(0x4, "tdm-1", "timer", V_MV78230_PLUS)),
255 MPP_MODE(43,
256 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
257 MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS),
258 MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS),
259 MPP_VAR_FUNCTION(0x3, "spi", "cs3", V_MV78230_PLUS),
260 MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS)),
261 MPP_MODE(44,
262 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
263 MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS),
264 MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS),
265 MPP_VAR_FUNCTION(0x3, "spi", "cs4", V_MV78230_PLUS),
266 MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS),
267 MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS)),
268 MPP_MODE(45,
269 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
270 MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS),
271 MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS),
272 MPP_VAR_FUNCTION(0x3, "spi", "cs5", V_MV78230_PLUS),
273 MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS)),
274 MPP_MODE(46,
275 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
276 MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS),
277 MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS),
278 MPP_VAR_FUNCTION(0x3, "spi", "cs6", V_MV78230_PLUS),
279 MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS)),
280 MPP_MODE(47,
281 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
282 MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS),
283 MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS),
284 MPP_VAR_FUNCTION(0x3, "spi", "cs7", V_MV78230_PLUS),
285 MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS),
286 MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS)),
287 MPP_MODE(48,
288 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
289 MPP_VAR_FUNCTION(0x1, "dev", "clkout", V_MV78230_PLUS),
290 MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
291 MPP_MODE(49,
292 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
293 MPP_VAR_FUNCTION(0x1, "dev", "we3", V_MV78260_PLUS)),
294 MPP_MODE(50,
295 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
296 MPP_VAR_FUNCTION(0x1, "dev", "we2", V_MV78260_PLUS)),
297 MPP_MODE(51,
298 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
299 MPP_VAR_FUNCTION(0x1, "dev", "ad16", V_MV78260_PLUS)),
300 MPP_MODE(52,
301 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
302 MPP_VAR_FUNCTION(0x1, "dev", "ad17", V_MV78260_PLUS)),
303 MPP_MODE(53,
304 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
305 MPP_VAR_FUNCTION(0x1, "dev", "ad18", V_MV78260_PLUS)),
306 MPP_MODE(54,
307 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
308 MPP_VAR_FUNCTION(0x1, "dev", "ad19", V_MV78260_PLUS)),
309 MPP_MODE(55,
310 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
311 MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS)),
312 MPP_MODE(56,
313 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
314 MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS)),
315 MPP_MODE(57,
316 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
317 MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS)),
318 MPP_MODE(58,
319 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
320 MPP_VAR_FUNCTION(0x1, "dev", "ad23", V_MV78260_PLUS)),
321 MPP_MODE(59,
322 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
323 MPP_VAR_FUNCTION(0x1, "dev", "ad24", V_MV78260_PLUS)),
324 MPP_MODE(60,
325 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
326 MPP_VAR_FUNCTION(0x1, "dev", "ad25", V_MV78260_PLUS)),
327 MPP_MODE(61,
328 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
329 MPP_VAR_FUNCTION(0x1, "dev", "ad26", V_MV78260_PLUS)),
330 MPP_MODE(62,
331 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
332 MPP_VAR_FUNCTION(0x1, "dev", "ad27", V_MV78260_PLUS)),
333 MPP_MODE(63,
334 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
335 MPP_VAR_FUNCTION(0x1, "dev", "ad28", V_MV78260_PLUS)),
336 MPP_MODE(64,
337 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
338 MPP_VAR_FUNCTION(0x1, "dev", "ad29", V_MV78260_PLUS)),
339 MPP_MODE(65,
340 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
341 MPP_VAR_FUNCTION(0x1, "dev", "ad30", V_MV78260_PLUS)),
342 MPP_MODE(66,
343 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
344 MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)),
345 };
346
347 static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
348
349 static struct of_device_id armada_xp_pinctrl_of_match[] = {
350 {
351 .compatible = "marvell,mv78230-pinctrl",
352 .data = (void *) V_MV78230,
353 },
354 {
355 .compatible = "marvell,mv78260-pinctrl",
356 .data = (void *) V_MV78260,
357 },
358 {
359 .compatible = "marvell,mv78460-pinctrl",
360 .data = (void *) V_MV78460,
361 },
362 { },
363 };
364
365 static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
366 MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
367 };
368
369 static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
370 MPP_GPIO_RANGE(0, 0, 0, 32),
371 MPP_GPIO_RANGE(1, 32, 32, 17),
372 };
373
374 static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
375 MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
376 };
377
378 static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
379 MPP_GPIO_RANGE(0, 0, 0, 32),
380 MPP_GPIO_RANGE(1, 32, 32, 32),
381 MPP_GPIO_RANGE(2, 64, 64, 3),
382 };
383
384 static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
385 MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
386 };
387
388 static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
389 MPP_GPIO_RANGE(0, 0, 0, 32),
390 MPP_GPIO_RANGE(1, 32, 32, 32),
391 MPP_GPIO_RANGE(2, 64, 64, 3),
392 };
393
armada_xp_pinctrl_probe(struct platform_device * pdev)394 static int armada_xp_pinctrl_probe(struct platform_device *pdev)
395 {
396 struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
397 const struct of_device_id *match =
398 of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
399 struct resource *res;
400
401 if (!match)
402 return -ENODEV;
403
404 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
405 mpp_base = devm_ioremap_resource(&pdev->dev, res);
406 if (IS_ERR(mpp_base))
407 return PTR_ERR(mpp_base);
408
409 soc->variant = (unsigned) match->data & 0xff;
410
411 switch (soc->variant) {
412 case V_MV78230:
413 soc->controls = mv78230_mpp_controls;
414 soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);
415 soc->modes = armada_xp_mpp_modes;
416 /* We don't necessarily want the full list of the
417 * armada_xp_mpp_modes, but only the first 'n' ones
418 * that are available on this SoC */
419 soc->nmodes = mv78230_mpp_controls[0].npins;
420 soc->gpioranges = mv78230_mpp_gpio_ranges;
421 soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);
422 break;
423 case V_MV78260:
424 soc->controls = mv78260_mpp_controls;
425 soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);
426 soc->modes = armada_xp_mpp_modes;
427 /* We don't necessarily want the full list of the
428 * armada_xp_mpp_modes, but only the first 'n' ones
429 * that are available on this SoC */
430 soc->nmodes = mv78260_mpp_controls[0].npins;
431 soc->gpioranges = mv78260_mpp_gpio_ranges;
432 soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);
433 break;
434 case V_MV78460:
435 soc->controls = mv78460_mpp_controls;
436 soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);
437 soc->modes = armada_xp_mpp_modes;
438 /* We don't necessarily want the full list of the
439 * armada_xp_mpp_modes, but only the first 'n' ones
440 * that are available on this SoC */
441 soc->nmodes = mv78460_mpp_controls[0].npins;
442 soc->gpioranges = mv78460_mpp_gpio_ranges;
443 soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);
444 break;
445 }
446
447 pdev->dev.platform_data = soc;
448
449 return mvebu_pinctrl_probe(pdev);
450 }
451
armada_xp_pinctrl_remove(struct platform_device * pdev)452 static int armada_xp_pinctrl_remove(struct platform_device *pdev)
453 {
454 return mvebu_pinctrl_remove(pdev);
455 }
456
457 static struct platform_driver armada_xp_pinctrl_driver = {
458 .driver = {
459 .name = "armada-xp-pinctrl",
460 .owner = THIS_MODULE,
461 .of_match_table = armada_xp_pinctrl_of_match,
462 },
463 .probe = armada_xp_pinctrl_probe,
464 .remove = armada_xp_pinctrl_remove,
465 };
466
467 module_platform_driver(armada_xp_pinctrl_driver);
468
469 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
470 MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver");
471 MODULE_LICENSE("GPL v2");
472