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1 /*
2  * Universal Flash Storage Host controller driver
3  *
4  * This code is based on drivers/scsi/ufs/ufshcd.h
5  * Copyright (C) 2011-2013 Samsung India Software Operations
6  *
7  * Authors:
8  *	Santosh Yaraganavi <santosh.sy@samsung.com>
9  *	Vinayak Holikatti <h.vinayak@samsung.com>
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  * See the COPYING file in the top-level directory or visit
16  * <http://www.gnu.org/licenses/gpl-2.0.html>
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * This program is provided "AS IS" and "WITH ALL FAULTS" and
24  * without warranty of any kind. You are solely responsible for
25  * determining the appropriateness of using and distributing
26  * the program and assume all risks associated with your exercise
27  * of rights with respect to the program, including but not limited
28  * to infringement of third party rights, the risks and costs of
29  * program errors, damage to or loss of data, programs or equipment,
30  * and unavailability or interruption of operations. Under no
31  * circumstances will the contributor of this Program be liable for
32  * any damages of any kind arising from your use or distribution of
33  * this program.
34  */
35 
36 #ifndef _UFSHCD_H
37 #define _UFSHCD_H
38 
39 #include <linux/module.h>
40 #include <linux/kernel.h>
41 #include <linux/init.h>
42 #include <linux/interrupt.h>
43 #include <linux/io.h>
44 #include <linux/delay.h>
45 #include <linux/slab.h>
46 #include <linux/spinlock.h>
47 #include <linux/workqueue.h>
48 #include <linux/errno.h>
49 #include <linux/types.h>
50 #include <linux/wait.h>
51 #include <linux/bitops.h>
52 #include <linux/pm_runtime.h>
53 #include <linux/clk.h>
54 #include <linux/completion.h>
55 #include <linux/regulator/consumer.h>
56 
57 #include <asm/irq.h>
58 #include <asm/byteorder.h>
59 #include <scsi/scsi.h>
60 #include <scsi/scsi_cmnd.h>
61 #include <scsi/scsi_host.h>
62 #include <scsi/scsi_tcq.h>
63 #include <scsi/scsi_dbg.h>
64 #include <scsi/scsi_eh.h>
65 
66 #include "ufs.h"
67 #include "ufshci.h"
68 
69 #define UFSHCD "ufshcd"
70 #define UFSHCD_DRIVER_VERSION "0.2"
71 
72 struct ufs_hba;
73 
74 enum dev_cmd_type {
75 	DEV_CMD_TYPE_NOP		= 0x0,
76 	DEV_CMD_TYPE_QUERY		= 0x1,
77 };
78 
79 /**
80  * struct uic_command - UIC command structure
81  * @command: UIC command
82  * @argument1: UIC command argument 1
83  * @argument2: UIC command argument 2
84  * @argument3: UIC command argument 3
85  * @cmd_active: Indicate if UIC command is outstanding
86  * @result: UIC command result
87  * @done: UIC command completion
88  */
89 struct uic_command {
90 	u32 command;
91 	u32 argument1;
92 	u32 argument2;
93 	u32 argument3;
94 	int cmd_active;
95 	int result;
96 	struct completion done;
97 };
98 
99 /* Used to differentiate the power management options */
100 enum ufs_pm_op {
101 	UFS_RUNTIME_PM,
102 	UFS_SYSTEM_PM,
103 	UFS_SHUTDOWN_PM,
104 };
105 
106 #define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
107 #define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
108 #define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
109 
110 /* Host <-> Device UniPro Link state */
111 enum uic_link_state {
112 	UIC_LINK_OFF_STATE	= 0, /* Link powered down or disabled */
113 	UIC_LINK_ACTIVE_STATE	= 1, /* Link is in Fast/Slow/Sleep state */
114 	UIC_LINK_HIBERN8_STATE	= 2, /* Link is in Hibernate state */
115 };
116 
117 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
118 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
119 				    UIC_LINK_ACTIVE_STATE)
120 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
121 				    UIC_LINK_HIBERN8_STATE)
122 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
123 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
124 				    UIC_LINK_ACTIVE_STATE)
125 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
126 				    UIC_LINK_HIBERN8_STATE)
127 
128 /*
129  * UFS Power management levels.
130  * Each level is in increasing order of power savings.
131  */
132 enum ufs_pm_level {
133 	UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
134 	UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
135 	UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
136 	UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
137 	UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 	UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
139 	UFS_PM_LVL_MAX
140 };
141 
142 struct ufs_pm_lvl_states {
143 	enum ufs_dev_pwr_mode dev_state;
144 	enum uic_link_state link_state;
145 };
146 
147 /**
148  * struct ufshcd_lrb - local reference block
149  * @utr_descriptor_ptr: UTRD address of the command
150  * @ucd_req_ptr: UCD address of the command
151  * @ucd_rsp_ptr: Response UPIU address for this command
152  * @ucd_prdt_ptr: PRDT address of the command
153  * @cmd: pointer to SCSI command
154  * @sense_buffer: pointer to sense buffer address of the SCSI command
155  * @sense_bufflen: Length of the sense buffer
156  * @scsi_status: SCSI status of the command
157  * @command_type: SCSI, UFS, Query.
158  * @task_tag: Task tag of the command
159  * @lun: LUN of the command
160  * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
161  */
162 struct ufshcd_lrb {
163 	struct utp_transfer_req_desc *utr_descriptor_ptr;
164 	struct utp_upiu_req *ucd_req_ptr;
165 	struct utp_upiu_rsp *ucd_rsp_ptr;
166 	struct ufshcd_sg_entry *ucd_prdt_ptr;
167 
168 	struct scsi_cmnd *cmd;
169 	u8 *sense_buffer;
170 	unsigned int sense_bufflen;
171 	int scsi_status;
172 
173 	int command_type;
174 	int task_tag;
175 	u8 lun; /* UPIU LUN id field is only 8-bit wide */
176 	bool intr_cmd;
177 };
178 
179 /**
180  * struct ufs_query - holds relevent data structures for query request
181  * @request: request upiu and function
182  * @descriptor: buffer for sending/receiving descriptor
183  * @response: response upiu and response
184  */
185 struct ufs_query {
186 	struct ufs_query_req request;
187 	u8 *descriptor;
188 	struct ufs_query_res response;
189 };
190 
191 /**
192  * struct ufs_dev_cmd - all assosiated fields with device management commands
193  * @type: device management command type - Query, NOP OUT
194  * @lock: lock to allow one command at a time
195  * @complete: internal commands completion
196  * @tag_wq: wait queue until free command slot is available
197  */
198 struct ufs_dev_cmd {
199 	enum dev_cmd_type type;
200 	struct mutex lock;
201 	struct completion *complete;
202 	wait_queue_head_t tag_wq;
203 	struct ufs_query query;
204 };
205 
206 /**
207  * struct ufs_clk_info - UFS clock related info
208  * @list: list headed by hba->clk_list_head
209  * @clk: clock node
210  * @name: clock name
211  * @max_freq: maximum frequency supported by the clock
212  * @min_freq: min frequency that can be used for clock scaling
213  * @curr_freq: indicates the current frequency that it is set to
214  * @enabled: variable to check against multiple enable/disable
215  */
216 struct ufs_clk_info {
217 	struct list_head list;
218 	struct clk *clk;
219 	const char *name;
220 	u32 max_freq;
221 	u32 min_freq;
222 	u32 curr_freq;
223 	bool enabled;
224 };
225 
226 #define PRE_CHANGE      0
227 #define POST_CHANGE     1
228 
229 struct ufs_pa_layer_attr {
230 	u32 gear_rx;
231 	u32 gear_tx;
232 	u32 lane_rx;
233 	u32 lane_tx;
234 	u32 pwr_rx;
235 	u32 pwr_tx;
236 	u32 hs_rate;
237 };
238 
239 struct ufs_pwr_mode_info {
240 	bool is_valid;
241 	struct ufs_pa_layer_attr info;
242 };
243 
244 /**
245  * struct ufs_hba_variant_ops - variant specific callbacks
246  * @name: variant name
247  * @init: called when the driver is initialized
248  * @exit: called to cleanup everything done in init
249  * @clk_scale_notify: notifies that clks are scaled up/down
250  * @setup_clocks: called before touching any of the controller registers
251  * @setup_regulators: called before accessing the host controller
252  * @hce_enable_notify: called before and after HCE enable bit is set to allow
253  *                     variant specific Uni-Pro initialization.
254  * @link_startup_notify: called before and after Link startup is carried out
255  *                       to allow variant specific Uni-Pro initialization.
256  * @pwr_change_notify: called before and after a power mode change
257  *			is carried out to allow vendor spesific capabilities
258  *			to be set.
259  * @suspend: called during host controller PM callback
260  * @resume: called during host controller PM callback
261  */
262 struct ufs_hba_variant_ops {
263 	const char *name;
264 	int	(*init)(struct ufs_hba *);
265 	void    (*exit)(struct ufs_hba *);
266 	void    (*clk_scale_notify)(struct ufs_hba *);
267 	int     (*setup_clocks)(struct ufs_hba *, bool);
268 	int     (*setup_regulators)(struct ufs_hba *, bool);
269 	int     (*hce_enable_notify)(struct ufs_hba *, bool);
270 	int     (*link_startup_notify)(struct ufs_hba *, bool);
271 	int	(*pwr_change_notify)(struct ufs_hba *,
272 					bool, struct ufs_pa_layer_attr *,
273 					struct ufs_pa_layer_attr *);
274 	int     (*suspend)(struct ufs_hba *, enum ufs_pm_op);
275 	int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
276 };
277 
278 /* clock gating state  */
279 enum clk_gating_state {
280 	CLKS_OFF,
281 	CLKS_ON,
282 	REQ_CLKS_OFF,
283 	REQ_CLKS_ON,
284 };
285 
286 /**
287  * struct ufs_clk_gating - UFS clock gating related info
288  * @gate_work: worker to turn off clocks after some delay as specified in
289  * delay_ms
290  * @ungate_work: worker to turn on clocks that will be used in case of
291  * interrupt context
292  * @state: the current clocks state
293  * @delay_ms: gating delay in ms
294  * @is_suspended: clk gating is suspended when set to 1 which can be used
295  * during suspend/resume
296  * @delay_attr: sysfs attribute to control delay_attr
297  * @active_reqs: number of requests that are pending and should be waited for
298  * completion before gating clocks.
299  */
300 struct ufs_clk_gating {
301 	struct delayed_work gate_work;
302 	struct work_struct ungate_work;
303 	enum clk_gating_state state;
304 	unsigned long delay_ms;
305 	bool is_suspended;
306 	struct device_attribute delay_attr;
307 	int active_reqs;
308 };
309 
310 struct ufs_clk_scaling {
311 	ktime_t  busy_start_t;
312 	bool is_busy_started;
313 	unsigned long  tot_busy_t;
314 	unsigned long window_start_t;
315 };
316 
317 /**
318  * struct ufs_init_prefetch - contains data that is pre-fetched once during
319  * initialization
320  * @icc_level: icc level which was read during initialization
321  */
322 struct ufs_init_prefetch {
323 	u32 icc_level;
324 };
325 
326 /**
327  * struct ufs_hba - per adapter private structure
328  * @mmio_base: UFSHCI base register address
329  * @ucdl_base_addr: UFS Command Descriptor base address
330  * @utrdl_base_addr: UTP Transfer Request Descriptor base address
331  * @utmrdl_base_addr: UTP Task Management Descriptor base address
332  * @ucdl_dma_addr: UFS Command Descriptor DMA address
333  * @utrdl_dma_addr: UTRDL DMA address
334  * @utmrdl_dma_addr: UTMRDL DMA address
335  * @host: Scsi_Host instance of the driver
336  * @dev: device handle
337  * @lrb: local reference block
338  * @lrb_in_use: lrb in use
339  * @outstanding_tasks: Bits representing outstanding task requests
340  * @outstanding_reqs: Bits representing outstanding transfer requests
341  * @capabilities: UFS Controller Capabilities
342  * @nutrs: Transfer Request Queue depth supported by controller
343  * @nutmrs: Task Management Queue depth supported by controller
344  * @ufs_version: UFS Version to which controller complies
345  * @vops: pointer to variant specific operations
346  * @priv: pointer to variant specific private data
347  * @irq: Irq number of the controller
348  * @active_uic_cmd: handle of active UIC command
349  * @uic_cmd_mutex: mutex for uic command
350  * @tm_wq: wait queue for task management
351  * @tm_tag_wq: wait queue for free task management slots
352  * @tm_slots_in_use: bit map of task management request slots in use
353  * @pwr_done: completion for power mode change
354  * @tm_condition: condition variable for task management
355  * @ufshcd_state: UFSHCD states
356  * @eh_flags: Error handling flags
357  * @intr_mask: Interrupt Mask Bits
358  * @ee_ctrl_mask: Exception event control mask
359  * @is_powered: flag to check if HBA is powered
360  * @is_init_prefetch: flag to check if data was pre-fetched in initialization
361  * @init_prefetch_data: data pre-fetched during initialization
362  * @eh_work: Worker to handle UFS errors that require s/w attention
363  * @eeh_work: Worker to handle exception events
364  * @errors: HBA errors
365  * @uic_error: UFS interconnect layer error status
366  * @saved_err: sticky error mask
367  * @saved_uic_err: sticky UIC error mask
368  * @dev_cmd: ufs device management command information
369  * @auto_bkops_enabled: to track whether bkops is enabled in device
370  * @vreg_info: UFS device voltage regulator information
371  * @clk_list_head: UFS host controller clocks list node head
372  * @pwr_info: holds current power mode
373  * @max_pwr_info: keeps the device max valid pwm
374  */
375 struct ufs_hba {
376 	void __iomem *mmio_base;
377 
378 	/* Virtual memory reference */
379 	struct utp_transfer_cmd_desc *ucdl_base_addr;
380 	struct utp_transfer_req_desc *utrdl_base_addr;
381 	struct utp_task_req_desc *utmrdl_base_addr;
382 
383 	/* DMA memory reference */
384 	dma_addr_t ucdl_dma_addr;
385 	dma_addr_t utrdl_dma_addr;
386 	dma_addr_t utmrdl_dma_addr;
387 
388 	struct Scsi_Host *host;
389 	struct device *dev;
390 	/*
391 	 * This field is to keep a reference to "scsi_device" corresponding to
392 	 * "UFS device" W-LU.
393 	 */
394 	struct scsi_device *sdev_ufs_device;
395 
396 	enum ufs_dev_pwr_mode curr_dev_pwr_mode;
397 	enum uic_link_state uic_link_state;
398 	/* Desired UFS power management level during runtime PM */
399 	enum ufs_pm_level rpm_lvl;
400 	/* Desired UFS power management level during system PM */
401 	enum ufs_pm_level spm_lvl;
402 	int pm_op_in_progress;
403 
404 	struct ufshcd_lrb *lrb;
405 	unsigned long lrb_in_use;
406 
407 	unsigned long outstanding_tasks;
408 	unsigned long outstanding_reqs;
409 
410 	u32 capabilities;
411 	int nutrs;
412 	int nutmrs;
413 	u32 ufs_version;
414 	struct ufs_hba_variant_ops *vops;
415 	void *priv;
416 	unsigned int irq;
417 	bool is_irq_enabled;
418 
419 
420 	wait_queue_head_t tm_wq;
421 	wait_queue_head_t tm_tag_wq;
422 	unsigned long tm_condition;
423 	unsigned long tm_slots_in_use;
424 
425 	struct uic_command *active_uic_cmd;
426 	struct mutex uic_cmd_mutex;
427 	struct completion *uic_async_done;
428 
429 	u32 ufshcd_state;
430 	u32 eh_flags;
431 	u32 intr_mask;
432 	u16 ee_ctrl_mask;
433 	bool is_powered;
434 	bool is_init_prefetch;
435 	struct ufs_init_prefetch init_prefetch_data;
436 
437 	/* Work Queues */
438 	struct work_struct eh_work;
439 	struct work_struct eeh_work;
440 
441 	/* HBA Errors */
442 	u32 errors;
443 	u32 uic_error;
444 	u32 saved_err;
445 	u32 saved_uic_err;
446 
447 	/* Device management request data */
448 	struct ufs_dev_cmd dev_cmd;
449 
450 	/* Keeps information of the UFS device connected to this host */
451 	struct ufs_dev_info dev_info;
452 	bool auto_bkops_enabled;
453 	struct ufs_vreg_info vreg_info;
454 	struct list_head clk_list_head;
455 
456 	bool wlun_dev_clr_ua;
457 
458 	struct ufs_pa_layer_attr pwr_info;
459 	struct ufs_pwr_mode_info max_pwr_info;
460 
461 	struct ufs_clk_gating clk_gating;
462 	/* Control to enable/disable host capabilities */
463 	u32 caps;
464 	/* Allow dynamic clk gating */
465 #define UFSHCD_CAP_CLK_GATING	(1 << 0)
466 	/* Allow hiberb8 with clk gating */
467 #define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
468 	/* Allow dynamic clk scaling */
469 #define UFSHCD_CAP_CLK_SCALING	(1 << 2)
470 	/* Allow auto bkops to enabled during runtime suspend */
471 #define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
472 
473 	struct devfreq *devfreq;
474 	struct ufs_clk_scaling clk_scaling;
475 	bool is_sys_suspended;
476 
477 	int			latency_hist_enabled;
478 	struct io_latency_state io_lat_read;
479 	struct io_latency_state io_lat_write;
480 };
481 
482 /* Returns true if clocks can be gated. Otherwise false */
ufshcd_is_clkgating_allowed(struct ufs_hba * hba)483 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
484 {
485 	return hba->caps & UFSHCD_CAP_CLK_GATING;
486 }
ufshcd_can_hibern8_during_gating(struct ufs_hba * hba)487 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
488 {
489 	return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
490 }
ufshcd_is_clkscaling_enabled(struct ufs_hba * hba)491 static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
492 {
493 	return hba->caps & UFSHCD_CAP_CLK_SCALING;
494 }
ufshcd_can_autobkops_during_suspend(struct ufs_hba * hba)495 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
496 {
497 	return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
498 }
499 
500 #define ufshcd_writel(hba, val, reg)	\
501 	writel((val), (hba)->mmio_base + (reg))
502 #define ufshcd_readl(hba, reg)	\
503 	readl((hba)->mmio_base + (reg))
504 
505 /**
506  * ufshcd_rmwl - read modify write into a register
507  * @hba - per adapter instance
508  * @mask - mask to apply on read value
509  * @val - actual value to write
510  * @reg - register address
511  */
ufshcd_rmwl(struct ufs_hba * hba,u32 mask,u32 val,u32 reg)512 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
513 {
514 	u32 tmp;
515 
516 	tmp = ufshcd_readl(hba, reg);
517 	tmp &= ~mask;
518 	tmp |= (val & mask);
519 	ufshcd_writel(hba, tmp, reg);
520 }
521 
522 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
523 int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
524 void ufshcd_remove(struct ufs_hba *);
525 
526 /**
527  * ufshcd_hba_stop - Send controller to reset state
528  * @hba: per adapter instance
529  */
ufshcd_hba_stop(struct ufs_hba * hba)530 static inline void ufshcd_hba_stop(struct ufs_hba *hba)
531 {
532 	ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
533 }
534 
check_upiu_size(void)535 static inline void check_upiu_size(void)
536 {
537 	BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
538 		GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
539 }
540 
541 extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
542 extern int ufshcd_runtime_resume(struct ufs_hba *hba);
543 extern int ufshcd_runtime_idle(struct ufs_hba *hba);
544 extern int ufshcd_system_suspend(struct ufs_hba *hba);
545 extern int ufshcd_system_resume(struct ufs_hba *hba);
546 extern int ufshcd_shutdown(struct ufs_hba *hba);
547 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
548 			       u8 attr_set, u32 mib_val, u8 peer);
549 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
550 			       u32 *mib_val, u8 peer);
551 
552 /* UIC command interfaces for DME primitives */
553 #define DME_LOCAL	0
554 #define DME_PEER	1
555 #define ATTR_SET_NOR	0	/* NORMAL */
556 #define ATTR_SET_ST	1	/* STATIC */
557 
ufshcd_dme_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)558 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
559 				 u32 mib_val)
560 {
561 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
562 				   mib_val, DME_LOCAL);
563 }
564 
ufshcd_dme_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)565 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
566 				    u32 mib_val)
567 {
568 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
569 				   mib_val, DME_LOCAL);
570 }
571 
ufshcd_dme_peer_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)572 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
573 				      u32 mib_val)
574 {
575 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
576 				   mib_val, DME_PEER);
577 }
578 
ufshcd_dme_peer_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)579 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
580 					 u32 mib_val)
581 {
582 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
583 				   mib_val, DME_PEER);
584 }
585 
ufshcd_dme_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)586 static inline int ufshcd_dme_get(struct ufs_hba *hba,
587 				 u32 attr_sel, u32 *mib_val)
588 {
589 	return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
590 }
591 
ufshcd_dme_peer_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)592 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
593 				      u32 attr_sel, u32 *mib_val)
594 {
595 	return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
596 }
597 
598 int ufshcd_hold(struct ufs_hba *hba, bool async);
599 void ufshcd_release(struct ufs_hba *hba);
600 #endif /* End of Header */
601