1 /* 2 * sca3000.c -- support VTI sca3000 series accelerometers 3 * via SPI 4 * 5 * Copyright (c) 2007 Jonathan Cameron <jic23@kernel.org> 6 * 7 * Partly based upon tle62x0.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * Initial mode is direct measurement. 14 * 15 * Untested things 16 * 17 * Temperature reading (the e05 I'm testing with doesn't have a sensor) 18 * 19 * Free fall detection mode - supported but untested as I'm not droping my 20 * dubious wire rig far enough to test it. 21 * 22 * Unsupported as yet 23 * 24 * Time stamping of data from ring. Various ideas on how to do this but none 25 * are remotely simple. Suggestions welcome. 26 * 27 * Individual enabling disabling of channels going into ring buffer 28 * 29 * Overflow handling (this is signaled for all but 8 bit ring buffer mode.) 30 * 31 * Motion detector using AND combinations of signals. 32 * 33 * Note: Be very careful about not touching an register bytes marked 34 * as reserved on the data sheet. They really mean it as changing convents of 35 * some will cause the device to lock up. 36 * 37 * Known issues - on rare occasions the interrupts lock up. Not sure why as yet. 38 * Can probably alleviate this by reading the interrupt register on start, but 39 * that is really just brushing the problem under the carpet. 40 */ 41 #define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02) 42 #define SCA3000_READ_REG(a) ((a) << 2) 43 44 #define SCA3000_REG_ADDR_REVID 0x00 45 #define SCA3000_REVID_MAJOR_MASK 0xf0 46 #define SCA3000_REVID_MINOR_MASK 0x0f 47 48 #define SCA3000_REG_ADDR_STATUS 0x02 49 #define SCA3000_LOCKED 0x20 50 #define SCA3000_EEPROM_CS_ERROR 0x02 51 #define SCA3000_SPI_FRAME_ERROR 0x01 52 53 /* All reads done using register decrement so no need to directly access LSBs */ 54 #define SCA3000_REG_ADDR_X_MSB 0x05 55 #define SCA3000_REG_ADDR_Y_MSB 0x07 56 #define SCA3000_REG_ADDR_Z_MSB 0x09 57 58 #define SCA3000_REG_ADDR_RING_OUT 0x0f 59 60 /* Temp read untested - the e05 doesn't have the sensor */ 61 #define SCA3000_REG_ADDR_TEMP_MSB 0x13 62 63 #define SCA3000_REG_ADDR_MODE 0x14 64 #define SCA3000_MODE_PROT_MASK 0x28 65 66 #define SCA3000_RING_BUF_ENABLE 0x80 67 #define SCA3000_RING_BUF_8BIT 0x40 68 /* 69 * Free fall detection triggers an interrupt if the acceleration 70 * is below a threshold for equivalent of 25cm drop 71 */ 72 #define SCA3000_FREE_FALL_DETECT 0x10 73 #define SCA3000_MEAS_MODE_NORMAL 0x00 74 #define SCA3000_MEAS_MODE_OP_1 0x01 75 #define SCA3000_MEAS_MODE_OP_2 0x02 76 77 /* 78 * In motion detection mode the accelerations are band pass filtered 79 * (approx 1 - 25Hz) and then a programmable threshold used to trigger 80 * and interrupt. 81 */ 82 #define SCA3000_MEAS_MODE_MOT_DET 0x03 83 84 #define SCA3000_REG_ADDR_BUF_COUNT 0x15 85 86 #define SCA3000_REG_ADDR_INT_STATUS 0x16 87 88 #define SCA3000_INT_STATUS_THREE_QUARTERS 0x80 89 #define SCA3000_INT_STATUS_HALF 0x40 90 91 #define SCA3000_INT_STATUS_FREE_FALL 0x08 92 #define SCA3000_INT_STATUS_Y_TRIGGER 0x04 93 #define SCA3000_INT_STATUS_X_TRIGGER 0x02 94 #define SCA3000_INT_STATUS_Z_TRIGGER 0x01 95 96 /* Used to allow access to multiplexed registers */ 97 #define SCA3000_REG_ADDR_CTRL_SEL 0x18 98 /* Only available for SCA3000-D03 and SCA3000-D01 */ 99 #define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01 100 #define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02 101 #define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03 102 #define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04 103 #define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05 104 /* 105 * BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device 106 * will not function 107 */ 108 #define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B 109 #define SCA3000_OUT_CTRL_PROT_MASK 0xE0 110 #define SCA3000_OUT_CTRL_BUF_X_EN 0x10 111 #define SCA3000_OUT_CTRL_BUF_Y_EN 0x08 112 #define SCA3000_OUT_CTRL_BUF_Z_EN 0x04 113 #define SCA3000_OUT_CTRL_BUF_DIV_4 0x02 114 #define SCA3000_OUT_CTRL_BUF_DIV_2 0x01 115 116 /* 117 * Control which motion detector interrupts are on. 118 * For now only OR combinations are supported. 119 */ 120 #define SCA3000_MD_CTRL_PROT_MASK 0xC0 121 #define SCA3000_MD_CTRL_OR_Y 0x01 122 #define SCA3000_MD_CTRL_OR_X 0x02 123 #define SCA3000_MD_CTRL_OR_Z 0x04 124 /* Currently unsupported */ 125 #define SCA3000_MD_CTRL_AND_Y 0x08 126 #define SCA3000_MD_CTRL_AND_X 0x10 127 #define SAC3000_MD_CTRL_AND_Z 0x20 128 129 /* 130 * Some control registers of complex access methods requiring this register to 131 * be used to remove a lock. 132 */ 133 #define SCA3000_REG_ADDR_UNLOCK 0x1e 134 135 #define SCA3000_REG_ADDR_INT_MASK 0x21 136 #define SCA3000_INT_MASK_PROT_MASK 0x1C 137 138 #define SCA3000_INT_MASK_RING_THREE_QUARTER 0x80 139 #define SCA3000_INT_MASK_RING_HALF 0x40 140 141 #define SCA3000_INT_MASK_ALL_INTS 0x02 142 #define SCA3000_INT_MASK_ACTIVE_HIGH 0x01 143 #define SCA3000_INT_MASK_ACTIVE_LOW 0x00 144 145 /* Values of multiplexed registers (write to ctrl_data after select) */ 146 #define SCA3000_REG_ADDR_CTRL_DATA 0x22 147 148 /* 149 * Measurement modes available on some sca3000 series chips. Code assumes others 150 * may become available in the future. 151 * 152 * Bypass - Bypass the low-pass filter in the signal channel so as to increase 153 * signal bandwidth. 154 * 155 * Narrow - Narrow low-pass filtering of the signal channel and half output 156 * data rate by decimation. 157 * 158 * Wide - Widen low-pass filtering of signal channel to increase bandwidth 159 */ 160 #define SCA3000_OP_MODE_BYPASS 0x01 161 #define SCA3000_OP_MODE_NARROW 0x02 162 #define SCA3000_OP_MODE_WIDE 0x04 163 #define SCA3000_MAX_TX 6 164 #define SCA3000_MAX_RX 2 165 166 /** 167 * struct sca3000_state - device instance state information 168 * @us: the associated spi device 169 * @info: chip variant information 170 * @interrupt_handler_ws: event interrupt handler for all events 171 * @last_timestamp: the timestamp of the last event 172 * @mo_det_use_count: reference counter for the motion detection unit 173 * @lock: lock used to protect elements of sca3000_state 174 * and the underlying device state. 175 * @bpse: number of bits per scan element 176 * @tx: dma-able transmit buffer 177 * @rx: dma-able receive buffer 178 **/ 179 struct sca3000_state { 180 struct spi_device *us; 181 const struct sca3000_chip_info *info; 182 struct work_struct interrupt_handler_ws; 183 s64 last_timestamp; 184 int mo_det_use_count; 185 struct mutex lock; 186 int bpse; 187 /* Can these share a cacheline ? */ 188 u8 rx[2] ____cacheline_aligned; 189 u8 tx[6] ____cacheline_aligned; 190 }; 191 192 /** 193 * struct sca3000_chip_info - model dependent parameters 194 * @scale: scale * 10^-6 195 * @temp_output: some devices have temperature sensors. 196 * @measurement_mode_freq: normal mode sampling frequency 197 * @option_mode_1: first optional mode. Not all models have one 198 * @option_mode_1_freq: option mode 1 sampling frequency 199 * @option_mode_2: second optional mode. Not all chips have one 200 * @option_mode_2_freq: option mode 2 sampling frequency 201 * 202 * This structure is used to hold information about the functionality of a given 203 * sca3000 variant. 204 **/ 205 struct sca3000_chip_info { 206 unsigned int scale; 207 bool temp_output; 208 int measurement_mode_freq; 209 int option_mode_1; 210 int option_mode_1_freq; 211 int option_mode_2; 212 int option_mode_2_freq; 213 int mot_det_mult_xz[6]; 214 int mot_det_mult_y[7]; 215 }; 216 217 int sca3000_read_data_short(struct sca3000_state *st, 218 u8 reg_address_high, 219 int len); 220 221 /** 222 * sca3000_write_reg() write a single register 223 * @address: address of register on chip 224 * @val: value to be written to register 225 * 226 * The main lock must be held. 227 **/ 228 int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val); 229 230 #ifdef CONFIG_IIO_BUFFER 231 /** 232 * sca3000_register_ring_funcs() setup the ring state change functions 233 **/ 234 void sca3000_register_ring_funcs(struct iio_dev *indio_dev); 235 236 /** 237 * sca3000_configure_ring() - allocate and configure ring buffer 238 * @indio_dev: iio-core device whose ring is to be configured 239 * 240 * The hardware ring buffer needs far fewer ring buffer functions than 241 * a software one as a lot of things are handled automatically. 242 * This function also tells the iio core that our device supports a 243 * hardware ring buffer mode. 244 **/ 245 int sca3000_configure_ring(struct iio_dev *indio_dev); 246 247 /** 248 * sca3000_unconfigure_ring() - deallocate the ring buffer 249 * @indio_dev: iio-core device whose ring we are freeing 250 **/ 251 void sca3000_unconfigure_ring(struct iio_dev *indio_dev); 252 253 /** 254 * sca3000_ring_int_process() handles ring related event pushing and escalation 255 * @val: the event code 256 **/ 257 void sca3000_ring_int_process(u8 val, struct iio_buffer *ring); 258 259 #else sca3000_register_ring_funcs(struct iio_dev * indio_dev)260static inline void sca3000_register_ring_funcs(struct iio_dev *indio_dev) 261 { 262 } 263 264 static inline sca3000_register_ring_access_and_init(struct iio_dev * indio_dev)265int sca3000_register_ring_access_and_init(struct iio_dev *indio_dev) 266 { 267 return 0; 268 } 269 sca3000_ring_int_process(u8 val,void * ring)270static inline void sca3000_ring_int_process(u8 val, void *ring) 271 { 272 } 273 274 #endif 275 276