1 /*
2 * timbuart.c timberdale FPGA UART driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* Supports:
20 * Timberdale FPGA UART
21 */
22
23 #include <linux/pci.h>
24 #include <linux/interrupt.h>
25 #include <linux/serial_core.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/kernel.h>
29 #include <linux/platform_device.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/module.h>
33
34 #include "timbuart.h"
35
36 struct timbuart_port {
37 struct uart_port port;
38 struct tasklet_struct tasklet;
39 int usedma;
40 u32 last_ier;
41 struct platform_device *dev;
42 };
43
44 static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
45 921600, 1843200, 3250000};
46
47 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
48
49 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
50
timbuart_stop_rx(struct uart_port * port)51 static void timbuart_stop_rx(struct uart_port *port)
52 {
53 /* spin lock held by upper layer, disable all RX interrupts */
54 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
55 iowrite32(ier, port->membase + TIMBUART_IER);
56 }
57
timbuart_stop_tx(struct uart_port * port)58 static void timbuart_stop_tx(struct uart_port *port)
59 {
60 /* spinlock held by upper layer, disable TX interrupt */
61 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
62 iowrite32(ier, port->membase + TIMBUART_IER);
63 }
64
timbuart_start_tx(struct uart_port * port)65 static void timbuart_start_tx(struct uart_port *port)
66 {
67 struct timbuart_port *uart =
68 container_of(port, struct timbuart_port, port);
69
70 /* do not transfer anything here -> fire off the tasklet */
71 tasklet_schedule(&uart->tasklet);
72 }
73
timbuart_tx_empty(struct uart_port * port)74 static unsigned int timbuart_tx_empty(struct uart_port *port)
75 {
76 u32 isr = ioread32(port->membase + TIMBUART_ISR);
77
78 return (isr & TXBE) ? TIOCSER_TEMT : 0;
79 }
80
timbuart_flush_buffer(struct uart_port * port)81 static void timbuart_flush_buffer(struct uart_port *port)
82 {
83 if (!timbuart_tx_empty(port)) {
84 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
85 TIMBUART_CTRL_FLSHTX;
86
87 iowrite8(ctl, port->membase + TIMBUART_CTRL);
88 iowrite32(TXBF, port->membase + TIMBUART_ISR);
89 }
90 }
91
timbuart_rx_chars(struct uart_port * port)92 static void timbuart_rx_chars(struct uart_port *port)
93 {
94 struct tty_port *tport = &port->state->port;
95
96 while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
97 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
98 port->icount.rx++;
99 tty_insert_flip_char(tport, ch, TTY_NORMAL);
100 }
101
102 spin_unlock(&port->lock);
103 tty_flip_buffer_push(tport);
104 spin_lock(&port->lock);
105
106 dev_dbg(port->dev, "%s - total read %d bytes\n",
107 __func__, port->icount.rx);
108 }
109
timbuart_tx_chars(struct uart_port * port)110 static void timbuart_tx_chars(struct uart_port *port)
111 {
112 struct circ_buf *xmit = &port->state->xmit;
113
114 while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
115 !uart_circ_empty(xmit)) {
116 iowrite8(xmit->buf[xmit->tail],
117 port->membase + TIMBUART_TXFIFO);
118 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
119 port->icount.tx++;
120 }
121
122 dev_dbg(port->dev,
123 "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
124 __func__,
125 port->icount.tx,
126 ioread8(port->membase + TIMBUART_CTRL),
127 port->mctrl & TIOCM_RTS,
128 ioread8(port->membase + TIMBUART_BAUDRATE));
129 }
130
timbuart_handle_tx_port(struct uart_port * port,u32 isr,u32 * ier)131 static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
132 {
133 struct timbuart_port *uart =
134 container_of(port, struct timbuart_port, port);
135 struct circ_buf *xmit = &port->state->xmit;
136
137 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
138 return;
139
140 if (port->x_char)
141 return;
142
143 if (isr & TXFLAGS) {
144 timbuart_tx_chars(port);
145 /* clear all TX interrupts */
146 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
147
148 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
149 uart_write_wakeup(port);
150 } else
151 /* Re-enable any tx interrupt */
152 *ier |= uart->last_ier & TXFLAGS;
153
154 /* enable interrupts if there are chars in the transmit buffer,
155 * Or if we delivered some bytes and want the almost empty interrupt
156 * we wake up the upper layer later when we got the interrupt
157 * to give it some time to go out...
158 */
159 if (!uart_circ_empty(xmit))
160 *ier |= TXBAE;
161
162 dev_dbg(port->dev, "%s - leaving\n", __func__);
163 }
164
timbuart_handle_rx_port(struct uart_port * port,u32 isr,u32 * ier)165 static void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
166 {
167 if (isr & RXFLAGS) {
168 /* Some RX status is set */
169 if (isr & RXBF) {
170 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
171 TIMBUART_CTRL_FLSHRX;
172 iowrite8(ctl, port->membase + TIMBUART_CTRL);
173 port->icount.overrun++;
174 } else if (isr & (RXDP))
175 timbuart_rx_chars(port);
176
177 /* ack all RX interrupts */
178 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
179 }
180
181 /* always have the RX interrupts enabled */
182 *ier |= RXBAF | RXBF | RXTT;
183
184 dev_dbg(port->dev, "%s - leaving\n", __func__);
185 }
186
timbuart_tasklet(unsigned long arg)187 static void timbuart_tasklet(unsigned long arg)
188 {
189 struct timbuart_port *uart = (struct timbuart_port *)arg;
190 u32 isr, ier = 0;
191
192 spin_lock(&uart->port.lock);
193
194 isr = ioread32(uart->port.membase + TIMBUART_ISR);
195 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
196
197 if (!uart->usedma)
198 timbuart_handle_tx_port(&uart->port, isr, &ier);
199
200 timbuart_mctrl_check(&uart->port, isr, &ier);
201
202 if (!uart->usedma)
203 timbuart_handle_rx_port(&uart->port, isr, &ier);
204
205 iowrite32(ier, uart->port.membase + TIMBUART_IER);
206
207 spin_unlock(&uart->port.lock);
208 dev_dbg(uart->port.dev, "%s leaving\n", __func__);
209 }
210
timbuart_get_mctrl(struct uart_port * port)211 static unsigned int timbuart_get_mctrl(struct uart_port *port)
212 {
213 u8 cts = ioread8(port->membase + TIMBUART_CTRL);
214 dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
215
216 if (cts & TIMBUART_CTRL_CTS)
217 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
218 else
219 return TIOCM_DSR | TIOCM_CAR;
220 }
221
timbuart_set_mctrl(struct uart_port * port,unsigned int mctrl)222 static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
223 {
224 dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
225
226 if (mctrl & TIOCM_RTS)
227 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
228 else
229 iowrite8(0, port->membase + TIMBUART_CTRL);
230 }
231
timbuart_mctrl_check(struct uart_port * port,u32 isr,u32 * ier)232 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
233 {
234 unsigned int cts;
235
236 if (isr & CTS_DELTA) {
237 /* ack */
238 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
239 cts = timbuart_get_mctrl(port);
240 uart_handle_cts_change(port, cts & TIOCM_CTS);
241 wake_up_interruptible(&port->state->port.delta_msr_wait);
242 }
243
244 *ier |= CTS_DELTA;
245 }
246
timbuart_break_ctl(struct uart_port * port,int ctl)247 static void timbuart_break_ctl(struct uart_port *port, int ctl)
248 {
249 /* N/A */
250 }
251
timbuart_startup(struct uart_port * port)252 static int timbuart_startup(struct uart_port *port)
253 {
254 struct timbuart_port *uart =
255 container_of(port, struct timbuart_port, port);
256
257 dev_dbg(port->dev, "%s\n", __func__);
258
259 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
260 iowrite32(0x1ff, port->membase + TIMBUART_ISR);
261 /* Enable all but TX interrupts */
262 iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
263 port->membase + TIMBUART_IER);
264
265 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
266 "timb-uart", uart);
267 }
268
timbuart_shutdown(struct uart_port * port)269 static void timbuart_shutdown(struct uart_port *port)
270 {
271 struct timbuart_port *uart =
272 container_of(port, struct timbuart_port, port);
273 dev_dbg(port->dev, "%s\n", __func__);
274 free_irq(port->irq, uart);
275 iowrite32(0, port->membase + TIMBUART_IER);
276 }
277
get_bindex(int baud)278 static int get_bindex(int baud)
279 {
280 int i;
281
282 for (i = 0; i < ARRAY_SIZE(baudrates); i++)
283 if (baud <= baudrates[i])
284 return i;
285
286 return -1;
287 }
288
timbuart_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)289 static void timbuart_set_termios(struct uart_port *port,
290 struct ktermios *termios,
291 struct ktermios *old)
292 {
293 unsigned int baud;
294 short bindex;
295 unsigned long flags;
296
297 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
298 bindex = get_bindex(baud);
299 dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
300
301 if (bindex < 0)
302 bindex = 0;
303 baud = baudrates[bindex];
304
305 /* The serial layer calls into this once with old = NULL when setting
306 up initially */
307 if (old)
308 tty_termios_copy_hw(termios, old);
309 tty_termios_encode_baud_rate(termios, baud, baud);
310
311 spin_lock_irqsave(&port->lock, flags);
312 iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
313 uart_update_timeout(port, termios->c_cflag, baud);
314 spin_unlock_irqrestore(&port->lock, flags);
315 }
316
timbuart_type(struct uart_port * port)317 static const char *timbuart_type(struct uart_port *port)
318 {
319 return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
320 }
321
322 /* We do not request/release mappings of the registers here,
323 * currently it's done in the proble function.
324 */
timbuart_release_port(struct uart_port * port)325 static void timbuart_release_port(struct uart_port *port)
326 {
327 struct platform_device *pdev = to_platform_device(port->dev);
328 int size =
329 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
330
331 if (port->flags & UPF_IOREMAP) {
332 iounmap(port->membase);
333 port->membase = NULL;
334 }
335
336 release_mem_region(port->mapbase, size);
337 }
338
timbuart_request_port(struct uart_port * port)339 static int timbuart_request_port(struct uart_port *port)
340 {
341 struct platform_device *pdev = to_platform_device(port->dev);
342 int size =
343 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
344
345 if (!request_mem_region(port->mapbase, size, "timb-uart"))
346 return -EBUSY;
347
348 if (port->flags & UPF_IOREMAP) {
349 port->membase = ioremap(port->mapbase, size);
350 if (port->membase == NULL) {
351 release_mem_region(port->mapbase, size);
352 return -ENOMEM;
353 }
354 }
355
356 return 0;
357 }
358
timbuart_handleinterrupt(int irq,void * devid)359 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
360 {
361 struct timbuart_port *uart = (struct timbuart_port *)devid;
362
363 if (ioread8(uart->port.membase + TIMBUART_IPR)) {
364 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
365
366 /* disable interrupts, the tasklet enables them again */
367 iowrite32(0, uart->port.membase + TIMBUART_IER);
368
369 /* fire off bottom half */
370 tasklet_schedule(&uart->tasklet);
371
372 return IRQ_HANDLED;
373 } else
374 return IRQ_NONE;
375 }
376
377 /*
378 * Configure/autoconfigure the port.
379 */
timbuart_config_port(struct uart_port * port,int flags)380 static void timbuart_config_port(struct uart_port *port, int flags)
381 {
382 if (flags & UART_CONFIG_TYPE) {
383 port->type = PORT_TIMBUART;
384 timbuart_request_port(port);
385 }
386 }
387
timbuart_verify_port(struct uart_port * port,struct serial_struct * ser)388 static int timbuart_verify_port(struct uart_port *port,
389 struct serial_struct *ser)
390 {
391 /* we don't want the core code to modify any port params */
392 return -EINVAL;
393 }
394
395 static struct uart_ops timbuart_ops = {
396 .tx_empty = timbuart_tx_empty,
397 .set_mctrl = timbuart_set_mctrl,
398 .get_mctrl = timbuart_get_mctrl,
399 .stop_tx = timbuart_stop_tx,
400 .start_tx = timbuart_start_tx,
401 .flush_buffer = timbuart_flush_buffer,
402 .stop_rx = timbuart_stop_rx,
403 .break_ctl = timbuart_break_ctl,
404 .startup = timbuart_startup,
405 .shutdown = timbuart_shutdown,
406 .set_termios = timbuart_set_termios,
407 .type = timbuart_type,
408 .release_port = timbuart_release_port,
409 .request_port = timbuart_request_port,
410 .config_port = timbuart_config_port,
411 .verify_port = timbuart_verify_port
412 };
413
414 static struct uart_driver timbuart_driver = {
415 .owner = THIS_MODULE,
416 .driver_name = "timberdale_uart",
417 .dev_name = "ttyTU",
418 .major = TIMBUART_MAJOR,
419 .minor = TIMBUART_MINOR,
420 .nr = 1
421 };
422
timbuart_probe(struct platform_device * dev)423 static int timbuart_probe(struct platform_device *dev)
424 {
425 int err, irq;
426 struct timbuart_port *uart;
427 struct resource *iomem;
428
429 dev_dbg(&dev->dev, "%s\n", __func__);
430
431 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
432 if (!uart) {
433 err = -EINVAL;
434 goto err_mem;
435 }
436
437 uart->usedma = 0;
438
439 uart->port.uartclk = 3250000 * 16;
440 uart->port.fifosize = TIMBUART_FIFO_SIZE;
441 uart->port.regshift = 2;
442 uart->port.iotype = UPIO_MEM;
443 uart->port.ops = &timbuart_ops;
444 uart->port.irq = 0;
445 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
446 uart->port.line = 0;
447 uart->port.dev = &dev->dev;
448
449 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
450 if (!iomem) {
451 err = -ENOMEM;
452 goto err_register;
453 }
454 uart->port.mapbase = iomem->start;
455 uart->port.membase = NULL;
456
457 irq = platform_get_irq(dev, 0);
458 if (irq < 0) {
459 err = -EINVAL;
460 goto err_register;
461 }
462 uart->port.irq = irq;
463
464 tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
465
466 err = uart_register_driver(&timbuart_driver);
467 if (err)
468 goto err_register;
469
470 err = uart_add_one_port(&timbuart_driver, &uart->port);
471 if (err)
472 goto err_add_port;
473
474 platform_set_drvdata(dev, uart);
475
476 return 0;
477
478 err_add_port:
479 uart_unregister_driver(&timbuart_driver);
480 err_register:
481 kfree(uart);
482 err_mem:
483 printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
484 err);
485
486 return err;
487 }
488
timbuart_remove(struct platform_device * dev)489 static int timbuart_remove(struct platform_device *dev)
490 {
491 struct timbuart_port *uart = platform_get_drvdata(dev);
492
493 tasklet_kill(&uart->tasklet);
494 uart_remove_one_port(&timbuart_driver, &uart->port);
495 uart_unregister_driver(&timbuart_driver);
496 kfree(uart);
497
498 return 0;
499 }
500
501 static struct platform_driver timbuart_platform_driver = {
502 .driver = {
503 .name = "timb-uart",
504 .owner = THIS_MODULE,
505 },
506 .probe = timbuart_probe,
507 .remove = timbuart_remove,
508 };
509
510 module_platform_driver(timbuart_platform_driver);
511
512 MODULE_DESCRIPTION("Timberdale UART driver");
513 MODULE_LICENSE("GPL v2");
514 MODULE_ALIAS("platform:timb-uart");
515
516