1 /*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32 #include <linux/io.h>
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
41
42 #include <linux/of.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
47
48 #include <linux/debugfs.h>
49
50 #include "musb_core.h"
51
52 static const struct of_device_id musb_dsps_of_match[];
53
54 /**
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
57 */
dsps_readb(const void __iomem * addr,unsigned offset)58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
59 {
60 return __raw_readb(addr + offset);
61 }
62
dsps_readl(const void __iomem * addr,unsigned offset)63 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
64 {
65 return __raw_readl(addr + offset);
66 }
67
dsps_writeb(void __iomem * addr,unsigned offset,u8 data)68 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
69 {
70 __raw_writeb(data, addr + offset);
71 }
72
dsps_writel(void __iomem * addr,unsigned offset,u32 data)73 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
74 {
75 __raw_writel(data, addr + offset);
76 }
77
78 /**
79 * DSPS musb wrapper register offset.
80 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
81 * musb ips.
82 */
83 struct dsps_musb_wrapper {
84 u16 revision;
85 u16 control;
86 u16 status;
87 u16 epintr_set;
88 u16 epintr_clear;
89 u16 epintr_status;
90 u16 coreintr_set;
91 u16 coreintr_clear;
92 u16 coreintr_status;
93 u16 phy_utmi;
94 u16 mode;
95 u16 tx_mode;
96 u16 rx_mode;
97
98 /* bit positions for control */
99 unsigned reset:5;
100
101 /* bit positions for interrupt */
102 unsigned usb_shift:5;
103 u32 usb_mask;
104 u32 usb_bitmap;
105 unsigned drvvbus:5;
106
107 unsigned txep_shift:5;
108 u32 txep_mask;
109 u32 txep_bitmap;
110
111 unsigned rxep_shift:5;
112 u32 rxep_mask;
113 u32 rxep_bitmap;
114
115 /* bit positions for phy_utmi */
116 unsigned otg_disable:5;
117
118 /* bit positions for mode */
119 unsigned iddig:5;
120 unsigned iddig_mux:5;
121 /* miscellaneous stuff */
122 u8 poll_seconds;
123 };
124
125 /*
126 * register shadow for suspend
127 */
128 struct dsps_context {
129 u32 control;
130 u32 epintr;
131 u32 coreintr;
132 u32 phy_utmi;
133 u32 mode;
134 u32 tx_mode;
135 u32 rx_mode;
136 };
137
138 /**
139 * DSPS glue structure.
140 */
141 struct dsps_glue {
142 struct device *dev;
143 struct platform_device *musb; /* child musb pdev */
144 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
145 struct timer_list timer; /* otg_workaround timer */
146 unsigned long last_timer; /* last timer data for each instance */
147 bool sw_babble_enabled;
148
149 struct dsps_context context;
150 struct debugfs_regset32 regset;
151 struct dentry *dbgfs_root;
152 };
153
154 static const struct debugfs_reg32 dsps_musb_regs[] = {
155 { "revision", 0x00 },
156 { "control", 0x14 },
157 { "status", 0x18 },
158 { "eoi", 0x24 },
159 { "intr0_stat", 0x30 },
160 { "intr1_stat", 0x34 },
161 { "intr0_set", 0x38 },
162 { "intr1_set", 0x3c },
163 { "txmode", 0x70 },
164 { "rxmode", 0x74 },
165 { "autoreq", 0xd0 },
166 { "srpfixtime", 0xd4 },
167 { "tdown", 0xd8 },
168 { "phy_utmi", 0xe0 },
169 { "mode", 0xe8 },
170 };
171
dsps_musb_try_idle(struct musb * musb,unsigned long timeout)172 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
173 {
174 struct device *dev = musb->controller;
175 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
176
177 if (timeout == 0)
178 timeout = jiffies + msecs_to_jiffies(3);
179
180 /* Never idle if active, or when VBUS timeout is not set as host */
181 if (musb->is_active || (musb->a_wait_bcon == 0 &&
182 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
183 dev_dbg(musb->controller, "%s active, deleting timer\n",
184 usb_otg_state_string(musb->xceiv->state));
185 del_timer(&glue->timer);
186 glue->last_timer = jiffies;
187 return;
188 }
189 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
190 return;
191
192 if (!musb->g.dev.driver)
193 return;
194
195 if (time_after(glue->last_timer, timeout) &&
196 timer_pending(&glue->timer)) {
197 dev_dbg(musb->controller,
198 "Longer idle timer already pending, ignoring...\n");
199 return;
200 }
201 glue->last_timer = timeout;
202
203 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
204 usb_otg_state_string(musb->xceiv->state),
205 jiffies_to_msecs(timeout - jiffies));
206 mod_timer(&glue->timer, timeout);
207 }
208
209 /**
210 * dsps_musb_enable - enable interrupts
211 */
dsps_musb_enable(struct musb * musb)212 static void dsps_musb_enable(struct musb *musb)
213 {
214 struct device *dev = musb->controller;
215 struct platform_device *pdev = to_platform_device(dev->parent);
216 struct dsps_glue *glue = platform_get_drvdata(pdev);
217 const struct dsps_musb_wrapper *wrp = glue->wrp;
218 void __iomem *reg_base = musb->ctrl_base;
219 u32 epmask, coremask;
220
221 /* Workaround: setup IRQs through both register sets. */
222 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
223 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
224 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
225
226 dsps_writel(reg_base, wrp->epintr_set, epmask);
227 dsps_writel(reg_base, wrp->coreintr_set, coremask);
228 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
229 dsps_writel(reg_base, wrp->coreintr_set,
230 (1 << wrp->drvvbus) << wrp->usb_shift);
231 dsps_musb_try_idle(musb, 0);
232 }
233
234 /**
235 * dsps_musb_disable - disable HDRC and flush interrupts
236 */
dsps_musb_disable(struct musb * musb)237 static void dsps_musb_disable(struct musb *musb)
238 {
239 struct device *dev = musb->controller;
240 struct platform_device *pdev = to_platform_device(dev->parent);
241 struct dsps_glue *glue = platform_get_drvdata(pdev);
242 const struct dsps_musb_wrapper *wrp = glue->wrp;
243 void __iomem *reg_base = musb->ctrl_base;
244
245 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
246 dsps_writel(reg_base, wrp->epintr_clear,
247 wrp->txep_bitmap | wrp->rxep_bitmap);
248 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
249 }
250
otg_timer(unsigned long _musb)251 static void otg_timer(unsigned long _musb)
252 {
253 struct musb *musb = (void *)_musb;
254 void __iomem *mregs = musb->mregs;
255 struct device *dev = musb->controller;
256 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
257 const struct dsps_musb_wrapper *wrp = glue->wrp;
258 u8 devctl;
259 unsigned long flags;
260 int skip_session = 0;
261
262 /*
263 * We poll because DSPS IP's won't expose several OTG-critical
264 * status change events (from the transceiver) otherwise.
265 */
266 devctl = dsps_readb(mregs, MUSB_DEVCTL);
267 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
268 usb_otg_state_string(musb->xceiv->state));
269
270 spin_lock_irqsave(&musb->lock, flags);
271 switch (musb->xceiv->state) {
272 case OTG_STATE_A_WAIT_BCON:
273 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
274 skip_session = 1;
275 /* fall */
276
277 case OTG_STATE_A_IDLE:
278 case OTG_STATE_B_IDLE:
279 if (devctl & MUSB_DEVCTL_BDEVICE) {
280 musb->xceiv->state = OTG_STATE_B_IDLE;
281 MUSB_DEV_MODE(musb);
282 } else {
283 musb->xceiv->state = OTG_STATE_A_IDLE;
284 MUSB_HST_MODE(musb);
285 }
286 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
287 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
288 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
289 break;
290 case OTG_STATE_A_WAIT_VFALL:
291 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
292 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
293 MUSB_INTR_VBUSERROR << wrp->usb_shift);
294 break;
295 default:
296 break;
297 }
298 spin_unlock_irqrestore(&musb->lock, flags);
299 }
300
dsps_interrupt(int irq,void * hci)301 static irqreturn_t dsps_interrupt(int irq, void *hci)
302 {
303 struct musb *musb = hci;
304 void __iomem *reg_base = musb->ctrl_base;
305 struct device *dev = musb->controller;
306 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
307 const struct dsps_musb_wrapper *wrp = glue->wrp;
308 unsigned long flags;
309 irqreturn_t ret = IRQ_NONE;
310 u32 epintr, usbintr;
311
312 spin_lock_irqsave(&musb->lock, flags);
313
314 /* Get endpoint interrupts */
315 epintr = dsps_readl(reg_base, wrp->epintr_status);
316 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
317 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
318
319 if (epintr)
320 dsps_writel(reg_base, wrp->epintr_status, epintr);
321
322 /* Get usb core interrupts */
323 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
324 if (!usbintr && !epintr)
325 goto out;
326
327 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
328 if (usbintr)
329 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
330
331 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
332 usbintr, epintr);
333 /*
334 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
335 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
336 * switch appropriately between halves of the OTG state machine.
337 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
338 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
339 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
340 */
341 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
342 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
343
344 /*
345 * When a babble condition occurs, the musb controller removes
346 * the session and is no longer in host mode. Hence, all
347 * devices connected to its root hub get disconnected.
348 *
349 * Hand this error down to the musb core isr, so it can
350 * recover.
351 */
352 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
353 musb->int_tx = musb->int_rx = 0;
354 }
355
356 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
357 int drvvbus = dsps_readl(reg_base, wrp->status);
358 void __iomem *mregs = musb->mregs;
359 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
360 int err;
361
362 err = musb->int_usb & MUSB_INTR_VBUSERROR;
363 if (err) {
364 /*
365 * The Mentor core doesn't debounce VBUS as needed
366 * to cope with device connect current spikes. This
367 * means it's not uncommon for bus-powered devices
368 * to get VBUS errors during enumeration.
369 *
370 * This is a workaround, but newer RTL from Mentor
371 * seems to allow a better one: "re"-starting sessions
372 * without waiting for VBUS to stop registering in
373 * devctl.
374 */
375 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
376 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
377 mod_timer(&glue->timer,
378 jiffies + wrp->poll_seconds * HZ);
379 WARNING("VBUS error workaround (delay coming)\n");
380 } else if (drvvbus) {
381 MUSB_HST_MODE(musb);
382 musb->xceiv->otg->default_a = 1;
383 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
384 del_timer(&glue->timer);
385 } else {
386 musb->is_active = 0;
387 MUSB_DEV_MODE(musb);
388 musb->xceiv->otg->default_a = 0;
389 musb->xceiv->state = OTG_STATE_B_IDLE;
390 }
391
392 /* NOTE: this must complete power-on within 100 ms. */
393 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
394 drvvbus ? "on" : "off",
395 usb_otg_state_string(musb->xceiv->state),
396 err ? " ERROR" : "",
397 devctl);
398 ret = IRQ_HANDLED;
399 }
400
401 if (musb->int_tx || musb->int_rx || musb->int_usb)
402 ret |= musb_interrupt(musb);
403
404 /* Poll for ID change in OTG port mode */
405 if (musb->xceiv->state == OTG_STATE_B_IDLE &&
406 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
407 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
408 out:
409 spin_unlock_irqrestore(&musb->lock, flags);
410
411 return ret;
412 }
413
dsps_musb_dbg_init(struct musb * musb,struct dsps_glue * glue)414 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
415 {
416 struct dentry *root;
417 struct dentry *file;
418 char buf[128];
419
420 sprintf(buf, "%s.dsps", dev_name(musb->controller));
421 root = debugfs_create_dir(buf, NULL);
422 if (!root)
423 return -ENOMEM;
424 glue->dbgfs_root = root;
425
426 glue->regset.regs = dsps_musb_regs;
427 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
428 glue->regset.base = musb->ctrl_base;
429
430 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
431 if (!file) {
432 debugfs_remove_recursive(root);
433 return -ENOMEM;
434 }
435 return 0;
436 }
437
dsps_musb_init(struct musb * musb)438 static int dsps_musb_init(struct musb *musb)
439 {
440 struct device *dev = musb->controller;
441 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
442 struct platform_device *parent = to_platform_device(dev->parent);
443 const struct dsps_musb_wrapper *wrp = glue->wrp;
444 void __iomem *reg_base;
445 struct resource *r;
446 u32 rev, val;
447 int ret;
448
449 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
450 if (!r)
451 return -EINVAL;
452
453 reg_base = devm_ioremap_resource(dev, r);
454 if (IS_ERR(reg_base))
455 return PTR_ERR(reg_base);
456 musb->ctrl_base = reg_base;
457
458 /* NOP driver needs change if supporting dual instance */
459 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
460 if (IS_ERR(musb->xceiv))
461 return PTR_ERR(musb->xceiv);
462
463 /* Returns zero if e.g. not clocked */
464 rev = dsps_readl(reg_base, wrp->revision);
465 if (!rev)
466 return -ENODEV;
467
468 usb_phy_init(musb->xceiv);
469 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
470
471 /* Reset the musb */
472 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
473
474 musb->isr = dsps_interrupt;
475
476 /* reset the otgdisable bit, needed for host mode to work */
477 val = dsps_readl(reg_base, wrp->phy_utmi);
478 val &= ~(1 << wrp->otg_disable);
479 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
480
481 /*
482 * Check whether the dsps version has babble control enabled.
483 * In latest silicon revision the babble control logic is enabled.
484 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
485 * logic enabled.
486 */
487 val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
488 if (val == MUSB_BABBLE_RCV_DISABLE) {
489 glue->sw_babble_enabled = true;
490 val |= MUSB_BABBLE_SW_SESSION_CTRL;
491 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
492 }
493
494 ret = dsps_musb_dbg_init(musb, glue);
495 if (ret)
496 return ret;
497
498 return 0;
499 }
500
dsps_musb_exit(struct musb * musb)501 static int dsps_musb_exit(struct musb *musb)
502 {
503 struct device *dev = musb->controller;
504 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
505
506 del_timer_sync(&glue->timer);
507 usb_phy_shutdown(musb->xceiv);
508 debugfs_remove_recursive(glue->dbgfs_root);
509
510 return 0;
511 }
512
dsps_musb_set_mode(struct musb * musb,u8 mode)513 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
514 {
515 struct device *dev = musb->controller;
516 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
517 const struct dsps_musb_wrapper *wrp = glue->wrp;
518 void __iomem *ctrl_base = musb->ctrl_base;
519 u32 reg;
520
521 reg = dsps_readl(ctrl_base, wrp->mode);
522
523 switch (mode) {
524 case MUSB_HOST:
525 reg &= ~(1 << wrp->iddig);
526
527 /*
528 * if we're setting mode to host-only or device-only, we're
529 * going to ignore whatever the PHY sends us and just force
530 * ID pin status by SW
531 */
532 reg |= (1 << wrp->iddig_mux);
533
534 dsps_writel(ctrl_base, wrp->mode, reg);
535 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
536 break;
537 case MUSB_PERIPHERAL:
538 reg |= (1 << wrp->iddig);
539
540 /*
541 * if we're setting mode to host-only or device-only, we're
542 * going to ignore whatever the PHY sends us and just force
543 * ID pin status by SW
544 */
545 reg |= (1 << wrp->iddig_mux);
546
547 dsps_writel(ctrl_base, wrp->mode, reg);
548 break;
549 case MUSB_OTG:
550 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
551 break;
552 default:
553 dev_err(glue->dev, "unsupported mode %d\n", mode);
554 return -EINVAL;
555 }
556
557 return 0;
558 }
559
sw_babble_control(struct musb * musb)560 static bool sw_babble_control(struct musb *musb)
561 {
562 u8 babble_ctl;
563 bool session_restart = false;
564
565 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
566 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
567 babble_ctl);
568 /*
569 * check line monitor flag to check whether babble is
570 * due to noise
571 */
572 dev_dbg(musb->controller, "STUCK_J is %s\n",
573 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
574
575 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
576 int timeout = 10;
577
578 /*
579 * babble is due to noise, then set transmit idle (d7 bit)
580 * to resume normal operation
581 */
582 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
583 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
584 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
585
586 /* wait till line monitor flag cleared */
587 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
588 do {
589 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
590 udelay(1);
591 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
592
593 /* check whether stuck_at_j bit cleared */
594 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
595 /*
596 * real babble condition has occurred
597 * restart the controller to start the
598 * session again
599 */
600 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
601 babble_ctl);
602 session_restart = true;
603 }
604 } else {
605 session_restart = true;
606 }
607
608 return session_restart;
609 }
610
dsps_musb_reset(struct musb * musb)611 static int dsps_musb_reset(struct musb *musb)
612 {
613 struct device *dev = musb->controller;
614 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
615 const struct dsps_musb_wrapper *wrp = glue->wrp;
616 int session_restart = 0;
617
618 if (glue->sw_babble_enabled)
619 session_restart = sw_babble_control(musb);
620 /*
621 * In case of new silicon version babble condition can be recovered
622 * without resetting the MUSB. But for older silicon versions, MUSB
623 * reset is needed
624 */
625 if (session_restart || !glue->sw_babble_enabled) {
626 dev_info(musb->controller, "Restarting MUSB to recover from Babble\n");
627 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
628 usleep_range(100, 200);
629 usb_phy_shutdown(musb->xceiv);
630 usleep_range(100, 200);
631 usb_phy_init(musb->xceiv);
632 session_restart = 1;
633 }
634
635 return !session_restart;
636 }
637
638 static struct musb_platform_ops dsps_ops = {
639 .init = dsps_musb_init,
640 .exit = dsps_musb_exit,
641
642 .enable = dsps_musb_enable,
643 .disable = dsps_musb_disable,
644
645 .try_idle = dsps_musb_try_idle,
646 .set_mode = dsps_musb_set_mode,
647 .reset = dsps_musb_reset,
648 };
649
650 static u64 musb_dmamask = DMA_BIT_MASK(32);
651
get_int_prop(struct device_node * dn,const char * s)652 static int get_int_prop(struct device_node *dn, const char *s)
653 {
654 int ret;
655 u32 val;
656
657 ret = of_property_read_u32(dn, s, &val);
658 if (ret)
659 return 0;
660 return val;
661 }
662
get_musb_port_mode(struct device * dev)663 static int get_musb_port_mode(struct device *dev)
664 {
665 enum usb_dr_mode mode;
666
667 mode = of_usb_get_dr_mode(dev->of_node);
668 switch (mode) {
669 case USB_DR_MODE_HOST:
670 return MUSB_PORT_MODE_HOST;
671
672 case USB_DR_MODE_PERIPHERAL:
673 return MUSB_PORT_MODE_GADGET;
674
675 case USB_DR_MODE_UNKNOWN:
676 case USB_DR_MODE_OTG:
677 default:
678 return MUSB_PORT_MODE_DUAL_ROLE;
679 }
680 }
681
dsps_create_musb_pdev(struct dsps_glue * glue,struct platform_device * parent)682 static int dsps_create_musb_pdev(struct dsps_glue *glue,
683 struct platform_device *parent)
684 {
685 struct musb_hdrc_platform_data pdata;
686 struct resource resources[2];
687 struct resource *res;
688 struct device *dev = &parent->dev;
689 struct musb_hdrc_config *config;
690 struct platform_device *musb;
691 struct device_node *dn = parent->dev.of_node;
692 int ret;
693
694 memset(resources, 0, sizeof(resources));
695 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
696 if (!res) {
697 dev_err(dev, "failed to get memory.\n");
698 return -EINVAL;
699 }
700 resources[0] = *res;
701
702 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
703 if (!res) {
704 dev_err(dev, "failed to get irq.\n");
705 return -EINVAL;
706 }
707 resources[1] = *res;
708
709 /* allocate the child platform device */
710 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
711 if (!musb) {
712 dev_err(dev, "failed to allocate musb device\n");
713 return -ENOMEM;
714 }
715
716 musb->dev.parent = dev;
717 musb->dev.dma_mask = &musb_dmamask;
718 musb->dev.coherent_dma_mask = musb_dmamask;
719 musb->dev.of_node = of_node_get(dn);
720
721 glue->musb = musb;
722
723 ret = platform_device_add_resources(musb, resources,
724 ARRAY_SIZE(resources));
725 if (ret) {
726 dev_err(dev, "failed to add resources\n");
727 goto err;
728 }
729
730 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
731 if (!config) {
732 dev_err(dev, "failed to allocate musb hdrc config\n");
733 ret = -ENOMEM;
734 goto err;
735 }
736 pdata.config = config;
737 pdata.platform_ops = &dsps_ops;
738
739 config->num_eps = get_int_prop(dn, "mentor,num-eps");
740 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
741 config->host_port_deassert_reset_at_resume = 1;
742 pdata.mode = get_musb_port_mode(dev);
743 /* DT keeps this entry in mA, musb expects it as per USB spec */
744 pdata.power = get_int_prop(dn, "mentor,power") / 2;
745 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
746
747 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
748 if (ret) {
749 dev_err(dev, "failed to add platform_data\n");
750 goto err;
751 }
752
753 ret = platform_device_add(musb);
754 if (ret) {
755 dev_err(dev, "failed to register musb device\n");
756 goto err;
757 }
758 return 0;
759
760 err:
761 platform_device_put(musb);
762 return ret;
763 }
764
dsps_probe(struct platform_device * pdev)765 static int dsps_probe(struct platform_device *pdev)
766 {
767 const struct of_device_id *match;
768 const struct dsps_musb_wrapper *wrp;
769 struct dsps_glue *glue;
770 int ret;
771
772 if (!strcmp(pdev->name, "musb-hdrc"))
773 return -ENODEV;
774
775 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
776 if (!match) {
777 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
778 return -EINVAL;
779 }
780 wrp = match->data;
781
782 /* allocate glue */
783 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
784 if (!glue) {
785 dev_err(&pdev->dev, "unable to allocate glue memory\n");
786 return -ENOMEM;
787 }
788
789 glue->dev = &pdev->dev;
790 glue->wrp = wrp;
791
792 platform_set_drvdata(pdev, glue);
793 pm_runtime_enable(&pdev->dev);
794
795 ret = pm_runtime_get_sync(&pdev->dev);
796 if (ret < 0) {
797 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
798 goto err2;
799 }
800
801 ret = dsps_create_musb_pdev(glue, pdev);
802 if (ret)
803 goto err3;
804
805 return 0;
806
807 err3:
808 pm_runtime_put(&pdev->dev);
809 err2:
810 pm_runtime_disable(&pdev->dev);
811 return ret;
812 }
813
dsps_remove(struct platform_device * pdev)814 static int dsps_remove(struct platform_device *pdev)
815 {
816 struct dsps_glue *glue = platform_get_drvdata(pdev);
817
818 platform_device_unregister(glue->musb);
819
820 /* disable usbss clocks */
821 pm_runtime_put(&pdev->dev);
822 pm_runtime_disable(&pdev->dev);
823
824 return 0;
825 }
826
827 static const struct dsps_musb_wrapper am33xx_driver_data = {
828 .revision = 0x00,
829 .control = 0x14,
830 .status = 0x18,
831 .epintr_set = 0x38,
832 .epintr_clear = 0x40,
833 .epintr_status = 0x30,
834 .coreintr_set = 0x3c,
835 .coreintr_clear = 0x44,
836 .coreintr_status = 0x34,
837 .phy_utmi = 0xe0,
838 .mode = 0xe8,
839 .tx_mode = 0x70,
840 .rx_mode = 0x74,
841 .reset = 0,
842 .otg_disable = 21,
843 .iddig = 8,
844 .iddig_mux = 7,
845 .usb_shift = 0,
846 .usb_mask = 0x1ff,
847 .usb_bitmap = (0x1ff << 0),
848 .drvvbus = 8,
849 .txep_shift = 0,
850 .txep_mask = 0xffff,
851 .txep_bitmap = (0xffff << 0),
852 .rxep_shift = 16,
853 .rxep_mask = 0xfffe,
854 .rxep_bitmap = (0xfffe << 16),
855 .poll_seconds = 2,
856 };
857
858 static const struct of_device_id musb_dsps_of_match[] = {
859 { .compatible = "ti,musb-am33xx",
860 .data = (void *) &am33xx_driver_data, },
861 { },
862 };
863 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
864
865 #ifdef CONFIG_PM_SLEEP
dsps_suspend(struct device * dev)866 static int dsps_suspend(struct device *dev)
867 {
868 struct dsps_glue *glue = dev_get_drvdata(dev);
869 const struct dsps_musb_wrapper *wrp = glue->wrp;
870 struct musb *musb = platform_get_drvdata(glue->musb);
871 void __iomem *mbase;
872
873 del_timer_sync(&glue->timer);
874
875 if (!musb)
876 /* This can happen if the musb device is in -EPROBE_DEFER */
877 return 0;
878
879 mbase = musb->ctrl_base;
880 glue->context.control = dsps_readl(mbase, wrp->control);
881 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
882 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
883 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
884 glue->context.mode = dsps_readl(mbase, wrp->mode);
885 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
886 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
887
888 return 0;
889 }
890
dsps_resume(struct device * dev)891 static int dsps_resume(struct device *dev)
892 {
893 struct dsps_glue *glue = dev_get_drvdata(dev);
894 const struct dsps_musb_wrapper *wrp = glue->wrp;
895 struct musb *musb = platform_get_drvdata(glue->musb);
896 void __iomem *mbase;
897
898 if (!musb)
899 return 0;
900
901 mbase = musb->ctrl_base;
902 dsps_writel(mbase, wrp->control, glue->context.control);
903 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
904 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
905 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
906 dsps_writel(mbase, wrp->mode, glue->context.mode);
907 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
908 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
909 if (musb->xceiv->state == OTG_STATE_B_IDLE &&
910 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
911 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
912
913 return 0;
914 }
915 #endif
916
917 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
918
919 static struct platform_driver dsps_usbss_driver = {
920 .probe = dsps_probe,
921 .remove = dsps_remove,
922 .driver = {
923 .name = "musb-dsps",
924 .pm = &dsps_pm_ops,
925 .of_match_table = musb_dsps_of_match,
926 },
927 };
928
929 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
930 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
931 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
932 MODULE_LICENSE("GPL v2");
933
934 module_platform_driver(dsps_usbss_driver);
935