1 /*
2 * ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on wm8731.c by Richard Purdie
8 * Based on ak4535.c by Richard Purdie
9 * Based on wm8753.c by Liam Girdwood
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 /* ** CAUTION **
17 *
18 * This is very simple driver.
19 * It can use headphone output / stereo input only
20 *
21 * AK4642 is tested.
22 * AK4643 is tested.
23 * AK4648 is tested.
24 */
25
26 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <linux/of_device.h>
30 #include <linux/module.h>
31 #include <linux/regmap.h>
32 #include <sound/soc.h>
33 #include <sound/initval.h>
34 #include <sound/tlv.h>
35
36 #define PW_MGMT1 0x00
37 #define PW_MGMT2 0x01
38 #define SG_SL1 0x02
39 #define SG_SL2 0x03
40 #define MD_CTL1 0x04
41 #define MD_CTL2 0x05
42 #define TIMER 0x06
43 #define ALC_CTL1 0x07
44 #define ALC_CTL2 0x08
45 #define L_IVC 0x09
46 #define L_DVC 0x0a
47 #define ALC_CTL3 0x0b
48 #define R_IVC 0x0c
49 #define R_DVC 0x0d
50 #define MD_CTL3 0x0e
51 #define MD_CTL4 0x0f
52 #define PW_MGMT3 0x10
53 #define DF_S 0x11
54 #define FIL3_0 0x12
55 #define FIL3_1 0x13
56 #define FIL3_2 0x14
57 #define FIL3_3 0x15
58 #define EQ_0 0x16
59 #define EQ_1 0x17
60 #define EQ_2 0x18
61 #define EQ_3 0x19
62 #define EQ_4 0x1a
63 #define EQ_5 0x1b
64 #define FIL1_0 0x1c
65 #define FIL1_1 0x1d
66 #define FIL1_2 0x1e
67 #define FIL1_3 0x1f /* The maximum valid register for ak4642 */
68 #define PW_MGMT4 0x20
69 #define MD_CTL5 0x21
70 #define LO_MS 0x22
71 #define HP_MS 0x23
72 #define SPK_MS 0x24 /* The maximum valid register for ak4643 */
73 #define EQ_FBEQAB 0x25
74 #define EQ_FBEQCD 0x26
75 #define EQ_FBEQE 0x27 /* The maximum valid register for ak4648 */
76
77 /* PW_MGMT1*/
78 #define PMVCM (1 << 6) /* VCOM Power Management */
79 #define PMMIN (1 << 5) /* MIN Input Power Management */
80 #define PMDAC (1 << 2) /* DAC Power Management */
81 #define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
82
83 /* PW_MGMT2 */
84 #define HPMTN (1 << 6)
85 #define PMHPL (1 << 5)
86 #define PMHPR (1 << 4)
87 #define MS (1 << 3) /* master/slave select */
88 #define MCKO (1 << 1)
89 #define PMPLL (1 << 0)
90
91 #define PMHP_MASK (PMHPL | PMHPR)
92 #define PMHP PMHP_MASK
93
94 /* PW_MGMT3 */
95 #define PMADR (1 << 0) /* MIC L / ADC R Power Management */
96
97 /* SG_SL1 */
98 #define MINS (1 << 6) /* Switch from MIN to Speaker */
99 #define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
100 #define PMMP (1 << 2) /* MPWR pin Power Management */
101 #define MGAIN0 (1 << 0) /* MIC amp gain*/
102
103 /* TIMER */
104 #define ZTM(param) ((param & 0x3) << 4) /* ALC Zero Crossing TimeOut */
105 #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
106
107 /* ALC_CTL1 */
108 #define ALC (1 << 5) /* ALC Enable */
109 #define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
110
111 /* MD_CTL1 */
112 #define PLL3 (1 << 7)
113 #define PLL2 (1 << 6)
114 #define PLL1 (1 << 5)
115 #define PLL0 (1 << 4)
116 #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
117
118 #define BCKO_MASK (1 << 3)
119 #define BCKO_64 BCKO_MASK
120
121 #define DIF_MASK (3 << 0)
122 #define DSP (0 << 0)
123 #define RIGHT_J (1 << 0)
124 #define LEFT_J (2 << 0)
125 #define I2S (3 << 0)
126
127 /* MD_CTL2 */
128 #define FS0 (1 << 0)
129 #define FS1 (1 << 1)
130 #define FS2 (1 << 2)
131 #define FS3 (1 << 5)
132 #define FS_MASK (FS0 | FS1 | FS2 | FS3)
133
134 /* MD_CTL3 */
135 #define BST1 (1 << 3)
136
137 /* MD_CTL4 */
138 #define DACH (1 << 0)
139
140 struct ak4642_drvdata {
141 const struct regmap_config *regmap_config;
142 int extended_frequencies;
143 };
144
145 struct ak4642_priv {
146 const struct ak4642_drvdata *drvdata;
147 };
148
149 /*
150 * Playback Volume (table 39)
151 *
152 * max : 0x00 : +12.0 dB
153 * ( 0.5 dB step )
154 * min : 0xFE : -115.0 dB
155 * mute: 0xFF
156 */
157 static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
158
159 static const struct snd_kcontrol_new ak4642_snd_controls[] = {
160
161 SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
162 0, 0xFF, 1, out_tlv),
163 SOC_SINGLE("ALC Capture Switch", ALC_CTL1, 5, 1, 0),
164 SOC_SINGLE("ALC Capture ZC Switch", ALC_CTL1, 4, 1, 1),
165 };
166
167 static const struct snd_kcontrol_new ak4642_headphone_control =
168 SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
169
170 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
171 SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
172 };
173
174 static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
175
176 /* Outputs */
177 SND_SOC_DAPM_OUTPUT("HPOUTL"),
178 SND_SOC_DAPM_OUTPUT("HPOUTR"),
179 SND_SOC_DAPM_OUTPUT("LINEOUT"),
180
181 SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
182 SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
183 SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
184 &ak4642_headphone_control),
185
186 SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
187
188 SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
189 &ak4642_lout_mixer_controls[0],
190 ARRAY_SIZE(ak4642_lout_mixer_controls)),
191
192 /* DAC */
193 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
194 };
195
196 static const struct snd_soc_dapm_route ak4642_intercon[] = {
197
198 /* Outputs */
199 {"HPOUTL", NULL, "HPL Out"},
200 {"HPOUTR", NULL, "HPR Out"},
201 {"LINEOUT", NULL, "LINEOUT Mixer"},
202
203 {"HPL Out", NULL, "Headphone Enable"},
204 {"HPR Out", NULL, "Headphone Enable"},
205
206 {"Headphone Enable", "Switch", "DACH"},
207
208 {"DACH", NULL, "DAC"},
209
210 {"LINEOUT Mixer", "DACL", "DAC"},
211 };
212
213 /*
214 * ak4642 register cache
215 */
216 static const struct reg_default ak4643_reg[] = {
217 { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 },
218 { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 },
219 { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 },
220 { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0x08 },
221 { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 },
222 { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 },
223 { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 },
224 { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 },
225 { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 },
226 { 36, 0x00 },
227 };
228
229 /* The default settings for 0x0 ~ 0x1f registers are the same for ak4642
230 and ak4643. So we reuse the ak4643 reg_default for ak4642.
231 The valid registers for ak4642 are 0x0 ~ 0x1f which is a subset of ak4643,
232 so define NUM_AK4642_REG_DEFAULTS for ak4642.
233 */
234 #define ak4642_reg ak4643_reg
235 #define NUM_AK4642_REG_DEFAULTS (FIL1_3 + 1)
236
237 static const struct reg_default ak4648_reg[] = {
238 { 0, 0x00 }, { 1, 0x00 }, { 2, 0x01 }, { 3, 0x00 },
239 { 4, 0x02 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 },
240 { 8, 0xe1 }, { 9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 },
241 { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0xb8 },
242 { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 },
243 { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 },
244 { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 },
245 { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 },
246 { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 },
247 { 36, 0x00 }, { 37, 0x88 }, { 38, 0x88 }, { 39, 0x08 },
248 };
249
ak4642_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)250 static int ak4642_dai_startup(struct snd_pcm_substream *substream,
251 struct snd_soc_dai *dai)
252 {
253 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
254 struct snd_soc_codec *codec = dai->codec;
255
256 if (is_play) {
257 /*
258 * start headphone output
259 *
260 * PLL, Master Mode
261 * Audio I/F Format :MSB justified (ADC & DAC)
262 * Bass Boost Level : Middle
263 *
264 * This operation came from example code of
265 * "ASAHI KASEI AK4642" (japanese) manual p97.
266 */
267 snd_soc_write(codec, L_IVC, 0x91); /* volume */
268 snd_soc_write(codec, R_IVC, 0x91); /* volume */
269 } else {
270 /*
271 * start stereo input
272 *
273 * PLL Master Mode
274 * Audio I/F Format:MSB justified (ADC & DAC)
275 * Pre MIC AMP:+20dB
276 * MIC Power On
277 * ALC setting:Refer to Table 35
278 * ALC bit=“1”
279 *
280 * This operation came from example code of
281 * "ASAHI KASEI AK4642" (japanese) manual p94.
282 */
283 snd_soc_update_bits(codec, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0);
284 snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
285 snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
286 snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
287 snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
288 }
289
290 return 0;
291 }
292
ak4642_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)293 static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
294 struct snd_soc_dai *dai)
295 {
296 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
297 struct snd_soc_codec *codec = dai->codec;
298
299 if (is_play) {
300 } else {
301 /* stop stereo input */
302 snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
303 snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
304 snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
305 }
306 }
307
ak4642_dai_set_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)308 static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
309 int clk_id, unsigned int freq, int dir)
310 {
311 struct snd_soc_codec *codec = codec_dai->codec;
312 struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec);
313 u8 pll;
314 int extended_freq = 0;
315
316 switch (freq) {
317 case 11289600:
318 pll = PLL2;
319 break;
320 case 12288000:
321 pll = PLL2 | PLL0;
322 break;
323 case 12000000:
324 pll = PLL2 | PLL1;
325 break;
326 case 24000000:
327 pll = PLL2 | PLL1 | PLL0;
328 break;
329 case 13500000:
330 pll = PLL3 | PLL2;
331 break;
332 case 27000000:
333 pll = PLL3 | PLL2 | PLL0;
334 break;
335 case 19200000:
336 pll = PLL3;
337 extended_freq = 1;
338 break;
339 case 13000000:
340 pll = PLL3 | PLL2 | PLL1;
341 extended_freq = 1;
342 break;
343 case 26000000:
344 pll = PLL3 | PLL2 | PLL1 | PLL0;
345 extended_freq = 1;
346 break;
347 default:
348 return -EINVAL;
349 }
350
351 if (extended_freq && !priv->drvdata->extended_frequencies)
352 return -EINVAL;
353
354 snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
355
356 return 0;
357 }
358
ak4642_dai_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)359 static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
360 {
361 struct snd_soc_codec *codec = dai->codec;
362 u8 data;
363 u8 bcko;
364
365 data = MCKO | PMPLL; /* use MCKO */
366 bcko = 0;
367
368 /* set master/slave audio interface */
369 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
370 case SND_SOC_DAIFMT_CBM_CFM:
371 data |= MS;
372 bcko = BCKO_64;
373 break;
374 case SND_SOC_DAIFMT_CBS_CFS:
375 break;
376 default:
377 return -EINVAL;
378 }
379 snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
380 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
381
382 /* format type */
383 data = 0;
384 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
385 case SND_SOC_DAIFMT_LEFT_J:
386 data = LEFT_J;
387 break;
388 case SND_SOC_DAIFMT_I2S:
389 data = I2S;
390 break;
391 /* FIXME
392 * Please add RIGHT_J / DSP support here
393 */
394 default:
395 return -EINVAL;
396 }
397 snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
398
399 return 0;
400 }
401
ak4642_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)402 static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
403 struct snd_pcm_hw_params *params,
404 struct snd_soc_dai *dai)
405 {
406 struct snd_soc_codec *codec = dai->codec;
407 u8 rate;
408
409 switch (params_rate(params)) {
410 case 7350:
411 rate = FS2;
412 break;
413 case 8000:
414 rate = 0;
415 break;
416 case 11025:
417 rate = FS2 | FS0;
418 break;
419 case 12000:
420 rate = FS0;
421 break;
422 case 14700:
423 rate = FS2 | FS1;
424 break;
425 case 16000:
426 rate = FS1;
427 break;
428 case 22050:
429 rate = FS2 | FS1 | FS0;
430 break;
431 case 24000:
432 rate = FS1 | FS0;
433 break;
434 case 29400:
435 rate = FS3 | FS2 | FS1;
436 break;
437 case 32000:
438 rate = FS3 | FS1;
439 break;
440 case 44100:
441 rate = FS3 | FS2 | FS1 | FS0;
442 break;
443 case 48000:
444 rate = FS3 | FS1 | FS0;
445 break;
446 default:
447 return -EINVAL;
448 }
449 snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
450
451 return 0;
452 }
453
ak4642_set_bias_level(struct snd_soc_codec * codec,enum snd_soc_bias_level level)454 static int ak4642_set_bias_level(struct snd_soc_codec *codec,
455 enum snd_soc_bias_level level)
456 {
457 switch (level) {
458 case SND_SOC_BIAS_OFF:
459 snd_soc_write(codec, PW_MGMT1, 0x00);
460 break;
461 default:
462 snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
463 break;
464 }
465 codec->dapm.bias_level = level;
466
467 return 0;
468 }
469
470 static const struct snd_soc_dai_ops ak4642_dai_ops = {
471 .startup = ak4642_dai_startup,
472 .shutdown = ak4642_dai_shutdown,
473 .set_sysclk = ak4642_dai_set_sysclk,
474 .set_fmt = ak4642_dai_set_fmt,
475 .hw_params = ak4642_dai_hw_params,
476 };
477
478 static struct snd_soc_dai_driver ak4642_dai = {
479 .name = "ak4642-hifi",
480 .playback = {
481 .stream_name = "Playback",
482 .channels_min = 1,
483 .channels_max = 2,
484 .rates = SNDRV_PCM_RATE_8000_48000,
485 .formats = SNDRV_PCM_FMTBIT_S16_LE },
486 .capture = {
487 .stream_name = "Capture",
488 .channels_min = 1,
489 .channels_max = 2,
490 .rates = SNDRV_PCM_RATE_8000_48000,
491 .formats = SNDRV_PCM_FMTBIT_S16_LE },
492 .ops = &ak4642_dai_ops,
493 .symmetric_rates = 1,
494 };
495
ak4642_resume(struct snd_soc_codec * codec)496 static int ak4642_resume(struct snd_soc_codec *codec)
497 {
498 struct regmap *regmap = dev_get_regmap(codec->dev, NULL);
499
500 regcache_mark_dirty(regmap);
501 regcache_sync(regmap);
502 return 0;
503 }
504
505
ak4642_probe(struct snd_soc_codec * codec)506 static int ak4642_probe(struct snd_soc_codec *codec)
507 {
508 ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
509
510 return 0;
511 }
512
ak4642_remove(struct snd_soc_codec * codec)513 static int ak4642_remove(struct snd_soc_codec *codec)
514 {
515 ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
516 return 0;
517 }
518
519 static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
520 .probe = ak4642_probe,
521 .remove = ak4642_remove,
522 .resume = ak4642_resume,
523 .set_bias_level = ak4642_set_bias_level,
524 .controls = ak4642_snd_controls,
525 .num_controls = ARRAY_SIZE(ak4642_snd_controls),
526 .dapm_widgets = ak4642_dapm_widgets,
527 .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
528 .dapm_routes = ak4642_intercon,
529 .num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
530 };
531
532 static const struct regmap_config ak4642_regmap = {
533 .reg_bits = 8,
534 .val_bits = 8,
535 .max_register = FIL1_3,
536 .reg_defaults = ak4642_reg,
537 .num_reg_defaults = NUM_AK4642_REG_DEFAULTS,
538 .cache_type = REGCACHE_RBTREE,
539 };
540
541 static const struct regmap_config ak4643_regmap = {
542 .reg_bits = 8,
543 .val_bits = 8,
544 .max_register = SPK_MS,
545 .reg_defaults = ak4643_reg,
546 .num_reg_defaults = ARRAY_SIZE(ak4643_reg),
547 .cache_type = REGCACHE_RBTREE,
548 };
549
550 static const struct regmap_config ak4648_regmap = {
551 .reg_bits = 8,
552 .val_bits = 8,
553 .max_register = EQ_FBEQE,
554 .reg_defaults = ak4648_reg,
555 .num_reg_defaults = ARRAY_SIZE(ak4648_reg),
556 .cache_type = REGCACHE_RBTREE,
557 };
558
559 static const struct ak4642_drvdata ak4642_drvdata = {
560 .regmap_config = &ak4642_regmap,
561 };
562
563 static const struct ak4642_drvdata ak4643_drvdata = {
564 .regmap_config = &ak4643_regmap,
565 };
566
567 static const struct ak4642_drvdata ak4648_drvdata = {
568 .regmap_config = &ak4648_regmap,
569 .extended_frequencies = 1,
570 };
571
572 static const struct of_device_id ak4642_of_match[];
ak4642_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)573 static int ak4642_i2c_probe(struct i2c_client *i2c,
574 const struct i2c_device_id *id)
575 {
576 struct device_node *np = i2c->dev.of_node;
577 const struct ak4642_drvdata *drvdata = NULL;
578 struct regmap *regmap;
579 struct ak4642_priv *priv;
580
581 if (np) {
582 const struct of_device_id *of_id;
583
584 of_id = of_match_device(ak4642_of_match, &i2c->dev);
585 if (of_id)
586 drvdata = of_id->data;
587 } else {
588 drvdata = (const struct ak4642_drvdata *)id->driver_data;
589 }
590
591 if (!drvdata) {
592 dev_err(&i2c->dev, "Unknown device type\n");
593 return -EINVAL;
594 }
595
596 priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
597 if (!priv)
598 return -ENOMEM;
599
600 priv->drvdata = drvdata;
601
602 i2c_set_clientdata(i2c, priv);
603
604 regmap = devm_regmap_init_i2c(i2c, drvdata->regmap_config);
605 if (IS_ERR(regmap))
606 return PTR_ERR(regmap);
607
608 return snd_soc_register_codec(&i2c->dev,
609 &soc_codec_dev_ak4642, &ak4642_dai, 1);
610 }
611
ak4642_i2c_remove(struct i2c_client * client)612 static int ak4642_i2c_remove(struct i2c_client *client)
613 {
614 snd_soc_unregister_codec(&client->dev);
615 return 0;
616 }
617
618 static const struct of_device_id ak4642_of_match[] = {
619 { .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata},
620 { .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata},
621 { .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata},
622 {},
623 };
624 MODULE_DEVICE_TABLE(of, ak4642_of_match);
625
626 static const struct i2c_device_id ak4642_i2c_id[] = {
627 { "ak4642", (kernel_ulong_t)&ak4642_drvdata },
628 { "ak4643", (kernel_ulong_t)&ak4643_drvdata },
629 { "ak4648", (kernel_ulong_t)&ak4648_drvdata },
630 { }
631 };
632 MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
633
634 static struct i2c_driver ak4642_i2c_driver = {
635 .driver = {
636 .name = "ak4642-codec",
637 .owner = THIS_MODULE,
638 .of_match_table = ak4642_of_match,
639 },
640 .probe = ak4642_i2c_probe,
641 .remove = ak4642_i2c_remove,
642 .id_table = ak4642_i2c_id,
643 };
644
645 module_i2c_driver(ak4642_i2c_driver);
646
647 MODULE_DESCRIPTION("Soc AK4642 driver");
648 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
649 MODULE_LICENSE("GPL");
650