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1 /*
2  *  sn95031.c -  TI sn95031 Codec driver
3  *
4  *  Copyright (C) 2010 Intel Corp
5  *  Author: Vinod Koul <vinod.koul@intel.com>
6  *  Author: Harsha Priya <priya.harsha@intel.com>
7  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  *
13  *  This program is distributed in the hope that it will be useful, but
14  *  WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  *  General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License along
19  *  with this program; if not, write to the Free Software Foundation, Inc.,
20  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21  *
22  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23  *
24  *
25  */
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 
28 #include <linux/platform_device.h>
29 #include <linux/delay.h>
30 #include <linux/slab.h>
31 #include <linux/module.h>
32 
33 #include <asm/intel_scu_ipc.h>
34 #include <sound/pcm.h>
35 #include <sound/pcm_params.h>
36 #include <sound/soc.h>
37 #include <sound/soc-dapm.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40 #include <sound/jack.h>
41 #include "sn95031.h"
42 
43 #define SN95031_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
44 #define SN95031_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
45 
46 /* adc helper functions */
47 
48 /* enables mic bias voltage */
sn95031_enable_mic_bias(struct snd_soc_codec * codec)49 static void sn95031_enable_mic_bias(struct snd_soc_codec *codec)
50 {
51 	snd_soc_write(codec, SN95031_VAUD, BIT(2)|BIT(1)|BIT(0));
52 	snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(2), BIT(2));
53 }
54 
55 /* Enable/Disable the ADC depending on the argument */
configure_adc(struct snd_soc_codec * sn95031_codec,int val)56 static void configure_adc(struct snd_soc_codec *sn95031_codec, int val)
57 {
58 	int value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
59 
60 	if (val) {
61 		/* Enable and start the ADC */
62 		value |= (SN95031_ADC_ENBL | SN95031_ADC_START);
63 		value &= (~SN95031_ADC_NO_LOOP);
64 	} else {
65 		/* Just stop the ADC */
66 		value &= (~SN95031_ADC_START);
67 	}
68 	snd_soc_write(sn95031_codec, SN95031_ADC1CNTL1, value);
69 }
70 
71 /*
72  * finds an empty channel for conversion
73  * If the ADC is not enabled then start using 0th channel
74  * itself. Otherwise find an empty channel by looking for a
75  * channel in which the stopbit is set to 1. returns the index
76  * of the first free channel if succeeds or an error code.
77  *
78  * Context: can sleep
79  *
80  */
find_free_channel(struct snd_soc_codec * sn95031_codec)81 static int find_free_channel(struct snd_soc_codec *sn95031_codec)
82 {
83 	int i, value;
84 
85 	/* check whether ADC is enabled */
86 	value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
87 
88 	if ((value & SN95031_ADC_ENBL) == 0)
89 		return 0;
90 
91 	/* ADC is already enabled; Looking for an empty channel */
92 	for (i = 0; i <	SN95031_ADC_CHANLS_MAX; i++) {
93 		value = snd_soc_read(sn95031_codec,
94 				SN95031_ADC_CHNL_START_ADDR + i);
95 		if (value & SN95031_STOPBIT_MASK)
96 			break;
97 	}
98 	return (i == SN95031_ADC_CHANLS_MAX) ? (-EINVAL) : i;
99 }
100 
101 /* Initialize the ADC for reading micbias values. Can sleep. */
sn95031_initialize_adc(struct snd_soc_codec * sn95031_codec)102 static int sn95031_initialize_adc(struct snd_soc_codec *sn95031_codec)
103 {
104 	int base_addr, chnl_addr;
105 	int value;
106 	int channel_index;
107 
108 	/* Index of the first channel in which the stop bit is set */
109 	channel_index = find_free_channel(sn95031_codec);
110 	if (channel_index < 0) {
111 		pr_err("No free ADC channels");
112 		return channel_index;
113 	}
114 
115 	base_addr = SN95031_ADC_CHNL_START_ADDR + channel_index;
116 
117 	if (!(channel_index == 0 || channel_index ==  SN95031_ADC_LOOP_MAX)) {
118 		/* Reset stop bit for channels other than 0 and 12 */
119 		value = snd_soc_read(sn95031_codec, base_addr);
120 		/* Set the stop bit to zero */
121 		snd_soc_write(sn95031_codec, base_addr, value & 0xEF);
122 		/* Index of the first free channel */
123 		base_addr++;
124 		channel_index++;
125 	}
126 
127 	/* Since this is the last channel, set the stop bit
128 	   to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
129 	snd_soc_write(sn95031_codec, base_addr,
130 				SN95031_AUDIO_DETECT_CODE | 0x10);
131 
132 	chnl_addr = SN95031_ADC_DATA_START_ADDR + 2 * channel_index;
133 	pr_debug("mid_initialize : %x", chnl_addr);
134 	configure_adc(sn95031_codec, 1);
135 	return chnl_addr;
136 }
137 
138 
139 /* reads the ADC registers and gets the mic bias value in mV. */
sn95031_get_mic_bias(struct snd_soc_codec * codec)140 static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec)
141 {
142 	u16 adc_adr = sn95031_initialize_adc(codec);
143 	u16 adc_val1, adc_val2;
144 	unsigned int mic_bias;
145 
146 	sn95031_enable_mic_bias(codec);
147 
148 	/* Enable the sound card for conversion before reading */
149 	snd_soc_write(codec, SN95031_ADC1CNTL3, 0x05);
150 	/* Re-toggle the RRDATARD bit */
151 	snd_soc_write(codec, SN95031_ADC1CNTL3, 0x04);
152 
153 	/* Read the higher bits of data */
154 	msleep(1000);
155 	adc_val1 = snd_soc_read(codec, adc_adr);
156 	adc_adr++;
157 	adc_val2 = snd_soc_read(codec, adc_adr);
158 
159 	/* Adding lower two bits to the higher bits */
160 	mic_bias = (adc_val1 << 2) + (adc_val2 & 3);
161 	mic_bias = (mic_bias * SN95031_ADC_ONE_LSB_MULTIPLIER) / 1000;
162 	pr_debug("mic bias = %dmV\n", mic_bias);
163 	return mic_bias;
164 }
165 /*end - adc helper functions */
166 
sn95031_read(void * ctx,unsigned int reg,unsigned int * val)167 static int sn95031_read(void *ctx, unsigned int reg, unsigned int *val)
168 {
169 	u8 value = 0;
170 	int ret;
171 
172 	ret = intel_scu_ipc_ioread8(reg, &value);
173 	if (ret == 0)
174 		*val = value;
175 
176 	return ret;
177 }
178 
sn95031_write(void * ctx,unsigned int reg,unsigned int value)179 static int sn95031_write(void *ctx, unsigned int reg, unsigned int value)
180 {
181 	return intel_scu_ipc_iowrite8(reg, value);
182 }
183 
184 static const struct regmap_config sn95031_regmap = {
185 	.reg_read = sn95031_read,
186 	.reg_write = sn95031_write,
187 };
188 
sn95031_set_vaud_bias(struct snd_soc_codec * codec,enum snd_soc_bias_level level)189 static int sn95031_set_vaud_bias(struct snd_soc_codec *codec,
190 		enum snd_soc_bias_level level)
191 {
192 	switch (level) {
193 	case SND_SOC_BIAS_ON:
194 		break;
195 
196 	case SND_SOC_BIAS_PREPARE:
197 		if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
198 			pr_debug("vaud_bias powering up pll\n");
199 			/* power up the pll */
200 			snd_soc_write(codec, SN95031_AUDPLLCTRL, BIT(5));
201 			/* enable pcm 2 */
202 			snd_soc_update_bits(codec, SN95031_PCM2C2,
203 					BIT(0), BIT(0));
204 		}
205 		break;
206 
207 	case SND_SOC_BIAS_STANDBY:
208 		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
209 			pr_debug("vaud_bias power up rail\n");
210 			/* power up the rail */
211 			snd_soc_write(codec, SN95031_VAUD,
212 					BIT(2)|BIT(1)|BIT(0));
213 			msleep(1);
214 		} else if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE) {
215 			/* turn off pcm */
216 			pr_debug("vaud_bias power dn pcm\n");
217 			snd_soc_update_bits(codec, SN95031_PCM2C2, BIT(0), 0);
218 			snd_soc_write(codec, SN95031_AUDPLLCTRL, 0);
219 		}
220 		break;
221 
222 
223 	case SND_SOC_BIAS_OFF:
224 		pr_debug("vaud_bias _OFF doing rail shutdown\n");
225 		snd_soc_write(codec, SN95031_VAUD, BIT(3));
226 		break;
227 	}
228 
229 	codec->dapm.bias_level = level;
230 	return 0;
231 }
232 
sn95031_vhs_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)233 static int sn95031_vhs_event(struct snd_soc_dapm_widget *w,
234 		    struct snd_kcontrol *kcontrol, int event)
235 {
236 	if (SND_SOC_DAPM_EVENT_ON(event)) {
237 		pr_debug("VHS SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
238 		/* power up the rail */
239 		snd_soc_write(w->codec, SN95031_VHSP, 0x3D);
240 		snd_soc_write(w->codec, SN95031_VHSN, 0x3F);
241 		msleep(1);
242 	} else if (SND_SOC_DAPM_EVENT_OFF(event)) {
243 		pr_debug("VHS SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
244 		snd_soc_write(w->codec, SN95031_VHSP, 0xC4);
245 		snd_soc_write(w->codec, SN95031_VHSN, 0x04);
246 	}
247 	return 0;
248 }
249 
sn95031_vihf_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)250 static int sn95031_vihf_event(struct snd_soc_dapm_widget *w,
251 		    struct snd_kcontrol *kcontrol, int event)
252 {
253 	if (SND_SOC_DAPM_EVENT_ON(event)) {
254 		pr_debug("VIHF SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
255 		/* power up the rail */
256 		snd_soc_write(w->codec, SN95031_VIHF, 0x27);
257 		msleep(1);
258 	} else if (SND_SOC_DAPM_EVENT_OFF(event)) {
259 		pr_debug("VIHF SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
260 		snd_soc_write(w->codec, SN95031_VIHF, 0x24);
261 	}
262 	return 0;
263 }
264 
sn95031_dmic12_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)265 static int sn95031_dmic12_event(struct snd_soc_dapm_widget *w,
266 			struct snd_kcontrol *k, int event)
267 {
268 	unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
269 
270 	if (SND_SOC_DAPM_EVENT_ON(event)) {
271 		ldo = BIT(5)|BIT(4);
272 		clk_dir = BIT(0);
273 		data_dir = BIT(7);
274 	}
275 	/* program DMIC LDO, clock and set clock */
276 	snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
277 	snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(0), clk_dir);
278 	snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(7), data_dir);
279 	return 0;
280 }
281 
sn95031_dmic34_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)282 static int sn95031_dmic34_event(struct snd_soc_dapm_widget *w,
283 			struct snd_kcontrol *k, int event)
284 {
285 	unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
286 
287 	if (SND_SOC_DAPM_EVENT_ON(event)) {
288 		ldo = BIT(5)|BIT(4);
289 		clk_dir = BIT(2);
290 		data_dir = BIT(1);
291 	}
292 	/* program DMIC LDO, clock and set clock */
293 	snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
294 	snd_soc_update_bits(w->codec, SN95031_DMICBUF0123, BIT(2), clk_dir);
295 	snd_soc_update_bits(w->codec, SN95031_DMICBUF45, BIT(1), data_dir);
296 	return 0;
297 }
298 
sn95031_dmic56_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)299 static int sn95031_dmic56_event(struct snd_soc_dapm_widget *w,
300 			struct snd_kcontrol *k, int event)
301 {
302 	unsigned int ldo = 0;
303 
304 	if (SND_SOC_DAPM_EVENT_ON(event))
305 		ldo = BIT(7)|BIT(6);
306 
307 	/* program DMIC LDO */
308 	snd_soc_update_bits(w->codec, SN95031_MICBIAS, BIT(7)|BIT(6), ldo);
309 	return 0;
310 }
311 
312 /* mux controls */
313 static const char *sn95031_mic_texts[] = { "AMIC", "LineIn" };
314 
315 static SOC_ENUM_SINGLE_DECL(sn95031_micl_enum,
316 			    SN95031_ADCCONFIG, 1, sn95031_mic_texts);
317 
318 static const struct snd_kcontrol_new sn95031_micl_mux_control =
319 	SOC_DAPM_ENUM("Route", sn95031_micl_enum);
320 
321 static SOC_ENUM_SINGLE_DECL(sn95031_micr_enum,
322 			    SN95031_ADCCONFIG, 3, sn95031_mic_texts);
323 
324 static const struct snd_kcontrol_new sn95031_micr_mux_control =
325 	SOC_DAPM_ENUM("Route", sn95031_micr_enum);
326 
327 static const char *sn95031_input_texts[] = {	"DMIC1", "DMIC2", "DMIC3",
328 						"DMIC4", "DMIC5", "DMIC6",
329 						"ADC Left", "ADC Right" };
330 
331 static SOC_ENUM_SINGLE_DECL(sn95031_input1_enum,
332 			    SN95031_AUDIOMUX12, 0, sn95031_input_texts);
333 
334 static const struct snd_kcontrol_new sn95031_input1_mux_control =
335 	SOC_DAPM_ENUM("Route", sn95031_input1_enum);
336 
337 static SOC_ENUM_SINGLE_DECL(sn95031_input2_enum,
338 			    SN95031_AUDIOMUX12, 4, sn95031_input_texts);
339 
340 static const struct snd_kcontrol_new sn95031_input2_mux_control =
341 	SOC_DAPM_ENUM("Route", sn95031_input2_enum);
342 
343 static SOC_ENUM_SINGLE_DECL(sn95031_input3_enum,
344 			    SN95031_AUDIOMUX34, 0, sn95031_input_texts);
345 
346 static const struct snd_kcontrol_new sn95031_input3_mux_control =
347 	SOC_DAPM_ENUM("Route", sn95031_input3_enum);
348 
349 static SOC_ENUM_SINGLE_DECL(sn95031_input4_enum,
350 			    SN95031_AUDIOMUX34, 4, sn95031_input_texts);
351 
352 static const struct snd_kcontrol_new sn95031_input4_mux_control =
353 	SOC_DAPM_ENUM("Route", sn95031_input4_enum);
354 
355 /* capture path controls */
356 
357 static const char *sn95031_micmode_text[] = {"Single Ended", "Differential"};
358 
359 /* 0dB to 30dB in 10dB steps */
360 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 10, 0);
361 
362 static SOC_ENUM_SINGLE_DECL(sn95031_micmode1_enum,
363 			    SN95031_MICAMP1, 1, sn95031_micmode_text);
364 static SOC_ENUM_SINGLE_DECL(sn95031_micmode2_enum,
365 			    SN95031_MICAMP2, 1, sn95031_micmode_text);
366 
367 static const char *sn95031_dmic_cfg_text[] = {"GPO", "DMIC"};
368 
369 static SOC_ENUM_SINGLE_DECL(sn95031_dmic12_cfg_enum,
370 			    SN95031_DMICMUX, 0, sn95031_dmic_cfg_text);
371 static SOC_ENUM_SINGLE_DECL(sn95031_dmic34_cfg_enum,
372 			    SN95031_DMICMUX, 1, sn95031_dmic_cfg_text);
373 static SOC_ENUM_SINGLE_DECL(sn95031_dmic56_cfg_enum,
374 			    SN95031_DMICMUX, 2, sn95031_dmic_cfg_text);
375 
376 static const struct snd_kcontrol_new sn95031_snd_controls[] = {
377 	SOC_ENUM("Mic1Mode Capture Route", sn95031_micmode1_enum),
378 	SOC_ENUM("Mic2Mode Capture Route", sn95031_micmode2_enum),
379 	SOC_ENUM("DMIC12 Capture Route", sn95031_dmic12_cfg_enum),
380 	SOC_ENUM("DMIC34 Capture Route", sn95031_dmic34_cfg_enum),
381 	SOC_ENUM("DMIC56 Capture Route", sn95031_dmic56_cfg_enum),
382 	SOC_SINGLE_TLV("Mic1 Capture Volume", SN95031_MICAMP1,
383 			2, 4, 0, mic_tlv),
384 	SOC_SINGLE_TLV("Mic2 Capture Volume", SN95031_MICAMP2,
385 			2, 4, 0, mic_tlv),
386 };
387 
388 /* DAPM widgets */
389 static const struct snd_soc_dapm_widget sn95031_dapm_widgets[] = {
390 
391 	/* all end points mic, hs etc */
392 	SND_SOC_DAPM_OUTPUT("HPOUTL"),
393 	SND_SOC_DAPM_OUTPUT("HPOUTR"),
394 	SND_SOC_DAPM_OUTPUT("EPOUT"),
395 	SND_SOC_DAPM_OUTPUT("IHFOUTL"),
396 	SND_SOC_DAPM_OUTPUT("IHFOUTR"),
397 	SND_SOC_DAPM_OUTPUT("LINEOUTL"),
398 	SND_SOC_DAPM_OUTPUT("LINEOUTR"),
399 	SND_SOC_DAPM_OUTPUT("VIB1OUT"),
400 	SND_SOC_DAPM_OUTPUT("VIB2OUT"),
401 
402 	SND_SOC_DAPM_INPUT("AMIC1"), /* headset mic */
403 	SND_SOC_DAPM_INPUT("AMIC2"),
404 	SND_SOC_DAPM_INPUT("DMIC1"),
405 	SND_SOC_DAPM_INPUT("DMIC2"),
406 	SND_SOC_DAPM_INPUT("DMIC3"),
407 	SND_SOC_DAPM_INPUT("DMIC4"),
408 	SND_SOC_DAPM_INPUT("DMIC5"),
409 	SND_SOC_DAPM_INPUT("DMIC6"),
410 	SND_SOC_DAPM_INPUT("LINEINL"),
411 	SND_SOC_DAPM_INPUT("LINEINR"),
412 
413 	SND_SOC_DAPM_MICBIAS("AMIC1Bias", SN95031_MICBIAS, 2, 0),
414 	SND_SOC_DAPM_MICBIAS("AMIC2Bias", SN95031_MICBIAS, 3, 0),
415 	SND_SOC_DAPM_MICBIAS("DMIC12Bias", SN95031_DMICMUX, 3, 0),
416 	SND_SOC_DAPM_MICBIAS("DMIC34Bias", SN95031_DMICMUX, 4, 0),
417 	SND_SOC_DAPM_MICBIAS("DMIC56Bias", SN95031_DMICMUX, 5, 0),
418 
419 	SND_SOC_DAPM_SUPPLY("DMIC12supply", SN95031_DMICLK, 0, 0,
420 				sn95031_dmic12_event,
421 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
422 	SND_SOC_DAPM_SUPPLY("DMIC34supply", SN95031_DMICLK, 1, 0,
423 				sn95031_dmic34_event,
424 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
425 	SND_SOC_DAPM_SUPPLY("DMIC56supply", SN95031_DMICLK, 2, 0,
426 				sn95031_dmic56_event,
427 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
428 
429 	SND_SOC_DAPM_AIF_OUT("PCM_Out", "Capture", 0,
430 			SND_SOC_NOPM, 0, 0),
431 
432 	SND_SOC_DAPM_SUPPLY("Headset Rail", SND_SOC_NOPM, 0, 0,
433 			sn95031_vhs_event,
434 			SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
435 	SND_SOC_DAPM_SUPPLY("Speaker Rail", SND_SOC_NOPM, 0, 0,
436 			sn95031_vihf_event,
437 			SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
438 
439 	/* playback path driver enables */
440 	SND_SOC_DAPM_PGA("Headset Left Playback",
441 			SN95031_DRIVEREN, 0, 0, NULL, 0),
442 	SND_SOC_DAPM_PGA("Headset Right Playback",
443 			SN95031_DRIVEREN, 1, 0, NULL, 0),
444 	SND_SOC_DAPM_PGA("Speaker Left Playback",
445 			SN95031_DRIVEREN, 2, 0, NULL, 0),
446 	SND_SOC_DAPM_PGA("Speaker Right Playback",
447 			SN95031_DRIVEREN, 3, 0, NULL, 0),
448 	SND_SOC_DAPM_PGA("Vibra1 Playback",
449 			SN95031_DRIVEREN, 4, 0, NULL, 0),
450 	SND_SOC_DAPM_PGA("Vibra2 Playback",
451 			SN95031_DRIVEREN, 5, 0, NULL, 0),
452 	SND_SOC_DAPM_PGA("Earpiece Playback",
453 			SN95031_DRIVEREN, 6, 0, NULL, 0),
454 	SND_SOC_DAPM_PGA("Lineout Left Playback",
455 			SN95031_LOCTL, 0, 0, NULL, 0),
456 	SND_SOC_DAPM_PGA("Lineout Right Playback",
457 			SN95031_LOCTL, 4, 0, NULL, 0),
458 
459 	/* playback path filter enable */
460 	SND_SOC_DAPM_PGA("Headset Left Filter",
461 			SN95031_HSEPRXCTRL, 4, 0, NULL, 0),
462 	SND_SOC_DAPM_PGA("Headset Right Filter",
463 			SN95031_HSEPRXCTRL, 5, 0,  NULL, 0),
464 	SND_SOC_DAPM_PGA("Speaker Left Filter",
465 			SN95031_IHFRXCTRL, 0, 0,  NULL, 0),
466 	SND_SOC_DAPM_PGA("Speaker Right Filter",
467 			SN95031_IHFRXCTRL, 1, 0,  NULL, 0),
468 
469 	/* DACs */
470 	SND_SOC_DAPM_DAC("HSDAC Left", "Headset",
471 			SN95031_DACCONFIG, 0, 0),
472 	SND_SOC_DAPM_DAC("HSDAC Right", "Headset",
473 			SN95031_DACCONFIG, 1, 0),
474 	SND_SOC_DAPM_DAC("IHFDAC Left", "Speaker",
475 			SN95031_DACCONFIG, 2, 0),
476 	SND_SOC_DAPM_DAC("IHFDAC Right", "Speaker",
477 			SN95031_DACCONFIG, 3, 0),
478 	SND_SOC_DAPM_DAC("Vibra1 DAC", "Vibra1",
479 			SN95031_VIB1C5, 1, 0),
480 	SND_SOC_DAPM_DAC("Vibra2 DAC", "Vibra2",
481 			SN95031_VIB2C5, 1, 0),
482 
483 	/* capture widgets */
484 	SND_SOC_DAPM_PGA("LineIn Enable Left", SN95031_MICAMP1,
485 				7, 0, NULL, 0),
486 	SND_SOC_DAPM_PGA("LineIn Enable Right", SN95031_MICAMP2,
487 				7, 0, NULL, 0),
488 
489 	SND_SOC_DAPM_PGA("MIC1 Enable", SN95031_MICAMP1, 0, 0, NULL, 0),
490 	SND_SOC_DAPM_PGA("MIC2 Enable", SN95031_MICAMP2, 0, 0, NULL, 0),
491 	SND_SOC_DAPM_PGA("TX1 Enable", SN95031_AUDIOTXEN, 2, 0, NULL, 0),
492 	SND_SOC_DAPM_PGA("TX2 Enable", SN95031_AUDIOTXEN, 3, 0, NULL, 0),
493 	SND_SOC_DAPM_PGA("TX3 Enable", SN95031_AUDIOTXEN, 4, 0, NULL, 0),
494 	SND_SOC_DAPM_PGA("TX4 Enable", SN95031_AUDIOTXEN, 5, 0, NULL, 0),
495 
496 	/* ADC have null stream as they will be turned ON by TX path */
497 	SND_SOC_DAPM_ADC("ADC Left", NULL,
498 			SN95031_ADCCONFIG, 0, 0),
499 	SND_SOC_DAPM_ADC("ADC Right", NULL,
500 			SN95031_ADCCONFIG, 2, 0),
501 
502 	SND_SOC_DAPM_MUX("Mic_InputL Capture Route",
503 			SND_SOC_NOPM, 0, 0, &sn95031_micl_mux_control),
504 	SND_SOC_DAPM_MUX("Mic_InputR Capture Route",
505 			SND_SOC_NOPM, 0, 0, &sn95031_micr_mux_control),
506 
507 	SND_SOC_DAPM_MUX("Txpath1 Capture Route",
508 			SND_SOC_NOPM, 0, 0, &sn95031_input1_mux_control),
509 	SND_SOC_DAPM_MUX("Txpath2 Capture Route",
510 			SND_SOC_NOPM, 0, 0, &sn95031_input2_mux_control),
511 	SND_SOC_DAPM_MUX("Txpath3 Capture Route",
512 			SND_SOC_NOPM, 0, 0, &sn95031_input3_mux_control),
513 	SND_SOC_DAPM_MUX("Txpath4 Capture Route",
514 			SND_SOC_NOPM, 0, 0, &sn95031_input4_mux_control),
515 
516 };
517 
518 static const struct snd_soc_dapm_route sn95031_audio_map[] = {
519 	/* headset and earpiece map */
520 	{ "HPOUTL", NULL, "Headset Rail"},
521 	{ "HPOUTR", NULL, "Headset Rail"},
522 	{ "HPOUTL", NULL, "Headset Left Playback" },
523 	{ "HPOUTR", NULL, "Headset Right Playback" },
524 	{ "EPOUT", NULL, "Earpiece Playback" },
525 	{ "Headset Left Playback", NULL, "Headset Left Filter"},
526 	{ "Headset Right Playback", NULL, "Headset Right Filter"},
527 	{ "Earpiece Playback", NULL, "Headset Left Filter"},
528 	{ "Headset Left Filter", NULL, "HSDAC Left"},
529 	{ "Headset Right Filter", NULL, "HSDAC Right"},
530 
531 	/* speaker map */
532 	{ "IHFOUTL", NULL, "Speaker Rail"},
533 	{ "IHFOUTR", NULL, "Speaker Rail"},
534 	{ "IHFOUTL", NULL, "Speaker Left Playback"},
535 	{ "IHFOUTR", NULL, "Speaker Right Playback"},
536 	{ "Speaker Left Playback", NULL, "Speaker Left Filter"},
537 	{ "Speaker Right Playback", NULL, "Speaker Right Filter"},
538 	{ "Speaker Left Filter", NULL, "IHFDAC Left"},
539 	{ "Speaker Right Filter", NULL, "IHFDAC Right"},
540 
541 	/* vibra map */
542 	{ "VIB1OUT", NULL, "Vibra1 Playback"},
543 	{ "Vibra1 Playback", NULL, "Vibra1 DAC"},
544 
545 	{ "VIB2OUT", NULL, "Vibra2 Playback"},
546 	{ "Vibra2 Playback", NULL, "Vibra2 DAC"},
547 
548 	/* lineout */
549 	{ "LINEOUTL", NULL, "Lineout Left Playback"},
550 	{ "LINEOUTR", NULL, "Lineout Right Playback"},
551 	{ "Lineout Left Playback", NULL, "Headset Left Filter"},
552 	{ "Lineout Left Playback", NULL, "Speaker Left Filter"},
553 	{ "Lineout Left Playback", NULL, "Vibra1 DAC"},
554 	{ "Lineout Right Playback", NULL, "Headset Right Filter"},
555 	{ "Lineout Right Playback", NULL, "Speaker Right Filter"},
556 	{ "Lineout Right Playback", NULL, "Vibra2 DAC"},
557 
558 	/* Headset (AMIC1) mic */
559 	{ "AMIC1Bias", NULL, "AMIC1"},
560 	{ "MIC1 Enable", NULL, "AMIC1Bias"},
561 	{ "Mic_InputL Capture Route", "AMIC", "MIC1 Enable"},
562 
563 	/* AMIC2 */
564 	{ "AMIC2Bias", NULL, "AMIC2"},
565 	{ "MIC2 Enable", NULL, "AMIC2Bias"},
566 	{ "Mic_InputR Capture Route", "AMIC", "MIC2 Enable"},
567 
568 
569 	/* Linein */
570 	{ "LineIn Enable Left", NULL, "LINEINL"},
571 	{ "LineIn Enable Right", NULL, "LINEINR"},
572 	{ "Mic_InputL Capture Route", "LineIn", "LineIn Enable Left"},
573 	{ "Mic_InputR Capture Route", "LineIn", "LineIn Enable Right"},
574 
575 	/* ADC connection */
576 	{ "ADC Left", NULL, "Mic_InputL Capture Route"},
577 	{ "ADC Right", NULL, "Mic_InputR Capture Route"},
578 
579 	/*DMIC connections */
580 	{ "DMIC1", NULL, "DMIC12supply"},
581 	{ "DMIC2", NULL, "DMIC12supply"},
582 	{ "DMIC3", NULL, "DMIC34supply"},
583 	{ "DMIC4", NULL, "DMIC34supply"},
584 	{ "DMIC5", NULL, "DMIC56supply"},
585 	{ "DMIC6", NULL, "DMIC56supply"},
586 
587 	{ "DMIC12Bias", NULL, "DMIC1"},
588 	{ "DMIC12Bias", NULL, "DMIC2"},
589 	{ "DMIC34Bias", NULL, "DMIC3"},
590 	{ "DMIC34Bias", NULL, "DMIC4"},
591 	{ "DMIC56Bias", NULL, "DMIC5"},
592 	{ "DMIC56Bias", NULL, "DMIC6"},
593 
594 	/*TX path inputs*/
595 	{ "Txpath1 Capture Route", "ADC Left", "ADC Left"},
596 	{ "Txpath2 Capture Route", "ADC Left", "ADC Left"},
597 	{ "Txpath3 Capture Route", "ADC Left", "ADC Left"},
598 	{ "Txpath4 Capture Route", "ADC Left", "ADC Left"},
599 	{ "Txpath1 Capture Route", "ADC Right", "ADC Right"},
600 	{ "Txpath2 Capture Route", "ADC Right", "ADC Right"},
601 	{ "Txpath3 Capture Route", "ADC Right", "ADC Right"},
602 	{ "Txpath4 Capture Route", "ADC Right", "ADC Right"},
603 	{ "Txpath1 Capture Route", "DMIC1", "DMIC1"},
604 	{ "Txpath2 Capture Route", "DMIC1", "DMIC1"},
605 	{ "Txpath3 Capture Route", "DMIC1", "DMIC1"},
606 	{ "Txpath4 Capture Route", "DMIC1", "DMIC1"},
607 	{ "Txpath1 Capture Route", "DMIC2", "DMIC2"},
608 	{ "Txpath2 Capture Route", "DMIC2", "DMIC2"},
609 	{ "Txpath3 Capture Route", "DMIC2", "DMIC2"},
610 	{ "Txpath4 Capture Route", "DMIC2", "DMIC2"},
611 	{ "Txpath1 Capture Route", "DMIC3", "DMIC3"},
612 	{ "Txpath2 Capture Route", "DMIC3", "DMIC3"},
613 	{ "Txpath3 Capture Route", "DMIC3", "DMIC3"},
614 	{ "Txpath4 Capture Route", "DMIC3", "DMIC3"},
615 	{ "Txpath1 Capture Route", "DMIC4", "DMIC4"},
616 	{ "Txpath2 Capture Route", "DMIC4", "DMIC4"},
617 	{ "Txpath3 Capture Route", "DMIC4", "DMIC4"},
618 	{ "Txpath4 Capture Route", "DMIC4", "DMIC4"},
619 	{ "Txpath1 Capture Route", "DMIC5", "DMIC5"},
620 	{ "Txpath2 Capture Route", "DMIC5", "DMIC5"},
621 	{ "Txpath3 Capture Route", "DMIC5", "DMIC5"},
622 	{ "Txpath4 Capture Route", "DMIC5", "DMIC5"},
623 	{ "Txpath1 Capture Route", "DMIC6", "DMIC6"},
624 	{ "Txpath2 Capture Route", "DMIC6", "DMIC6"},
625 	{ "Txpath3 Capture Route", "DMIC6", "DMIC6"},
626 	{ "Txpath4 Capture Route", "DMIC6", "DMIC6"},
627 
628 	/* tx path */
629 	{ "TX1 Enable", NULL, "Txpath1 Capture Route"},
630 	{ "TX2 Enable", NULL, "Txpath2 Capture Route"},
631 	{ "TX3 Enable", NULL, "Txpath3 Capture Route"},
632 	{ "TX4 Enable", NULL, "Txpath4 Capture Route"},
633 	{ "PCM_Out", NULL, "TX1 Enable"},
634 	{ "PCM_Out", NULL, "TX2 Enable"},
635 	{ "PCM_Out", NULL, "TX3 Enable"},
636 	{ "PCM_Out", NULL, "TX4 Enable"},
637 
638 };
639 
640 /* speaker and headset mutes, for audio pops and clicks */
sn95031_pcm_hs_mute(struct snd_soc_dai * dai,int mute)641 static int sn95031_pcm_hs_mute(struct snd_soc_dai *dai, int mute)
642 {
643 	snd_soc_update_bits(dai->codec,
644 			SN95031_HSLVOLCTRL, BIT(7), (!mute << 7));
645 	snd_soc_update_bits(dai->codec,
646 			SN95031_HSRVOLCTRL, BIT(7), (!mute << 7));
647 	return 0;
648 }
649 
sn95031_pcm_spkr_mute(struct snd_soc_dai * dai,int mute)650 static int sn95031_pcm_spkr_mute(struct snd_soc_dai *dai, int mute)
651 {
652 	snd_soc_update_bits(dai->codec,
653 			SN95031_IHFLVOLCTRL, BIT(7), (!mute << 7));
654 	snd_soc_update_bits(dai->codec,
655 			SN95031_IHFRVOLCTRL, BIT(7), (!mute << 7));
656 	return 0;
657 }
658 
sn95031_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)659 static int sn95031_pcm_hw_params(struct snd_pcm_substream *substream,
660 		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
661 {
662 	unsigned int format, rate;
663 
664 	switch (params_width(params)) {
665 	case 16:
666 		format = BIT(4)|BIT(5);
667 		break;
668 
669 	case 24:
670 		format = 0;
671 		break;
672 	default:
673 		return -EINVAL;
674 	}
675 	snd_soc_update_bits(dai->codec, SN95031_PCM2C2,
676 			BIT(4)|BIT(5), format);
677 
678 	switch (params_rate(params)) {
679 	case 48000:
680 		pr_debug("RATE_48000\n");
681 		rate = 0;
682 		break;
683 
684 	case 44100:
685 		pr_debug("RATE_44100\n");
686 		rate = BIT(7);
687 		break;
688 
689 	default:
690 		pr_err("ERR rate %d\n", params_rate(params));
691 		return -EINVAL;
692 	}
693 	snd_soc_update_bits(dai->codec, SN95031_PCM1C1, BIT(7), rate);
694 
695 	return 0;
696 }
697 
698 /* Codec DAI section */
699 static const struct snd_soc_dai_ops sn95031_headset_dai_ops = {
700 	.digital_mute	= sn95031_pcm_hs_mute,
701 	.hw_params	= sn95031_pcm_hw_params,
702 };
703 
704 static const struct snd_soc_dai_ops sn95031_speaker_dai_ops = {
705 	.digital_mute	= sn95031_pcm_spkr_mute,
706 	.hw_params	= sn95031_pcm_hw_params,
707 };
708 
709 static const struct snd_soc_dai_ops sn95031_vib1_dai_ops = {
710 	.hw_params	= sn95031_pcm_hw_params,
711 };
712 
713 static const struct snd_soc_dai_ops sn95031_vib2_dai_ops = {
714 	.hw_params	= sn95031_pcm_hw_params,
715 };
716 
717 static struct snd_soc_dai_driver sn95031_dais[] = {
718 {
719 	.name = "SN95031 Headset",
720 	.playback = {
721 		.stream_name = "Headset",
722 		.channels_min = 2,
723 		.channels_max = 2,
724 		.rates = SN95031_RATES,
725 		.formats = SN95031_FORMATS,
726 	},
727 	.capture = {
728 		.stream_name = "Capture",
729 		.channels_min = 1,
730 		.channels_max = 5,
731 		.rates = SN95031_RATES,
732 		.formats = SN95031_FORMATS,
733 	},
734 	.ops = &sn95031_headset_dai_ops,
735 },
736 {	.name = "SN95031 Speaker",
737 	.playback = {
738 		.stream_name = "Speaker",
739 		.channels_min = 2,
740 		.channels_max = 2,
741 		.rates = SN95031_RATES,
742 		.formats = SN95031_FORMATS,
743 	},
744 	.ops = &sn95031_speaker_dai_ops,
745 },
746 {	.name = "SN95031 Vibra1",
747 	.playback = {
748 		.stream_name = "Vibra1",
749 		.channels_min = 1,
750 		.channels_max = 1,
751 		.rates = SN95031_RATES,
752 		.formats = SN95031_FORMATS,
753 	},
754 	.ops = &sn95031_vib1_dai_ops,
755 },
756 {	.name = "SN95031 Vibra2",
757 	.playback = {
758 		.stream_name = "Vibra2",
759 		.channels_min = 1,
760 		.channels_max = 1,
761 		.rates = SN95031_RATES,
762 		.formats = SN95031_FORMATS,
763 	},
764 	.ops = &sn95031_vib2_dai_ops,
765 },
766 };
767 
sn95031_disable_jack_btn(struct snd_soc_codec * codec)768 static inline void sn95031_disable_jack_btn(struct snd_soc_codec *codec)
769 {
770 	snd_soc_write(codec, SN95031_BTNCTRL2, 0x00);
771 }
772 
sn95031_enable_jack_btn(struct snd_soc_codec * codec)773 static inline void sn95031_enable_jack_btn(struct snd_soc_codec *codec)
774 {
775 	snd_soc_write(codec, SN95031_BTNCTRL1, 0x77);
776 	snd_soc_write(codec, SN95031_BTNCTRL2, 0x01);
777 }
778 
sn95031_get_headset_state(struct snd_soc_jack * mfld_jack)779 static int sn95031_get_headset_state(struct snd_soc_jack *mfld_jack)
780 {
781 	int micbias = sn95031_get_mic_bias(mfld_jack->codec);
782 
783 	int jack_type = snd_soc_jack_get_type(mfld_jack, micbias);
784 
785 	pr_debug("jack type detected = %d\n", jack_type);
786 	if (jack_type == SND_JACK_HEADSET)
787 		sn95031_enable_jack_btn(mfld_jack->codec);
788 	return jack_type;
789 }
790 
sn95031_jack_detection(struct mfld_jack_data * jack_data)791 void sn95031_jack_detection(struct mfld_jack_data *jack_data)
792 {
793 	unsigned int status;
794 	unsigned int mask = SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_HEADSET;
795 
796 	pr_debug("interrupt id read in sram = 0x%x\n", jack_data->intr_id);
797 	if (jack_data->intr_id & 0x1) {
798 		pr_debug("short_push detected\n");
799 		status = SND_JACK_HEADSET | SND_JACK_BTN_0;
800 	} else if (jack_data->intr_id & 0x2) {
801 		pr_debug("long_push detected\n");
802 		status = SND_JACK_HEADSET | SND_JACK_BTN_1;
803 	} else if (jack_data->intr_id & 0x4) {
804 		pr_debug("headset or headphones inserted\n");
805 		status = sn95031_get_headset_state(jack_data->mfld_jack);
806 	} else if (jack_data->intr_id & 0x8) {
807 		pr_debug("headset or headphones removed\n");
808 		status = 0;
809 		sn95031_disable_jack_btn(jack_data->mfld_jack->codec);
810 	} else {
811 		pr_err("unidentified interrupt\n");
812 		return;
813 	}
814 
815 	snd_soc_jack_report(jack_data->mfld_jack, status, mask);
816 	/*button pressed and released so we send explicit button release */
817 	if ((status & SND_JACK_BTN_0) | (status & SND_JACK_BTN_1))
818 		snd_soc_jack_report(jack_data->mfld_jack,
819 				SND_JACK_HEADSET, mask);
820 }
821 EXPORT_SYMBOL_GPL(sn95031_jack_detection);
822 
823 /* codec registration */
sn95031_codec_probe(struct snd_soc_codec * codec)824 static int sn95031_codec_probe(struct snd_soc_codec *codec)
825 {
826 	pr_debug("codec_probe called\n");
827 
828 	/* PCM interface config
829 	 * This sets the pcm rx slot conguration to max 6 slots
830 	 * for max 4 dais (2 stereo and 2 mono)
831 	 */
832 	snd_soc_write(codec, SN95031_PCM2RXSLOT01, 0x10);
833 	snd_soc_write(codec, SN95031_PCM2RXSLOT23, 0x32);
834 	snd_soc_write(codec, SN95031_PCM2RXSLOT45, 0x54);
835 	snd_soc_write(codec, SN95031_PCM2TXSLOT01, 0x10);
836 	snd_soc_write(codec, SN95031_PCM2TXSLOT23, 0x32);
837 	/* pcm port setting
838 	 * This sets the pcm port to slave and clock at 19.2Mhz which
839 	 * can support 6slots, sampling rate set per stream in hw-params
840 	 */
841 	snd_soc_write(codec, SN95031_PCM1C1, 0x00);
842 	snd_soc_write(codec, SN95031_PCM2C1, 0x01);
843 	snd_soc_write(codec, SN95031_PCM2C2, 0x0A);
844 	snd_soc_write(codec, SN95031_HSMIXER, BIT(0)|BIT(4));
845 	/* vendor vibra workround, the vibras are muted by
846 	 * custom register so unmute them
847 	 */
848 	snd_soc_write(codec, SN95031_SSR5, 0x80);
849 	snd_soc_write(codec, SN95031_SSR6, 0x80);
850 	snd_soc_write(codec, SN95031_VIB1C5, 0x00);
851 	snd_soc_write(codec, SN95031_VIB2C5, 0x00);
852 	/* configure vibras for pcm port */
853 	snd_soc_write(codec, SN95031_VIB1C3, 0x00);
854 	snd_soc_write(codec, SN95031_VIB2C3, 0x00);
855 
856 	/* soft mute ramp time */
857 	snd_soc_write(codec, SN95031_SOFTMUTE, 0x3);
858 	/* fix the initial volume at 1dB,
859 	 * default in +9dB,
860 	 * 1dB give optimal swing on DAC, amps
861 	 */
862 	snd_soc_write(codec, SN95031_HSLVOLCTRL, 0x08);
863 	snd_soc_write(codec, SN95031_HSRVOLCTRL, 0x08);
864 	snd_soc_write(codec, SN95031_IHFLVOLCTRL, 0x08);
865 	snd_soc_write(codec, SN95031_IHFRVOLCTRL, 0x08);
866 	/* dac mode and lineout workaround */
867 	snd_soc_write(codec, SN95031_SSR2, 0x10);
868 	snd_soc_write(codec, SN95031_SSR3, 0x40);
869 
870 	snd_soc_add_codec_controls(codec, sn95031_snd_controls,
871 			     ARRAY_SIZE(sn95031_snd_controls));
872 
873 	return 0;
874 }
875 
sn95031_codec_remove(struct snd_soc_codec * codec)876 static int sn95031_codec_remove(struct snd_soc_codec *codec)
877 {
878 	pr_debug("codec_remove called\n");
879 	sn95031_set_vaud_bias(codec, SND_SOC_BIAS_OFF);
880 
881 	return 0;
882 }
883 
884 static struct snd_soc_codec_driver sn95031_codec = {
885 	.probe		= sn95031_codec_probe,
886 	.remove		= sn95031_codec_remove,
887 	.set_bias_level	= sn95031_set_vaud_bias,
888 	.idle_bias_off	= true,
889 	.dapm_widgets	= sn95031_dapm_widgets,
890 	.num_dapm_widgets	= ARRAY_SIZE(sn95031_dapm_widgets),
891 	.dapm_routes	= sn95031_audio_map,
892 	.num_dapm_routes	= ARRAY_SIZE(sn95031_audio_map),
893 };
894 
sn95031_device_probe(struct platform_device * pdev)895 static int sn95031_device_probe(struct platform_device *pdev)
896 {
897 	struct regmap *regmap;
898 
899 	pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev));
900 
901 	regmap = devm_regmap_init(&pdev->dev, NULL, NULL, &sn95031_regmap);
902 	if (IS_ERR(regmap))
903 		return PTR_ERR(regmap);
904 
905 	return snd_soc_register_codec(&pdev->dev, &sn95031_codec,
906 			sn95031_dais, ARRAY_SIZE(sn95031_dais));
907 }
908 
sn95031_device_remove(struct platform_device * pdev)909 static int sn95031_device_remove(struct platform_device *pdev)
910 {
911 	pr_debug("codec device remove called\n");
912 	snd_soc_unregister_codec(&pdev->dev);
913 	return 0;
914 }
915 
916 static struct platform_driver sn95031_codec_driver = {
917 	.driver		= {
918 		.name		= "sn95031",
919 		.owner		= THIS_MODULE,
920 	},
921 	.probe		= sn95031_device_probe,
922 	.remove		= sn95031_device_remove,
923 };
924 
925 module_platform_driver(sn95031_codec_driver);
926 
927 MODULE_DESCRIPTION("ASoC TI SN95031 codec driver");
928 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
929 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
930 MODULE_LICENSE("GPL v2");
931 MODULE_ALIAS("platform:sn95031");
932