/arch/powerpc/include/asm/ |
D | disassemble.h | 25 static inline unsigned int get_op(u32 inst) in get_op() 30 static inline unsigned int get_xop(u32 inst) in get_xop() 35 static inline unsigned int get_sprn(u32 inst) in get_sprn() 40 static inline unsigned int get_dcrn(u32 inst) in get_dcrn() 45 static inline unsigned int get_rt(u32 inst) in get_rt() 50 static inline unsigned int get_rs(u32 inst) in get_rs() 55 static inline unsigned int get_ra(u32 inst) in get_ra() 60 static inline unsigned int get_rb(u32 inst) in get_rb() 65 static inline unsigned int get_rc(u32 inst) in get_rc() 70 static inline unsigned int get_ws(u32 inst) in get_ws() [all …]
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/arch/arm/vfp/ |
D | vfpinstr.h | 13 #define INST_CPRTDO(inst) (((inst) & 0x0f000000) == 0x0e000000) argument 14 #define INST_CPRT(inst) ((inst) & (1 << 4)) argument 15 #define INST_CPRT_L(inst) ((inst) & (1 << 20)) argument 16 #define INST_CPRT_Rd(inst) (((inst) & (15 << 12)) >> 12) argument 17 #define INST_CPRT_OP(inst) (((inst) >> 21) & 7) argument 18 #define INST_CPNUM(inst) ((inst) & 0xf00) argument 33 #define FOP_TO_IDX(inst) ((inst & 0x00b00000) >> 20 | (inst & (1 << 6)) >> 4) argument 52 #define FEXT_TO_IDX(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) argument 54 #define vfp_get_sd(inst) ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22) argument 55 #define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18) argument [all …]
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/arch/arm/mach-omap2/ |
D | cminst44xx.c | 73 static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) in _clkctrl_idlest() 91 static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) in _is_module_ready() 104 u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) in omap4_cminst_read_inst_reg() 113 void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) in omap4_cminst_write_inst_reg() 122 u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, in omap4_cminst_rmw_inst_reg_bits() 135 u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx) in omap4_cminst_set_inst_reg_bits() 140 u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx) in omap4_cminst_clear_inst_reg_bits() 145 u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask) in omap4_cminst_read_inst_reg_bits() 170 static void _clktrctrl_write(u8 c, u8 part, s16 inst, u16 cdoffs) in _clktrctrl_write() 189 bool omap4_cminst_is_clkdm_in_hwsup(u8 part, s16 inst, u16 cdoffs) in omap4_cminst_is_clkdm_in_hwsup() [all …]
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D | cm44xx.c | 31 u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg) in omap4_cm1_read_inst_reg() 37 void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_cm1_write_inst_reg() 43 u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg) in omap4_cm2_read_inst_reg() 49 void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_cm2_write_inst_reg()
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D | prminst44xx.c | 37 u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) in omap4_prminst_read_inst_reg() 47 void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) in omap4_prminst_write_inst_reg() 56 u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, in omap4_prminst_rmw_inst_reg_bits() 85 int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, in omap4_prminst_is_hardreset_asserted() 109 int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, in omap4_prminst_assert_hardreset() 134 int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, in omap4_prminst_deassert_hardreset()
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D | prcm_mpu44xx.c | 25 u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg) in omap4_prcm_mpu_read_inst_reg() 30 void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_prcm_mpu_write_inst_reg() 35 u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) in omap4_prcm_mpu_rmw_inst_reg_bits()
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D | cminst44xx.h | 33 static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, in omap4_cminst_wait_module_idle() 39 static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, in omap4_cminst_module_enable() 44 static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, in omap4_cminst_module_disable()
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/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
D | iop_version_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument 21 #define REG_WR( scope, inst, reg, val ) \ argument 27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 41 #define REG_RD_INT( scope, inst, reg ) \ argument 46 #define REG_WR_INT( scope, inst, reg, val ) \ argument 51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 72 #define REG_ADDR( scope, inst, reg ) \ argument 77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | iop_sap_in_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument 21 #define REG_WR( scope, inst, reg, val ) \ argument 27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 41 #define REG_RD_INT( scope, inst, reg ) \ argument 46 #define REG_WR_INT( scope, inst, reg, val ) \ argument 51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 72 #define REG_ADDR( scope, inst, reg ) \ argument 77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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/arch/cris/include/arch-v32/arch/hwregs/iop/ |
D | iop_version_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | iop_scrc_out_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | iop_scrc_in_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | iop_fifo_out_extra_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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/arch/cris/include/arch-v32/arch/hwregs/ |
D | irq_nmi_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | strcop_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | dma.h | 75 #define DMA_ENABLE( inst ) \ argument 81 #define DMA_RESET( inst ) \ argument 87 #define DMA_STOP( inst ) \ argument 93 #define DMA_CONTINUE( inst ) \ argument 99 #define DMA_WR_CMD( inst, cmd_par ) \ argument 107 #define DMA_START_GROUP( inst, group_descr ) \ argument 115 #define DMA_START_CONTEXT( inst, ctx_descr ) \ argument 122 #define DMA_CONTINUE_DATA( inst ) \ argument
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D | config_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | rt_trace_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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/arch/powerpc/kernel/ |
D | kvm.c | 79 static inline void kvm_patch_ins(u32 *inst, u32 new_inst) in kvm_patch_ins() 85 static void kvm_patch_ins_ll(u32 *inst, long addr, u32 rt) in kvm_patch_ins_ll() 94 static void kvm_patch_ins_ld(u32 *inst, long addr, u32 rt) in kvm_patch_ins_ld() 103 static void kvm_patch_ins_lwz(u32 *inst, long addr, u32 rt) in kvm_patch_ins_lwz() 108 static void kvm_patch_ins_std(u32 *inst, long addr, u32 rt) in kvm_patch_ins_std() 117 static void kvm_patch_ins_stw(u32 *inst, long addr, u32 rt) in kvm_patch_ins_stw() 122 static void kvm_patch_ins_nop(u32 *inst) in kvm_patch_ins_nop() 127 static void kvm_patch_ins_b(u32 *inst, int addr) in kvm_patch_ins_b() 163 static void kvm_patch_ins_mtmsrd(u32 *inst, u32 rt) in kvm_patch_ins_mtmsrd() 216 static void kvm_patch_ins_mtmsr(u32 *inst, u32 rt) in kvm_patch_ins_mtmsr() [all …]
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/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
D | strmux_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | config_defs.h | 18 #define REG_RD( scope, inst, reg ) \ argument 24 #define REG_WR( scope, inst, reg, val ) \ argument 30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 44 #define REG_RD_INT( scope, inst, reg ) \ argument 49 #define REG_WR_INT( scope, inst, reg, val ) \ argument 54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 75 #define REG_ADDR( scope, inst, reg ) \ argument 80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
D | strmux_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument 21 #define REG_WR( scope, inst, reg, val ) \ argument 27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 41 #define REG_RD_INT( scope, inst, reg ) \ argument 46 #define REG_WR_INT( scope, inst, reg, val ) \ argument 51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 72 #define REG_ADDR( scope, inst, reg ) \ argument 77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | l2cache_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument 21 #define REG_WR( scope, inst, reg, val ) \ argument 27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 41 #define REG_RD_INT( scope, inst, reg ) \ argument 46 #define REG_WR_INT( scope, inst, reg, val ) \ argument 51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 72 #define REG_ADDR( scope, inst, reg ) \ argument 77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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D | clkgen_defs.h | 15 #define REG_RD( scope, inst, reg ) \ argument 21 #define REG_WR( scope, inst, reg, val ) \ argument 27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument 41 #define REG_RD_INT( scope, inst, reg ) \ argument 46 #define REG_WR_INT( scope, inst, reg, val ) \ argument 51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument 57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument 72 #define REG_ADDR( scope, inst, reg ) \ argument 77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
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/arch/ia64/kvm/ |
D | vcpu.c | 1057 void kvm_thash(struct kvm_vcpu *vcpu, INST64 inst) in kvm_thash() 1066 void kvm_ttag(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ttag() 1146 int kvm_tpa(struct kvm_vcpu *vcpu, INST64 inst) in kvm_tpa() 1159 void kvm_tak(struct kvm_vcpu *vcpu, INST64 inst) in kvm_tak() 1277 void kvm_ptc_e(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_e() 1285 void kvm_ptc_g(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_g() 1294 void kvm_ptc_ga(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_ga() 1303 void kvm_ptc_l(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_l() 1312 void kvm_ptr_d(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptr_d() 1321 void kvm_ptr_i(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptr_i() [all …]
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