| /arch/mips/kernel/ |
| D | 8250-platform.c | 11 #define PORT(base, int) \ macro
22 PORT(0x3F8, 4),
23 PORT(0x2F8, 3),
24 PORT(0x3E8, 4),
25 PORT(0x2E8, 3),
|
| /arch/mips/boot/compressed/ |
| D | uart-16550.c | 13 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) macro
18 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset)) macro
21 #ifndef PORT
27 return *((char *)PORT(offset)); in serial_in()
32 *((char *)PORT(offset)) = value; in serial_out()
|
| /arch/mips/alchemy/common/ |
| D | platform.c | 48 #define PORT(_base, _irq) \ macro
62 PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
63 PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
64 PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
65 PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
68 PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
69 PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
72 PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
73 PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
74 PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
[all …]
|
| /arch/blackfin/mach-bf527/ |
| D | Kconfig | 17 Select PORT used for SPORT0. See Hardware Reference Manual
20 bool "PORT F"
22 PORT F
25 bool "PORT G"
27 PORT G
38 bool "PORT PG10"
40 PORT PG10
43 bool "PORT PG14"
45 PORT PG14
52 Select PORT used for UART1. See Hardware Reference Manual
[all …]
|
| /arch/mips/mti-malta/ |
| D | malta-console.c | 26 #define PORT(offset) (0x3f8 + (offset)) macro
31 return inb(PORT(offset)); in serial_in()
36 outb(value, PORT(offset)); in serial_out()
|
| /arch/mips/loongson/common/ |
| D | serial.c | 22 #define PORT(int) \ macro
43 [MACH_LEMOTE_FL2E] {PORT(4), {} },
44 [MACH_LEMOTE_FL2F] {PORT(3), {} },
49 [MACH_LEMOTE_LL2F] {PORT(3), {} },
|
| D | early_printk.c | 16 #define PORT(base, offset) (u8 *)(base + offset) macro
20 return readb(PORT(base, offset)); in serial_in()
25 writeb(value, PORT(base, offset)); in serial_out()
|
| /arch/mips/sni/ |
| D | pcit.c | 22 #define PORT(_base,_irq) \ macro
32 PORT(0x3f8, 0),
33 PORT(0x2f8, 3),
46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3),
|
| D | a20r.c | 20 #define PORT(_base,_irq) \ macro
30 PORT(0x3f8, 4),
31 PORT(0x2f8, 3),
|
| D | pcimt.c | 70 #define PORT(_base,_irq) \ macro
80 PORT(0x3f8, 4),
81 PORT(0x2f8, 3),
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| /arch/mips/netlogic/xlp/ |
| D | platform.c | 64 #define PORT(_irq) \ macro
78 PORT(PIC_UART_0_IRQ),
79 PORT(PIC_UART_1_IRQ),
|
| /arch/mips/netlogic/xlr/ |
| D | platform.c | 57 #define PORT(_irq) \ macro
71 PORT(PIC_UART_0_IRQ),
72 PORT(PIC_UART_1_IRQ),
|
| /arch/mips/ar7/ |
| D | prom.c | 253 #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) macro
256 return readl((void *)PORT(offset)); in serial_in()
261 writel(value, (void *)PORT(offset)); in serial_out()
|
| /arch/blackfin/mach-bf518/ |
| D | Kconfig | 95 menu "PORT F"
111 menu "PORT G"
131 menu "PORT H"
|
| /arch/avr32/mach-at32ap/include/mach/ |
| D | at32ap700x.h | 143 #define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN) argument
|
| /arch/arm/mach-msm/ |
| D | board-trout-panel.c | 69 #define PORT (LCD_CONTROL_BLOCK_BASE|0x0C) macro
|
| /arch/blackfin/kernel/ |
| D | debug-mmrs.c | 358 _buf = REGS_STR_PFX_C(buf, PORT, num); in bfin_debug_mmrs_port()
388 #define PORT(base, num) bfin_debug_mmrs_port(parent, base, num) macro
1777 PORT(PORTFIO, 'F'); in bfin_debug_mmrs_init()
1780 PORT(PORTGIO, 'G'); in bfin_debug_mmrs_init()
1783 PORT(PORTHIO, 'H'); in bfin_debug_mmrs_init()
1870 PORT(base, num); in bfin_debug_mmrs_init()
|