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/arch/x86/include/asm/
Defi.h11 #define efi_call_phys1(f, a1) efi_call_phys(f, a1) argument
12 #define efi_call_phys2(f, a1, a2) efi_call_phys(f, a1, a2) argument
13 #define efi_call_phys3(f, a1, a2, a3) efi_call_phys(f, a1, a2, a3) argument
14 #define efi_call_phys4(f, a1, a2, a3, a4) \ argument
15 efi_call_phys(f, a1, a2, a3, a4)
16 #define efi_call_phys5(f, a1, a2, a3, a4, a5) \ argument
17 efi_call_phys(f, a1, a2, a3, a4, a5)
18 #define efi_call_phys6(f, a1, a2, a3, a4, a5, a6) \ argument
19 efi_call_phys(f, a1, a2, a3, a4, a5, a6)
28 #define efi_call_virt1(f, a1) efi_call_virt(f, a1) argument
[all …]
/arch/mn10300/lib/
Dmemmove.S35 add d1,d2,a1 # src end
48 add -4,a1
56 mov (a1),d0
57 sub_sub +4,a1,+4,a0
59 mov (a1),d1
60 sub_sub +4,a1,+4,a0
63 mov (a1),d0
64 sub_sub +4,a1,+4,a0
66 mov (a1),d1
67 sub_sub +4,a1,+4,a0
[all …]
Dmemcpy.S29 mov d1,a1 # src
50 mov (a1+),d0
51 mov (a1+),d1
52 mov (a1+),e0
53 mov (a1+),e1
54 mov (a1+),e4
55 mov (a1+),e5
56 mov (a1+),e6
57 mov (a1+),e7
78 mov (a1+),d0
[all …]
D__lshrdi3.S36 mov +32,a1
37 sub a0,a1,a1 # a1 = 32 - count
38 asl a1,d1,a1 # get underflow from MSW -> LSW
40 or_lsr a1,d0,a0,d1 # insert underflow into LSW and
D__ashldi3.S35 mov +32,a1
36 sub a0,a1,a1 # a1 = 32 - count
37 lsr a1,d0,a1 # get overflow from LSW -> MSW
39 or_asl a1,d1,a0,d0 # insert overflow into MSW and
D__ashrdi3.S35 mov +32,a1
36 sub a0,a1,a1 # a1 = 32 - count
37 asl a1,d1,a1 # get underflow from MSW -> LSW
39 or_asr a1,d0,a0,d1 # insert underflow into LSW and
/arch/xtensa/kernel/
Dentry.S117 s32i a1, a2, PT_AREG1
120 mov a1, a2
130 s32i a3, a1, PT_SAR
131 s32i a2, a1, PT_ICOUNTLEVEL
139 s32i a2, a1, PT_WINDOWBASE
140 s32i a3, a1, PT_WINDOWSTART
144 s32i a2, a1, PT_WMASK # needed for restoring registers
149 s32i a4, a1, PT_AREG4
150 s32i a5, a1, PT_AREG5
151 s32i a6, a1, PT_AREG6
[all …]
Dcoprocessor.S142 entry a1, 32
143 s32i a0, a1, 0
150 1: l32i a0, a1, 0
154 entry a1, 32
155 s32i a0, a1, 0
162 1: l32i a0, a1, 0
181 entry a1, 32
182 s32i a0, a1, 0
191 1: l32i a0, a1, 0
195 entry a1, 32
[all …]
/arch/m68k/kernel/
Dhead.S608 lea %pc@(m68k_machtype),%a1
609 movel %a0@,%a1@
612 lea %pc@(m68k_fputype),%a1
613 movel %a0@,%a1@
616 lea %pc@(m68k_mmutype),%a1
617 movel %a0@,%a1@
620 lea %pc@(m68k_cputype),%a1
621 movel %a0@,%a1@
634 lea %pc@(L(mac_videobase)),%a1
635 movel %a0@,%a1@
[all …]
Dentry_mm.S102 movel %curptr@(TASK_STACK),%a1
103 tstb %a1@(TINFO_FLAGS+2)
124 movel %d1,%a1
130 tstb %a1@(TINFO_FLAGS+2)
139 movel %curptr@(TASK_STACK),%a1
140 movew %a1@(TINFO_FLAGS+2),%d0
166 movel %curptr@(TASK_STACK),%a1
167 moveb %a1@(TINFO_FLAGS+3),%d0
207 movel %d0,%a1
208 addqb #1,%a1@(TINFO_PREEMPT+1)
[all …]
/arch/m68k/platform/68328/
Dhead-pilot.S113 moveal #_ebss, %a1
114 lea %a1@(512), %a2
121 movel %d0, %a1@+
122 cmpal %a1, %a2
127 moveal #_sdata, %a1
135 movel %d0, %a1@+
136 cmpal %a1, %a2
142 moveal #_ebss, %a1
147 cmpal %a0, %a1
154 moveal #command_line, %a1
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/arch/alpha/lib/
Dstxcpy.S47 mskqh t2, a1, t2 # e0 : detection in the src word
48 mskqh t1, a1, t3 # e0 :
50 mskql t0, a1, t0 # e0 : assemble the first output word
62 ldq_u t1, 0(a1) # e0 :
63 addq a1, 8, a1 # .. e1 :
102 xor a0, a1, t0 # e0 :
108 ldq_u t1, 0(a1) # e0 : load first src word
110 addq a1, 8, a1 # e0 :
131 ldq_u t2, 8(a1) # e0 :
132 addq a1, 8, a1 # .. e1 :
[all …]
Dev6-stxcpy.S58 mskqh t2, a1, t2 # U : detection in the src word (stall)
59 mskqh t1, a1, t3 # U :
62 mskql t0, a1, t0 # U : assemble the first output word
78 ldq_u t1, 0(a1) # L : Latency=3
79 addq a1, 8, a1 # E :
122 xor a0, a1, t0 # E :
128 ldq_u t1, 0(a1) # L : load first src word
130 addq a1, 8, a1 # E :
154 ldq_u t2, 8(a1) # L :
155 addq a1, 8, a1 # E :
[all …]
Dstrchr.S21 zapnot a1, 1, a1 # e0 : zero extend the search character
23 sll a1, 8, t5 # e0 : replicate the search character
25 or t5, a1, a1 # e0 :
27 sll a1, 16, t5 # e0 :
30 or t5, a1, a1 # .. e1 :
31 sll a1, 32, t5 # e0 :
33 or t5, a1, a1 # e0 :
34 xor t0, a1, t1 # .. e1 : make bytes == c zero
43 xor t0, a1, t1 # .. e1 (ev5 data stall)
Dstxncpy.S55 mskqh t2, a1, t2 # e0 : detection in the src word
56 mskqh t1, a1, t3 # e0 :
58 mskql t0, a1, t0 # e0 : assemble the first output word
70 ldq_u t0, 0(a1) # e0 :
71 addq a1, 8, a1 # .. e1 :
121 xor a0, a1, t1 # e0 :
134 ldq_u t1, 0(a1) # e0 : load first src word
135 addq a1, 8, a1 # .. e1 :
157 ldq_u t2, 8(a1) # e0 : load second src word
158 addq a1, 8, a1 # .. e1 :
[all …]
Dev67-strchr.S32 and a1, 0xff, t3 # E : 00000000000000ch
33 insbl a1, 1, t5 # U : 000000000000ch00
34 insbl a1, 7, a2 # U : ch00000000000000
37 or t5, t3, a1 # E : 000000000000chch
43 inswl a1, 2, t5 # E : 00000000chch0000
44 inswl a1, 4, a3 # E : 0000chch00000000
46 or a1, a2, a1 # E : chch00000000chch
52 or t5, a1, a1 # E : chchchchchchchch
53 xor t0, a1, t1 # E : make bytes == c zero
70 xor t0, a1, t1 # E :
Dev6-stxncpy.S66 mskqh t2, a1, t2 # U : detection in the src word (stall)
67 mskqh t1, a1, t3 # U :
70 mskql t0, a1, t0 # U : assemble the first output word
94 ldq_u t0, 0(a1) # L :
95 addq a1, 8, a1 # E :
153 xor a0, a1, t1 # E :
166 ldq_u t1, 0(a1) # L : load first src word
167 addq a1, 8, a1 # E :
196 ldq_u t2, 8(a1) # L : Latency=3 load second src word
197 addq a1, 8, a1 # E :
[all …]
Dstrncpy_from_user.S44 mskqh t2, a1, t2 # e0 : detection in the src word
45 mskqh t1, a1, t3 # e0 :
47 mskql t0, a1, t0 # e0 : assemble the first output word
59 EX( ldq_u t0, 0(a1) ) # e0 :
60 addq a1, 8, a1 # .. e1 :
107 xor a0, a1, t1 # e0 :
120 EX( ldq_u t1, 0(a1) ) # e0 : load first src word
121 addq a1, 8, a1 # .. e1 :
143 EX( ldq_u t2, 8(a1) ) # e0 : load second src word
144 addq a1, 8, a1 # .. e1 :
[all …]
/arch/arm/include/asm/
Dxor.h12 #define __XOR(a1, a2) a1 ^= a2 argument
16 : "=r" (dst), "=r" (a1), "=r" (a2) \
21 : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
28 __XOR(a1, b1); __XOR(a2, b2);
34 __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
39 : "0" (dst), "r" (a1), "r" (a2))
44 : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
50 register unsigned int a1 __asm__("r4"); in xor_arm4regs_2()
71 register unsigned int a1 __asm__("r4"); in xor_arm4regs_3()
93 register unsigned int a1 __asm__("r8"); in xor_arm4regs_4()
[all …]
/arch/m68k/math-emu/
Dfp_move.S78 lea (FPD_TEMPFP1,FPDATA),%a1
79 move.l (%a0)+,(%a1)+
80 move.l (%a0)+,(%a1)+
81 move.l (%a0),(%a1)
82 lea (-8,%a1),%a0
179 move.l %a0,%a1
203 putuser.l %d0,(%a1),fp_err_ua1,%a1
208 putuser.l %d0,(%a1),fp_err_ua1,%a1
216 putuser.l %d0,(%a1)+,fp_err_ua1,%a1
218 putuser.l %d0,(%a1)+,fp_err_ua1,%a1
[all …]
Dfp_movem.S133 lea (FPD_FPREG,FPDATA),%a1
137 lea (-12,%a1,%d0*8),%a1
143 1: printf PMOVEM,"(%p>%p)",2,%a0,%a1
148 move.l %d2,(%a1)+
150 move.l %d2,(%a1)+
152 move.l %d2,(%a1)
154 subq.l #8,%a1
156 2: add.l %d0,%a1
162 1: printf PMOVEM,"(%p>%p)",2,%a1,%a0
163 move.l (%a1)+,%d2
[all …]
/arch/m68k/include/asm/
Dm5249sim.h195 movel #0x80000001,%a1
196 movec %a1,#3086 /* map MBAR2 region */
197 subql #1,%a1 /* get MBAR2 address in a1 */
203 moveb %d0,0x16b(%a1) /* interrupt base register */
215 movel 0x180(%a1),%d0 /* get current PLL value */
217 movel %d0,0x180(%a1) /* set PLL register */
227 movel %d0,0x180(%a1) /* set PLL register */
229 movel %d0,0x180(%a1) /* set PLL register */
254 movel %d0,0x18c(%a1)
256 movel %d0,0x190(%a1)
[all …]
/arch/mn10300/kernel/
Dgdb-low.S36 mov d1,a1
41 movbu d1,(a1)
48 mov d1,a1
53 movhu d1,(a1)
60 mov d1,a1
65 mov d1,(a1)
79 mov d1,a1
82 movbu a0,(a1)
90 mov d1,a1
93 movhu a0,(a1)
[all …]
/arch/m68k/fpsp040/
Dx_store.S44 lea fpreg_mask,%a1
45 moveb (%a1,%d0.w),%d0 |convert reg# to dynamic register mask
89 movel %a0,%a1 |save source addr in a1
104 | a1 -> source in extended precision
107 | a1 -> destroyed
132 movew LOCAL_EX(%a1),%d0 |get exponent
139 tstb LOCAL_SGN(%a1)
146 clrl LOCAL_HI(%a1) |clear msb
147 tstb LOCAL_SGN(%a1)
151 movel %d0,LOCAL_EX(%a1) |put the new exp back on the stack
[all …]
/arch/mips/lib/
Dmemset.S59 beqz a1, 1f
62 andi a1, 0xff /* spread fillword */
63 LONG_SLL t1, a1, 8
64 or a1, t1
65 LONG_SLL t1, a1, 16
67 or a1, t1
68 LONG_SLL t1, a1, 32
70 or a1, t1
91 EX(LONG_S_L, a1, (a0), .Lfirst_fixup) /* make word/dword aligned */
94 EX(LONG_S_R, a1, (a0), .Lfirst_fixup) /* make word/dword aligned */
[all …]

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