1/* 2 * linux/arch/m68knommu/platform/68328/head-pilot.S 3 * - A startup file for the MC68328 4 * 5 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>, 6 * Kenneth Albanowski <kjahds@kjahds.com>, 7 * The Silver Hammer Group, Ltd. 8 * 9 * (c) 1995, Dionne & Associates 10 * (c) 1995, DKG Display Tech. 11 */ 12 13#define ASSEMBLY 14 15#define IMMED # 16#define DBG_PUTC(x) moveb IMMED x, 0xfffff907 17 18 19.global _stext 20.global _start 21 22.global _rambase 23.global _ramvec 24.global _ramstart 25.global _ramend 26 27.global bootlogo_bits 28 29/*****************************************************************************/ 30 31.data 32 33/* 34 * Set up the usable of RAM stuff. Size of RAM is determined then 35 * an initial stack set up at the end. 36 */ 37.align 4 38_ramvec: 39.long 0 40_rambase: 41.long 0 42_ramstart: 43.long 0 44_ramend: 45.long 0 46 47.text 48 49_start: 50_stext: 51 52 53#ifdef CONFIG_M68328 54 55#ifdef CONFIG_PILOT 56 .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */ 57 .byte 'b', 'o', 'o', 't' 58 .word 10000 59 60 nop 61#endif 62 63 moveq #0, %d0 64 movew %d0, 0xfffff618 /* Watchdog off */ 65 movel #0x00011f07, 0xfffff114 /* CS A1 Mask */ 66 67 movew #0x0800, 0xfffff906 /* Ignore CTS */ 68 movew #0x010b, 0xfffff902 /* BAUD to 9600 */ 69 70 movew #0x2410, 0xfffff200 /* PLLCR */ 71 movew #0x123, 0xfffff202 /* PLLFSR */ 72 73#ifdef CONFIG_PILOT 74 moveb #0, 0xfffffA27 /* LCKCON */ 75 movel #_start, 0xfffffA00 /* LSSA */ 76 moveb #0xa, 0xfffffA05 /* LVPW */ 77 movew #0x9f, 0xFFFFFa08 /* LXMAX */ 78 movew #0x9f, 0xFFFFFa0a /* LYMAX */ 79 moveb #9, 0xfffffa29 /* LBAR */ 80 moveb #0, 0xfffffa25 /* LPXCD */ 81 moveb #0x04, 0xFFFFFa20 /* LPICF */ 82 moveb #0x58, 0xfffffA27 /* LCKCON */ 83 moveb #0x85, 0xfffff429 /* PFDATA */ 84 moveb #0xd8, 0xfffffA27 /* LCKCON */ 85 moveb #0xc5, 0xfffff429 /* PFDATA */ 86 moveb #0xd5, 0xfffff429 /* PFDATA */ 87 88 moveal #0x00100000, %a3 89 moveal #0x100ffc00, %a4 90#endif /* CONFIG_PILOT */ 91 92#endif /* CONFIG_M68328 */ 93 94 movew #0x2700, %sr 95 lea %a4@(-4), %sp 96 97 DBG_PUTC('\r') 98 DBG_PUTC('\n') 99 DBG_PUTC('A') 100 101 moveq #0,%d0 102 movew #16384, %d0 /* PLL settle wait loop */ 103L0: 104 subw #1, %d0 105 bne L0 106 107 DBG_PUTC('B') 108 109 /* Copy command line from beginning of RAM (+16) to end of bss */ 110 movel #CONFIG_VECTORBASE, %d7 111 addl #16, %d7 112 moveal %d7, %a0 113 moveal #_ebss, %a1 114 lea %a1@(512), %a2 115 116 DBG_PUTC('C') 117 118 /* Copy %a0 to %a1 until %a1 == %a2 */ 119L2: 120 movel %a0@+, %d0 121 movel %d0, %a1@+ 122 cmpal %a1, %a2 123 bhi L2 124 125 /* Copy data+init segment from ROM to RAM */ 126 moveal #_etext, %a0 127 moveal #_sdata, %a1 128 moveal #__init_end, %a2 129 130 DBG_PUTC('D') 131 132 /* Copy %a0 to %a1 until %a1 == %a2 */ 133LD1: 134 movel %a0@+, %d0 135 movel %d0, %a1@+ 136 cmpal %a1, %a2 137 bhi LD1 138 139 DBG_PUTC('E') 140 141 moveal #_sbss, %a0 142 moveal #_ebss, %a1 143 144 /* Copy 0 to %a0 until %a0 == %a1 */ 145L1: 146 movel #0, %a0@+ 147 cmpal %a0, %a1 148 bhi L1 149 150 DBG_PUTC('F') 151 152 /* Copy command line from end of bss to command line */ 153 moveal #_ebss, %a0 154 moveal #command_line, %a1 155 lea %a1@(512), %a2 156 157 DBG_PUTC('G') 158 159 /* Copy %a0 to %a1 until %a1 == %a2 */ 160L3: 161 movel %a0@+, %d0 162 movel %d0, %a1@+ 163 cmpal %a1, %a2 164 bhi L3 165 166 movel #_sdata, %d0 167 movel %d0, _rambase 168 movel #_ebss, %d0 169 movel %d0, _ramstart 170 171 movel %a4, %d0 172 subl #4096, %d0 /* Reserve 4K of stack */ 173 moveq #79, %d7 174 movel %d0, _ramend 175 176 pea 0 177 pea env 178 pea %sp@(4) 179 pea 0 180 181 DBG_PUTC('H') 182 183#ifdef CONFIG_PILOT 184 movel #bootlogo_bits, 0xFFFFFA00 185 moveb #10, 0xFFFFFA05 186 movew #160, 0xFFFFFA08 187 movew #160, 0xFFFFFA0A 188#endif /* CONFIG_PILOT */ 189 190 DBG_PUTC('I') 191 192 lea init_thread_union, %a0 193 lea 0x2000(%a0), %sp 194 195 DBG_PUTC('J') 196 DBG_PUTC('\r') 197 DBG_PUTC('\n') 198 199 jsr start_kernel 200_exit: 201 202 jmp _exit 203 204 205 .data 206env: 207 .long 0 208