/arch/h8300/platform/h8300h/ |
D | irq.c | 34 int bitmask; in h8300_enable_irq_pin() local 39 bitmask = 1 << (irq - EXT_IRQ0); in h8300_enable_irq_pin() 45 if (H8300_GPIO_RESERVE(H8300_GPIO_P8, bitmask) == 0) in h8300_enable_irq_pin() 47 H8300_GPIO_DDR(H8300_GPIO_P8, bitmask, H8300_GPIO_INPUT); in h8300_enable_irq_pin() 51 if (H8300_GPIO_RESERVE(H8300_GPIO_P9, bitmask) == 0) in h8300_enable_irq_pin() 53 H8300_GPIO_DDR(H8300_GPIO_P9, bitmask, H8300_GPIO_INPUT); in h8300_enable_irq_pin() 62 int bitmask; in h8300_disable_irq_pin() local 67 bitmask = 1 << (irq - EXT_IRQ0); in h8300_disable_irq_pin() 73 *(volatile unsigned char *)IER &= ~bitmask; in h8300_disable_irq_pin() 74 H8300_GPIO_FREE(H8300_GPIO_P8, bitmask); in h8300_disable_irq_pin() [all …]
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D | ptrace_h8300h.c | 88 unsigned char bitmask; member 96 .bitmask = msk, \ 215 if ((inst & op->bitmask) == op->bitpattern) { in getnextpc()
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/arch/mips/emma/markeins/ |
D | irq.c | 183 u32 bitmask; in emma2rh_irq_dispatch() local 194 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { in emma2rh_irq_dispatch() 195 if (swIntStatus & bitmask) { in emma2rh_irq_dispatch() 205 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { in emma2rh_irq_dispatch() 206 if (intStatus & bitmask) { in emma2rh_irq_dispatch() 220 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { in emma2rh_irq_dispatch() 221 if (gpioIntStatus & bitmask) { in emma2rh_irq_dispatch() 231 for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { in emma2rh_irq_dispatch() 232 if (intStatus & bitmask) { in emma2rh_irq_dispatch() 241 for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { in emma2rh_irq_dispatch() [all …]
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/arch/sh/kernel/cpu/irq/ |
D | intc-sh5.c | 85 unsigned long bitmask; in enable_intc_irq() local 92 bitmask = 1 << irq; in enable_intc_irq() 95 bitmask = 1 << (irq - 32); in enable_intc_irq() 98 __raw_writel(bitmask, reg); in enable_intc_irq() 105 unsigned long bitmask; in disable_intc_irq() local 109 bitmask = 1 << irq; in disable_intc_irq() 112 bitmask = 1 << (irq - 32); in disable_intc_irq() 115 __raw_writel(bitmask, reg); in disable_intc_irq()
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/arch/mips/pci/ |
D | msi-octeon.c | 218 u64 bitmask; in arch_teardown_msi_irq() local 243 bitmask = (1 << number_irqs) - 1; in arch_teardown_msi_irq() 245 bitmask <<= irq0; in arch_teardown_msi_irq() 246 if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) in arch_teardown_msi_irq() 252 msi_free_irq_bitmask[index] &= ~bitmask; in arch_teardown_msi_irq() 253 msi_multiple_irq_bitmask[index] &= ~bitmask; in arch_teardown_msi_irq()
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/arch/alpha/lib/ |
D | ev67-strlen.S | 34 cmpbge $31, $1, $2 # E : $2 <- bitmask: bit i == 1 <==> i-th byte == 0
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D | strlen.S | 29 cmpbge $31, $1, $2 # $2 <- bitmask: bit i == 1 <==> i-th byte == 0
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D | ev67-strlen_user.S | 68 cmpbge zero, t0, t1 # E : t1 <- bitmask: bit i == 1 <==> i-th byte == 0
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D | strlen_user.S | 53 cmpbge zero, t0, t1 # t1 <- bitmask: bit i == 1 <==> i-th byte == 0
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D | stxncpy.S | 129 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte 331 negq t8, t6 # .. e1 : build bitmask of bytes <= zero
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D | strncpy_from_user.S | 115 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte 302 negq t8, t6 # .. e1 : build bitmask of bytes <= zero
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D | ev6-strncpy_from_user.S | 68 sll t10, t6, t10 # E : t10 = bitmask of last count byte 370 negq t8, t6 # E : build bitmask of bytes <= zero
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D | ev6-stxncpy.S | 163 sll t10, t2, t10 # U : t10 = bitmask of last count byte 379 negq t8, t6 # E : build bitmask of bytes <= zero
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D | stxcpy.S | 272 negq t8, t6 # .. e1 : build bitmask of bytes <= zero
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D | ev6-stxcpy.S | 301 negq t8, t6 # E : build bitmask of bytes <= zero
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/arch/arm/mach-vt8500/ |
D | pwm.c | 45 static inline void pwm_busy_wait(void __iomem *reg, u8 bitmask) in pwm_busy_wait() argument 48 while ((readb(reg) & bitmask) && --loops) in pwm_busy_wait() 53 bitmask); in pwm_busy_wait()
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/arch/cris/arch-v32/drivers/ |
D | Kconfig | 504 This is a bitmask (8 bits) with information of what bits in PA that a 515 This is a bitmask (8 bits) with information of what bits in PA 525 This is a bitmask (18 bits) with information of what bits in PB 536 This is a bitmask (18 bits) with information of what bits in PB 546 This is a bitmask (18 bits) with information of what bits in PC 557 This is a bitmask (18 bits) with information of what bits in PC 566 This is a bitmask (18 bits) with information of what bits in PD 576 This is a bitmask (18 bits) with information of what bits in PD 585 This is a bitmask (18 bits) with information of what bits in PE 595 This is a bitmask (18 bits) with information of what bits in PE [all …]
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/arch/powerpc/platforms/cell/ |
D | beat_wrapper.h | 77 u64 bitmask, u64 hpte_v, u64 hpte_r, u64 *slot) in beat_insert_htab_entry() argument 83 bitmask, hpte_v, hpte_r); in beat_insert_htab_entry()
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/arch/x86/kvm/ |
D | pmu.c | 522 u64 bitmask; in kvm_handle_pmu_event() local 525 bitmask = pmu->reprogram_pmi; in kvm_handle_pmu_event() 527 for_each_set_bit(bit, (unsigned long *)&bitmask, X86_PMC_IDX_MAX) { in kvm_handle_pmu_event()
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D | vmx.c | 403 u32 bitmask; /* 4 bits per segment (1 bit per field) */ member 1112 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_clear() 1123 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_test_set() 1125 ret = vmx->segment_cache.bitmask & mask; in vmx_segment_cache_test_set() 1126 vmx->segment_cache.bitmask |= mask; in vmx_segment_cache_test_set()
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/arch/cris/arch-v10/drivers/ |
D | Kconfig | 533 hex "PA-buttons bitmask" 537 This is a bitmask with information about what bits on PA that 542 If the bitmask is <> 00 a button driver will be included in the gpio 550 This is a bitmask with information of what bits in PA that a user 560 This is a bitmask with information of what bits in PA that a user 570 This is a bitmask with information of what bits in PB that a user 580 This is a bitmask with information of what bits in PB that a user
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/arch/ia64/kernel/ |
D | unaligned.c | 455 unsigned long bitmask; in setreg() local 495 bitmask = 1UL << (addr >> 3 & 0x3f); in setreg() 498 *unat |= bitmask; in setreg() 500 *unat &= ~bitmask; in setreg()
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/arch/sh/kernel/cpu/sh3/ |
D | entry.S | 216 ! r8 passes SR bitmask, overwritten with restored data on return
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/arch/ia64/kvm/ |
D | vcpu.c | 425 unsigned long bitmask; in setreg() local 453 bitmask = 1UL << ((addr >> 3) & 0x3f); in setreg() 455 *unat |= bitmask; in setreg() 457 *unat &= ~bitmask; in setreg()
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/arch/tile/include/hv/ |
D | hypervisor.h | 1245 void hv_set_caching(unsigned int bitmask);
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