| /arch/arm/kernel/ |
| D | kprobes-common.c | 85 static unsigned long __kprobes __check_eq(unsigned long cpsr) in __check_eq() argument
87 return cpsr & PSR_Z_BIT; in __check_eq()
90 static unsigned long __kprobes __check_ne(unsigned long cpsr) in __check_ne() argument
92 return (~cpsr) & PSR_Z_BIT; in __check_ne()
95 static unsigned long __kprobes __check_cs(unsigned long cpsr) in __check_cs() argument
97 return cpsr & PSR_C_BIT; in __check_cs()
100 static unsigned long __kprobes __check_cc(unsigned long cpsr) in __check_cc() argument
102 return (~cpsr) & PSR_C_BIT; in __check_cc()
105 static unsigned long __kprobes __check_mi(unsigned long cpsr) in __check_mi() argument
107 return cpsr & PSR_N_BIT; in __check_mi()
[all …]
|
| D | kprobes.h | 80 static inline unsigned long it_advance(unsigned long cpsr) in it_advance() argument
82 if ((cpsr & 0x06000400) == 0) { in it_advance()
84 cpsr &= ~PSR_IT_MASK; in it_advance()
88 unsigned long it = cpsr & mask; in it_advance()
92 cpsr &= ~mask; in it_advance()
93 cpsr |= it; in it_advance()
95 return cpsr; in it_advance()
100 long cpsr = regs->ARM_cpsr; in bx_write_pc() local
102 cpsr |= PSR_T_BIT; in bx_write_pc()
105 cpsr &= ~PSR_T_BIT; in bx_write_pc()
[all …]
|
| D | kprobes-arm.c | 261 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd12rn16rm0rs8_rwflags() local
267 : "=r" (rdv), [cpsr] "=r" (cpsr) in emulate_rd12rn16rm0rs8_rwflags()
269 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn) in emulate_rd12rn16rm0rs8_rwflags()
277 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in emulate_rd12rn16rm0rs8_rwflags()
291 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd12rn16rm0_rwflags_nopc() local
297 : "=r" (rdv), [cpsr] "=r" (cpsr) in emulate_rd12rn16rm0_rwflags_nopc()
299 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn) in emulate_rd12rn16rm0_rwflags_nopc()
304 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in emulate_rd12rn16rm0_rwflags_nopc()
320 unsigned long cpsr = regs->ARM_cpsr; in emulate_rd16rn12rm0rs8_rwflags_nopc() local
326 : "=r" (rdv), [cpsr] "=r" (cpsr) in emulate_rd16rn12rm0rs8_rwflags_nopc()
[all …]
|
| D | kprobes-thumb.c | 21 #define in_it_block(cpsr) ((cpsr & 0x06000c00) != 0x00000000) argument
28 #define current_cond(cpsr) ((cpsr >> 12) & 0xf) argument
237 unsigned long cpsr = regs->ARM_cpsr; in t32_emulate_rd8rn16rm0_rwflags() local
243 : "=r" (rdv), [cpsr] "=r" (cpsr) in t32_emulate_rd8rn16rm0_rwflags()
245 "1" (cpsr), [fn] "r" (p->ainsn.insn_fn) in t32_emulate_rd8rn16rm0_rwflags()
250 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK); in t32_emulate_rd8rn16rm0_rwflags()
1034 unsigned long cpsr = regs->ARM_cpsr; in t16_simulate_it() local
1035 cpsr &= ~PSR_IT_MASK; in t16_simulate_it()
1036 cpsr |= (insn & 0xfc) << 8; in t16_simulate_it()
1037 cpsr |= (insn & 0x03) << 25; in t16_simulate_it()
[all …]
|
| D | entry-header.S | 53 mrs \rtemp, cpsr
65 mrs \rtemp, cpsr
82 ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
85 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
87 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
92 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
108 movs pc, lr @ return & move spsr_svc into cpsr
138 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
148 movs pc, lr @ return & move spsr_svc into cpsr
|
| D | kprobes-test.c | 1053 static unsigned long test_check_cc(int cc, unsigned long cpsr) in test_check_cc() argument
1055 int ret = arm_check_condition(cc << 28, cpsr); in test_check_cc()
1066 unsigned long cpsr; in test_context_cpsr() local
1071 cpsr = (scenario & 0xf) << 28; /* N,Z,C,V flags */ in test_context_cpsr()
1072 cpsr |= (scenario & 0xf) << 16; /* GE flags */ in test_context_cpsr()
1073 cpsr |= (scenario & 0x1) << 27; /* Toggle Q flag */ in test_context_cpsr()
1079 probe_should_run = test_check_cc(cc, cpsr) != 0; in test_context_cpsr()
1087 probe_should_run = test_check_cc(cc, cpsr) != 0; in test_context_cpsr()
1107 cpsr |= cond_base << 13; /* ITSTATE<7:5> */ in test_context_cpsr()
1108 cpsr |= (mask & 0x1) << 12; /* ITSTATE<4> */ in test_context_cpsr()
[all …]
|
| D | fiqasm.S | 27 mrs r1, cpsr
40 mrs r1, cpsr
|
| D | signal.c | 409 unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT); in setup_return() local
411 cpsr |= PSR_ENDSTATE; in setup_return()
417 cpsr = (cpsr & ~MODE_MASK) | USR_MODE; in setup_return()
428 cpsr |= PSR_T_BIT; in setup_return()
431 cpsr &= ~PSR_IT_MASK; in setup_return()
434 cpsr &= ~PSR_T_BIT; in setup_return()
450 if (cpsr & MODE32_BIT) { in setup_return()
472 regs->ARM_cpsr = cpsr; in setup_return()
|
| D | kprobes.c | 467 long cpsr; in setjmp_pre_handler() local
473 cpsr = regs->ARM_cpsr | PSR_I_BIT; in setjmp_pre_handler()
477 cpsr |= PSR_T_BIT; in setjmp_pre_handler()
479 cpsr &= ~PSR_T_BIT; in setjmp_pre_handler()
481 regs->ARM_cpsr = cpsr; in setjmp_pre_handler()
|
| D | iwmmxt.S | 183 mrs ip, cpsr
233 mrs ip, cpsr
269 mrs ip, cpsr
332 mrs r2, cpsr
|
| D | ptrace.c | 85 REG_OFFSET_NAME(cpsr),
|
| D | entry-armv.S | 1029 mrs r0, cpsr
|
| /arch/arm/lib/ |
| D | ecard.S | 17 mrs rt, cpsr; \
|
| /arch/arm/mach-ep93xx/ |
| D | crunch-bits.S | 204 mrs ip, cpsr
250 mrs ip, cpsr
283 mrs ip, cpsr
|
| /arch/arm/common/ |
| D | fiq_glue.S | 102 mrs r3, cpsr
|
| D | fiq_debugger.c | 235 static char *mode_name(unsigned cpsr) in mode_name() argument
237 switch (cpsr & MODE_MASK) { in mode_name()
|
| /arch/arm/include/asm/ |
| D | assembler.h | 138 mrs \oldcpsr, cpsr
143 mrs \oldcpsr, cpsr
|
| /arch/arm/mm/ |
| D | proc-feroceon.S | 260 mrs r2, cpsr
301 mrs r2, cpsr
337 mrs r2, cpsr
368 mrs r2, cpsr
|
| D | cache-v6.S | 40 mrs r1, cpsr
|
| D | proc-arm926.S | 107 mrs r3, cpsr @ Disable FIQs while Icache
|
| /arch/arm/boot/compressed/ |
| D | head-shark.S | 33 mrs r3, cpsr
|
| D | head.S | 145 mrs r2, cpsr @ get current mode
152 mrs r2, cpsr @ turn off interrupts to
|