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Searched refs:msm_proc_comm (Results 1 – 8 of 8) sorted by relevance

/arch/arm/mach-msm/
Dclock-pcom.c30 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL); in pc_clk_enable()
39 msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL); in pc_clk_disable()
47 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL); in pc_clk_reset()
49 rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL); in pc_clk_reset()
63 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); in pc_clk_set_rate()
72 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate); in pc_clk_set_min_rate()
81 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate); in pc_clk_set_max_rate()
90 int rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags); in pc_clk_set_flags()
99 if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL)) in pc_clk_get_rate()
107 if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL)) in pc_clk_is_enabled()
Dvreg.c109 vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); in vreg_enable()
126 vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); in vreg_disable()
138 vreg->status = msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv); in vreg_set_level()
Dgpiomux-v1.c28 rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, in __msm_gpiomux_write()
Dproc_comm.c77 int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2) in msm_proc_comm() function
Dboard-trout-panel.c272 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, 0); in trout_init_panel()
276 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, 0); in trout_init_panel()
Dboard-trout-mmc.c35 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0); in config_gpio_table()
Dproc_comm.h255 int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
Dacpuclock-arm11.c161 res = msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on); in pc_pll_request()