Home
last modified time | relevance | path

Searched refs:r3 (Results 1 – 25 of 495) sorted by relevance

12345678910>>...20

/arch/powerpc/lib/
Dhweight_64.S31 PPC_POPCNTB(r3,r3)
32 clrldi r3,r3,64-8
45 PPC_POPCNTB(r3,r3)
46 srdi r4,r3,8
47 add r3,r4,r3
48 clrldi r3,r3,64-8
51 clrlwi r3,r3,16
52 PPC_POPCNTW(r3,r3)
53 clrldi r3,r3,64-8
69 PPC_POPCNTB(r3,r3)
[all …]
Dcopypage_64.S32 dcbz r9,r3
36 addi r3,r3,-8
46 1: std r5,8(r3)
47 std r6,16(r3)
50 std r7,24(r3)
51 std r8,32(r3)
54 std r9,40(r3)
55 std r10,48(r3)
58 std r11,56(r3)
59 std r12,64(r3)
[all …]
Dcopyuser_power7.S83 ld r3,48(r1)
94 std r3,48(r1)
103 std r3,48(r1)
119 err1; stb r0,0(r3)
120 addi r3,r3,1
125 err1; sth r0,0(r3)
126 addi r3,r3,2
131 err1; stw r0,0(r3)
132 addi r3,r3,4
174 err2; std r0,0(r3)
[all …]
Dchecksum_64.S28 lwz r0,0(r3)
29 lwzu r5,4(r3)
34 1: lwzu r4,4(r3)
41 rlwinm r3,r0,16,0,31 /* fold two halves together */
42 add r3,r0,r3
43 not r3,r3
44 srwi r3,r3,16
56 addc r0,r3,r4 /* add 4 32-bit words together */
62 rlwinm r3,r0,16,0,31 /* fold two halves together */
63 add r3,r0,r3
[all …]
Dstring.S20 addi r5,r3,-1
34 addi r6,r3,-1
49 addi r5,r3,-1
62 addi r5,r3,-1
64 1: lbzu r3,1(r5)
65 cmpwi 1,r3,0
67 subf. r3,r0,r3
76 addi r5,r3,-1
78 1: lbzu r3,1(r5)
79 cmpwi 1,r3,0
[all …]
Dchecksum_32.S27 lwz r0,0(r3)
28 lwzu r5,4(r3)
33 1: lwzu r4,4(r3)
37 rlwinm r3,r0,16,0,31 /* fold two halves together */
38 add r3,r0,r3
39 not r3,r3
40 srwi r3,r3,16
49 addc r0,r3,r4 /* add 4 32-bit words together */
53 rlwinm r3,r0,16,0,31 /* fold two halves together */
54 add r3,r0,r3
[all …]
Dmemcpy_64.S14 std r3,48(r1) /* save destination pointer for return value */
17 neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
33 addi r3,r3,-16
44 addi r3,r3,8
49 std r8,8(r3)
51 stdu r9,16(r3)
53 3: std r8,8(r3)
55 addi r3,r3,16
60 stw r9,0(r3)
61 addi r3,r3,4
[all …]
/arch/powerpc/kernel/
Dmisc.S32 1: mflr r3
33 PPC_LL r4,(2f-1b)(r3)
34 subf r3,r4,r3
50 add r3,r3,r5
61 neg r3,r3
66 PPC_STL r0,0(r3)
67 PPC_STL r1,SZL(r3)
68 PPC_STL r2,2*SZL(r3)
70 PPC_STL r0,3*SZL(r3)
71 PPC_STL r13,4*SZL(r3)
[all …]
Dppc_save_regs.S27 PPC_STL r0,0*SZL(r3)
28 PPC_STL r2,2*SZL(r3)
29 PPC_STL r3,3*SZL(r3)
30 PPC_STL r4,4*SZL(r3)
31 PPC_STL r5,5*SZL(r3)
32 PPC_STL r6,6*SZL(r3)
33 PPC_STL r7,7*SZL(r3)
34 PPC_STL r8,8*SZL(r3)
35 PPC_STL r9,9*SZL(r3)
36 PPC_STL r10,10*SZL(r3)
[all …]
Dl2cr_6xx.S102 li r3,-1
137 rlwinm r5,r3,0,0,0 /* r5 contains the new enable bit */
138 rlwinm r3,r3,0,11,9 /* Turn off the invalidate bit */
139 rlwinm r3,r3,0,1,31 /* Turn off the enable bit */
208 mtspr SPRN_L2CR,r3
219 oris r3,r3,0x0020
221 mtspr SPRN_L2CR,r3
228 10: mfspr r3,SPRN_L2CR
229 andis. r4,r3,0x0020
235 3: mfspr r3,SPRN_L2CR
[all …]
Dcpu_setup_a2.S46 li r3,0
47 mtspr SPRN_ACOP,r3
50 mfmsr r3
51 andis. r0,r3,MSR_GS@h
55 mfspr r3,SPRN_A2_CCR2
56 ori r3,r3,A2_CCR2_ENABLE_ICSWX
57 mtspr SPRN_A2_CCR2,r3
60 li r3,-1
61 mtspr SPRN_HACOP,r3
66 mfspr r3,SPRN_A2_CCR2
[all …]
Dmisc_32.S42 stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
43 mr r1,r3
67 cmpwi cr1,r3,0
76 mr r10,r3
77 mullw r9,r3,r5
78 mulhwu r3,r3,r5
84 addze r3,r3
86 addze r3,r3
99 subf r3,r5,r3
124 add r0,r0,r3
[all …]
Dcpu_setup_ppc970.S30 mfspr r3,SPRN_HID4
31 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
32 rldimi r3,r0,2,61 /* clear bit 61 (lg_pg_en) */
34 mtspr SPRN_HID4,r3
37 mfspr r3,SPRN_HID5
38 rldimi r3,r0,6,56 /* clear bits 56 & 57 (DCBZ*) */
40 mtspr SPRN_HID5,r3
46 li r3,0x1200 /* enable i-fetch cacheability */
47 sldi r3,r3,44 /* and prefetch */
48 or r0,r0,r3
[all …]
/arch/arm/lib/
Dfindbit.S29 ARM( ldrb r3, [r0, r2, lsr #3] )
30 THUMB( lsr r3, r2, #3 )
31 THUMB( ldrb r3, [r0, r3] )
32 eors r3, r3, #0xff @ invert bits
50 ARM( ldrb r3, [r0, r2, lsr #3] )
51 THUMB( lsr r3, r2, #3 )
52 THUMB( ldrb r3, [r0, r3] )
53 eor r3, r3, #0xff @ now looking for a 1 bit
54 movs r3, r3, lsr ip @ shift off unused bits
70 ARM( ldrb r3, [r0, r2, lsr #3] )
[all …]
Duaccess.S34 ldrb r3, [r1], #1
35 USER( TUSER( strb) r3, [r0], #1) @ May fault
36 ldrgeb r3, [r1], #1
37 USER( TUSER( strgeb) r3, [r0], #1) @ May fault
38 ldrgtb r3, [r1], #1
39 USER( TUSER( strgtb) r3, [r0], #1) @ May fault
61 ldr r3, [r1], #4
62 USER( TUSER( str) r3, [r0], #4) @ May fault
76 .Lc2u_0cpy8lp: ldmia r1!, {r3 - r6}
77 stmia r0!, {r3 - r6} @ Shouldnt fault
[all …]
Dio-readsb.S17 ldrb r3, [r0]
18 strb r3, [r1], #1
19 ldrgeb r3, [r0]
20 strgeb r3, [r1], #1
21 ldrgtb r3, [r0]
22 strgtb r3, [r1], #1
37 .Linsb_16_lp: ldrb r3, [r0]
40 mov r3, r3, put_byte_0
42 orr r3, r3, r4, put_byte_1
44 orr r3, r3, r5, put_byte_2
[all …]
Dio-readsl.S22 1: ldr r3, [r0, #0]
27 stmia r1!, {r3, r4, ip, lr}
31 ldrcs r3, [r0, #0]
33 stmcsia r1!, {r3, ip}
34 ldrne r3, [r0, #0]
35 strne r3, [r1, #0]
38 3: ldr r3, [r0]
40 mov ip, r3, get_byte_0
43 mov ip, r3, get_byte_1
46 mov ip, r3, get_byte_2
[all …]
Dio-readsw-armv3.S24 ldr r3, [r0]
25 strb r3, [r1], #1
26 mov r3, r3, lsr #8
27 strb r3, [r1], #1
45 .Linsw_8_lp: ldr r3, [r0]
46 and r3, r3, ip
48 orr r3, r3, r4, lsl #16
65 stmia r1!, {r3 - r6}
76 ldr r3, [r0]
77 and r3, r3, ip
[all …]
Dio-writesw-armv4.S28 ldrh r3, [r1], #2
30 strh r3, [r0]
35 ands r3, r1, #3
43 .Loutsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
45 outword r3
54 ldmia r1!, {r3, ip}
55 outword r3
61 ldr r3, [r1], #4
62 outword r3
64 .Lno_outsw_2: ldrneh r3, [r1]
[all …]
/arch/powerpc/platforms/83xx/
Dsuspend-asm.S51 stw r3, immrbase@l(r4)
62 lis r3, mpc83xx_sleep_save_area@h
63 ori r3, r3, mpc83xx_sleep_save_area@l
69 stw r5, SS_MEMSAVE+0(r3)
70 stw r6, SS_MEMSAVE+4(r3)
76 stw r5, SS_HID+0(r3)
77 stw r6, SS_HID+4(r3)
78 stw r7, SS_HID+8(r3)
87 stw r4, SS_IABR+0(r3)
88 stw r5, SS_IABR+4(r3)
[all …]
/arch/s390/kernel/
Dcompat_wrapper.S18 llgtr %r3,%r3 # char *
24 llgtr %r3,%r3 # const char *
30 lgfr %r3,%r3 # int
40 lgfr %r3,%r3 # int
45 llgtr %r3,%r3 # const char *
62 lgfr %r3,%r3 # int
68 llgfr %r3,%r3 # mode_t
73 llgfr %r3,%r3 # __kernel_old_uid_emu31_t
79 lgfr %r3,%r3 # off_t
87 llgtr %r3,%r3 # char *
[all …]
/arch/powerpc/include/asm/
Dfsl_hcalls.h94 register uintptr_t r3 __asm__("r3"); in fh_send_nmi()
97 r3 = vcpu_mask; in fh_send_nmi()
100 : "+r" (r11), "+r" (r3) in fh_send_nmi()
104 return r3; in fh_send_nmi()
128 register uintptr_t r3 __asm__("r3"); in fh_partition_get_dtprop()
138 r3 = handle; in fh_partition_get_dtprop()
156 "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), in fh_partition_get_dtprop()
162 return r3; in fh_partition_get_dtprop()
182 register uintptr_t r3 __asm__("r3"); in fh_partition_set_dtprop()
192 r3 = handle; in fh_partition_set_dtprop()
[all …]
Depapr_hcalls.h183 register uintptr_t r3 __asm__("r3"); in ev_int_set_config()
189 r3 = interrupt; in ev_int_set_config()
195 : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6) in ev_int_set_config()
199 return r3; in ev_int_set_config()
215 register uintptr_t r3 __asm__("r3"); in ev_int_get_config()
221 r3 = interrupt; in ev_int_get_config()
224 : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5), "=r" (r6) in ev_int_get_config()
232 return r3; in ev_int_get_config()
246 register uintptr_t r3 __asm__("r3"); in ev_int_set_mask()
250 r3 = interrupt; in ev_int_set_mask()
[all …]
/arch/m32r/mm/
Dmmu.S33 st r3, @-sp
35 seth r3, #high(MMU_REG_BASE)
36 ld r1, @(MESTS_offset, r3) ; r1: status (MESTS reg.)
37 ld r0, @(MDEVP_offset, r3) ; r0: PFN + ASID (MDEVP reg.)
38 st r1, @(MESTS_offset, r3) ; clear status (MESTS reg.)
45 ;; r1 - r3: free
50 ;; r3: free
74 ;; r1 - r3: free
79 ;; r3: free
80 ldi r3, #-4096
[all …]
/arch/m32r/lib/
Dmemset.S30 and3 r3, r4, #3
31 beqz r3, word_set
32 addi r3, #-4
33 neg r3, r3 /* r3 = -(r3 - 4) */
36 addi r2, #-1 || addi r3, #-1
37 bnez r3, align_word
42 sll3 r3, r1, #8
43 or r1, r3 || addi r4, #-4
44 sll3 r3, r1, #16
45 or r1, r3 || addi r2, #-4
[all …]

12345678910>>...20