| /arch/m68k/platform/coldfire/ |
| D | Makefile | 18 obj-$(CONFIG_M5206) += timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += timers.o intc.o reset.o
20 obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o
21 obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o
22 obj-$(CONFIG_M5249) += timers.o intc.o reset.o
23 obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o
25 obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o
26 obj-$(CONFIG_M5307) += timers.o intc.o reset.o
27 obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o
28 obj-$(CONFIG_M5407) += timers.o intc.o reset.o
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| /arch/cris/arch-v10/kernel/ |
| D | dma.c | 231 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, reset); in cris_free_dma()
233 IO_STATE_VALUE(R_DMA_CH0_CMD, cmd, reset)); in cris_free_dma()
236 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, reset); in cris_free_dma()
238 IO_STATE_VALUE(R_DMA_CH1_CMD, cmd, reset)); in cris_free_dma()
241 *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, reset); in cris_free_dma()
243 IO_STATE_VALUE(R_DMA_CH2_CMD, cmd, reset)); in cris_free_dma()
246 *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, reset); in cris_free_dma()
248 IO_STATE_VALUE(R_DMA_CH3_CMD, cmd, reset)); in cris_free_dma()
251 *R_DMA_CH4_CMD = IO_STATE(R_DMA_CH4_CMD, cmd, reset); in cris_free_dma()
253 IO_STATE_VALUE(R_DMA_CH4_CMD, cmd, reset)); in cris_free_dma()
[all …]
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| D | head.S | 167 ;; Start MII clock to make sure it is running when tranceiver is reset
369 move.d $r0, [$r1]; assert ATA bus-reset
397 ;; reset dma4 and wait for completion
399 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
403 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
407 ;; reset dma5 and wait for completion
409 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
413 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
476 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
477 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
[all …]
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| /arch/arm/plat-s5p/ |
| D | setup-mipiphy.c | 18 bool on, u32 reset) in __s5p_mipi_phy_control() argument
39 cfg = on ? (cfg | reset) : (cfg & ~reset); in __s5p_mipi_phy_control()
45 S5P_MIPI_DPHY_MRESETN) & ~reset)) { in __s5p_mipi_phy_control()
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| /arch/arm/mach-u300/ |
| D | clock.c | 130 clk->reset = true; in syscon_block_reset_enable()
146 clk->reset = false; in syscon_block_reset_disable()
705 .reset = false,
719 .reset = true,
732 .reset = true,
747 .reset = false,
760 .reset = true,
774 .reset = true,
789 .reset = true,
803 .reset = true,
[all …]
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| /arch/alpha/oprofile/ |
| D | op_model_ev6.c | 25 unsigned long ctl, reset, need_reset, i; in ev6_reg_setup() local
46 reset = need_reset = 0; in ev6_reg_setup()
55 reset |= (0x100000 - count) << (i ? 6 : 28); in ev6_reg_setup()
59 reg->reset_values = reset; in ev6_reg_setup()
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| D | op_model_ev5.c | 31 int i, ctl, reset, need_reset; in common_reg_setup() local
90 ctl = reset = need_reset = 0; in common_reg_setup()
107 reset |= (max - count) << (48 - 16*i); in common_reg_setup()
112 reg->reset_values = reset; in common_reg_setup()
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| D | op_model_ev67.c | 26 unsigned long ctl, reset, need_reset, i; in ev67_reg_setup() local
51 reset = need_reset = 0; in ev67_reg_setup()
60 reset |= (0x100000 - count) << (i ? 6 : 28); in ev67_reg_setup()
64 reg->reset_values = reset; in ev67_reg_setup()
|
| /arch/s390/include/asm/ |
| D | reset.h | 18 extern void register_reset_call(struct reset_call *reset);
19 extern void unregister_reset_call(struct reset_call *reset);
|
| /arch/powerpc/platforms/52xx/ |
| D | mpc52xx_common.c | 285 int reset; in mpc5200_psc_ac97_gpio_reset() local
293 reset = PSC1_RESET; /* AC97_1_RES */ in mpc5200_psc_ac97_gpio_reset()
299 reset = PSC2_RESET; /* AC97_2_RES */ in mpc5200_psc_ac97_gpio_reset()
317 setbits8(&wkup_gpio->wkup_gpioe, reset); in mpc5200_psc_ac97_gpio_reset()
320 setbits8(&wkup_gpio->wkup_ddr, reset); in mpc5200_psc_ac97_gpio_reset()
325 clrbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
331 setbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
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| /arch/arm/mach-tegra/ |
| D | common.c | 69 void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0); in tegra_assert_system_reset() local
72 reg = readl_relaxed(reset); in tegra_assert_system_reset()
74 writel_relaxed(reg, reset); in tegra_assert_system_reset()
|
| /arch/xtensa/boot/boot-elf/ |
| D | bootstrap.S | 10 _j reset
16 reset: label
|
| /arch/arm/mach-pxa/include/mach/ |
| D | palm27x.h | 57 int reset);
59 static inline void palm27x_ac97_init(int minv, int maxv, int jack, int reset) {} in palm27x_ac97_init() argument
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| D | arcom-pcmcia.h | 8 void (*reset)(int state); member
|
| /arch/mips/loongson/fuloong-2e/ |
| D | Makefile | 5 obj-y += irq.o reset.o
|
| /arch/mips/jazz/ |
| D | Makefile | 5 obj-y := irq.o jazzdma.o reset.o setup.o
|
| /arch/mips/pnx833x/common/ |
| D | Makefile | 1 obj-y := interrupts.o platform.o prom.o setup.o reset.o
|
| /arch/mips/wrppmc/ |
| D | Makefile | 12 obj-y += irq.o pci.o reset.o serial.o setup.o time.o
|
| /arch/arm/include/asm/ |
| D | proc-fns.h | 46 void (*reset)(unsigned long addr) __attribute__((noreturn)); member
99 #define cpu_reset processor.reset
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| /arch/mips/loongson/lemote-2f/ |
| D | Makefile | 5 obj-y += machtype.o irq.o reset.o ec_kb3310b.o
|
| /arch/x86/kernel/ |
| D | amd_nb.c | 170 static unsigned int reset, ban; in amd_set_subcaches() local
179 if (reset == 0) { in amd_set_subcaches()
180 pci_read_config_dword(nb->link, 0x1d4, &reset); in amd_set_subcaches()
199 if (reg == reset) { in amd_set_subcaches()
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| /arch/mips/pnx8550/common/ |
| D | Makefile | 25 obj-y := setup.o prom.o int.o reset.o time.o proc.o platform.o
|
| /arch/mips/sni/ |
| D | Makefile | 5 obj-y += irq.o reset.o setup.o a20r.o rm200.o pcimt.o pcit.o time.o
|
| /arch/mips/powertv/ |
| D | Makefile | 26 obj-y += init.o ioremap.o memory.o powertv_setup.o reset.o time.o \
|
| /arch/mips/goldfish/ |
| D | Makefile | 9 obj-y += goldfish-reset.o
|