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Searched refs:FLUSH (Results 1 – 15 of 15) sorted by relevance

/drivers/staging/slicoss/
Dslicoss.c309 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH); in slic_mcast_set_mask()
311 FLUSH); in slic_mcast_set_mask()
317 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH); in slic_mcast_set_mask()
319 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH); in slic_mcast_set_mask()
384 slic_reg32_write(wphy, phy_advreg, FLUSH); in slic_link_config()
392 slic_reg32_write(wphy, phy_config, FLUSH); in slic_link_config()
397 slic_reg32_write(wphy, phy_config, FLUSH); in slic_link_config()
408 slic_reg32_write(wphy, phy_config, FLUSH); in slic_link_config()
432 slic_reg32_write(wphy, phy_advreg, FLUSH); in slic_link_config()
435 slic_reg32_write(wphy, phy_gctlreg, FLUSH); in slic_link_config()
[all …]
Dslic.h530 #define FLUSH true macro
/drivers/scsi/
Da2091.h46 volatile unsigned short FLUSH; member
Da3000.h38 volatile unsigned short FLUSH; member
Dmac53c94.c113 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); in DEF_SCSI_QCMD()
139 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); in mac53c94_init()
Da2091.c125 regs->FLUSH = 1; in dma_stop()
Da3000.c127 regs->FLUSH = 1; in dma_stop()
Dmesh.c366 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ in mesh_init()
1715 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ in mesh_host_reset()
/drivers/net/ethernet/apple/
Dbmac.c193 DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)); in dbdma_reset()
486 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_suspend()
487 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_suspend()
1417 st_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_close()
1418 st_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_close()
1507 out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); in bmac_tx_timeout()
1513 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); in bmac_tx_timeout()
Dmace.c306 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16); in dbdma_reset()
472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_open()
482 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); in mace_open()
510 st_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_close()
511 st_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_close()
/drivers/ata/
Dpata_macio.c579 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control); in pata_macio_freeze()
688 writel((FLUSH << 16) | FLUSH, &dma_regs->control); in pata_macio_bmdma_status()
692 if ((dstat & FLUSH) == 0) in pata_macio_bmdma_status()
/drivers/ide/
Dpmac.c1484 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control); in pmac_ide_build_dmatable()
1650 writel((FLUSH << 16) | FLUSH, &dma->control); in pmac_ide_dma_test_irq()
1655 if ((status & FLUSH) == 0) in pmac_ide_dma_test_irq()
/drivers/video/i810/
Di810.h71 #define FLUSH (0x04 << 23) macro
Di810_accel.c262 PUT_RING(PARSER | FLUSH); in load_front()
/drivers/tty/vt/
Dvt.c2106 #define FLUSH do { } while(0); in do_con_write() macro
2108 #define FLUSH if (draw_x >= 0) { \ in do_con_write()
2305 FLUSH in do_con_write()
2310 FLUSH in do_con_write()
2341 FLUSH in do_con_write()
2353 FLUSH in do_con_write()
2356 FLUSH in do_con_write()
2361 #undef FLUSH in do_con_write()