| /arch/arm/mach-vt8500/include/mach/ |
| D | vt8500_irqs.h | 47 #define IRQ_SPI0 24 /* SPI 0 */ macro
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| D | wm8505_irqs.h | 47 #define IRQ_SPI0 24 /* SPI 0 */ macro
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| /arch/blackfin/mach-bf518/ |
| D | dma.c | 76 ret_irq = IRQ_SPI0; in channel2irq()
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| D | Kconfig | 209 config IRQ_SPI0 config
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| /arch/blackfin/mach-bf538/ |
| D | Kconfig | 49 config IRQ_SPI0 config
50 int "IRQ_SPI0"
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| D | dma.c | 112 ret_irq = IRQ_SPI0; in channel2irq()
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| /arch/blackfin/mach-bf548/ |
| D | dma.c | 68 ret_irq = IRQ_SPI0; in channel2irq()
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| D | Kconfig | 146 config IRQ_SPI0 config
147 int "IRQ_SPI0"
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| /arch/arm/mach-s5p64x0/include/mach/ |
| D | irqs.h | 55 #define IRQ_SPI0 S5P_IRQ_VIC1(16) macro
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| /arch/blackfin/mach-bf538/include/mach/ |
| D | irq.h | 27 #define IRQ_SPI0 BFIN_IRQ(13) /* DMA 5 Channel (SPI0) */ macro
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| /arch/arm/mach-s5pc100/include/mach/ |
| D | irqs.h | 47 #define IRQ_SPI0 S5P_IRQ_VIC1(15) macro
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| /arch/arm/mach-s5pv210/include/mach/ |
| D | irqs.h | 54 #define IRQ_SPI0 S5P_IRQ_VIC1(15) macro
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| /arch/blackfin/mach-bf518/include/mach/ |
| D | irq.h | 36 #define IRQ_SPI0 BFIN_IRQ(21) /* DMA 7 Channel (SPI0) */ macro
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| /arch/arm/mach-s3c64xx/include/mach/ |
| D | irqs.h | 91 #define IRQ_SPI0 S3C64XX_IRQ_VIC1(16) macro
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| /arch/arm/mach-s3c24xx/include/mach/ |
| D | irqs.h | 49 #define IRQ_SPI0 S3C2410_IRQ(22) macro
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| /arch/blackfin/mach-bf518/boards/ |
| D | tcm-bf518.c | 251 .start = IRQ_SPI0,
252 .end = IRQ_SPI0,
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| D | ezbrd.c | 317 .start = IRQ_SPI0,
318 .end = IRQ_SPI0,
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| /arch/blackfin/mach-bf538/boards/ |
| D | ezkit.c | 627 .start = IRQ_SPI0,
628 .end = IRQ_SPI0,
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| /arch/blackfin/mach-bf548/boards/ |
| D | cm_bf548.c | 950 .start = IRQ_SPI0,
951 .end = IRQ_SPI0,
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| D | ezkit.c | 1127 .start = IRQ_SPI0,
1128 .end = IRQ_SPI0,
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| /arch/blackfin/mach-bf548/include/mach/ |
| D | irq.h | 27 #define IRQ_SPI0 BFIN_IRQ(13) /* SPI0 Interrupt (DMA4) */ macro
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| /arch/arm/plat-samsung/ |
| D | devs.c | 1226 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1523 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
|