1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/etherdevice.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17
18 #include <linux/i2c.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
21 #include <asm/dma.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
24 #include <asm/portmux.h>
25 #include <asm/dpmc.h>
26 #include <asm/bfin_sdh.h>
27 #include <linux/spi/ad7877.h>
28 #include <net/dsa.h>
29
30 /*
31 * Name the Board for the /proc/cpuinfo
32 */
33 const char bfin_board_name[] = "Bluetechnix TCM-BF518";
34
35 /*
36 * Driver needs to know address, irq and flag pin.
37 */
38
39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
40 static struct mtd_partition tcm_partitions[] = {
41 {
42 .name = "bootloader(nor)",
43 .size = 0x40000,
44 .offset = 0,
45 },
46 {
47 .name = "linux(nor)",
48 .size = 0x1C0000,
49 .offset = MTDPART_OFS_APPEND,
50 }
51 };
52
53 static struct physmap_flash_data tcm_flash_data = {
54 .width = 2,
55 .parts = tcm_partitions,
56 .nr_parts = ARRAY_SIZE(tcm_partitions),
57 };
58
59 static struct resource tcm_flash_resource = {
60 .start = 0x20000000,
61 .end = 0x201fffff,
62 .flags = IORESOURCE_MEM,
63 };
64
65 static struct platform_device tcm_flash_device = {
66 .name = "physmap-flash",
67 .id = 0,
68 .dev = {
69 .platform_data = &tcm_flash_data,
70 },
71 .num_resources = 1,
72 .resource = &tcm_flash_resource,
73 };
74 #endif
75
76 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
77 static struct platform_device rtc_device = {
78 .name = "rtc-bfin",
79 .id = -1,
80 };
81 #endif
82
83 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
84 #include <linux/bfin_mac.h>
85 static const unsigned short bfin_mac_peripherals[] = P_MII0;
86
87 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
88 {
89 .addr = 1,
90 .irq = IRQ_MAC_PHYINT,
91 },
92 };
93
94 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
95 .phydev_number = 1,
96 .phydev_data = bfin_phydev_data,
97 .phy_mode = PHY_INTERFACE_MODE_MII,
98 .mac_peripherals = bfin_mac_peripherals,
99 };
100
101 static struct platform_device bfin_mii_bus = {
102 .name = "bfin_mii_bus",
103 .dev = {
104 .platform_data = &bfin_mii_bus_data,
105 }
106 };
107
108 static struct platform_device bfin_mac_device = {
109 .name = "bfin_mac",
110 .dev = {
111 .platform_data = &bfin_mii_bus,
112 }
113 };
114 #endif
115
116 #if defined(CONFIG_MTD_M25P80) \
117 || defined(CONFIG_MTD_M25P80_MODULE)
118 static struct mtd_partition bfin_spi_flash_partitions[] = {
119 {
120 .name = "bootloader(spi)",
121 .size = 0x00040000,
122 .offset = 0,
123 .mask_flags = MTD_CAP_ROM
124 }, {
125 .name = "linux kernel(spi)",
126 .size = MTDPART_SIZ_FULL,
127 .offset = MTDPART_OFS_APPEND,
128 }
129 };
130
131 static struct flash_platform_data bfin_spi_flash_data = {
132 .name = "m25p80",
133 .parts = bfin_spi_flash_partitions,
134 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
135 .type = "m25p16",
136 };
137
138 /* SPI flash chip (m25p64) */
139 static struct bfin5xx_spi_chip spi_flash_chip_info = {
140 .enable_dma = 0, /* use dma transfer with this chip*/
141 };
142 #endif
143
144 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
145 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
146 .enable_dma = 0,
147 };
148 #endif
149
150 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
151 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
152 .model = 7877,
153 .vref_delay_usecs = 50, /* internal, no capacitor */
154 .x_plate_ohms = 419,
155 .y_plate_ohms = 486,
156 .pressure_max = 1000,
157 .pressure_min = 0,
158 .stopacq_polarity = 1,
159 .first_conversion_delay = 3,
160 .acquisition_time = 1,
161 .averaging = 1,
162 .pen_down_acc_interval = 1,
163 };
164 #endif
165
166 static struct spi_board_info bfin_spi_board_info[] __initdata = {
167 #if defined(CONFIG_MTD_M25P80) \
168 || defined(CONFIG_MTD_M25P80_MODULE)
169 {
170 /* the modalias must be the same as spi device driver name */
171 .modalias = "m25p80", /* Name of spi_driver for this device */
172 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
173 .bus_num = 0, /* Framework bus number */
174 .chip_select = 2, /* SPI0_SSEL2 */
175 .platform_data = &bfin_spi_flash_data,
176 .controller_data = &spi_flash_chip_info,
177 .mode = SPI_MODE_3,
178 },
179 #endif
180
181 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
182 {
183 .modalias = "mmc_spi",
184 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
185 .bus_num = 0,
186 .chip_select = 5,
187 .controller_data = &mmc_spi_chip_info,
188 .mode = SPI_MODE_3,
189 },
190 #endif
191 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
192 {
193 .modalias = "ad7877",
194 .platform_data = &bfin_ad7877_ts_info,
195 .irq = IRQ_PF8,
196 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
197 .bus_num = 0,
198 .chip_select = 2,
199 },
200 #endif
201 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
202 && defined(CONFIG_SND_SOC_WM8731_SPI)
203 {
204 .modalias = "wm8731",
205 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
206 .bus_num = 0,
207 .chip_select = 5,
208 .mode = SPI_MODE_0,
209 },
210 #endif
211 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
212 {
213 .modalias = "spidev",
214 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
215 .bus_num = 0,
216 .chip_select = 1,
217 },
218 #endif
219 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
220 {
221 .modalias = "bfin-lq035q1-spi",
222 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
223 .bus_num = 0,
224 .chip_select = 1,
225 .mode = SPI_CPHA | SPI_CPOL,
226 },
227 #endif
228 };
229
230 /* SPI controller data */
231 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
232 /* SPI (0) */
233 static struct bfin5xx_spi_master bfin_spi0_info = {
234 .num_chipselect = 6,
235 .enable_dma = 1, /* master has the ability to do dma transfer */
236 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
237 };
238
239 static struct resource bfin_spi0_resource[] = {
240 [0] = {
241 .start = SPI0_REGBASE,
242 .end = SPI0_REGBASE + 0xFF,
243 .flags = IORESOURCE_MEM,
244 },
245 [1] = {
246 .start = CH_SPI0,
247 .end = CH_SPI0,
248 .flags = IORESOURCE_DMA,
249 },
250 [2] = {
251 .start = IRQ_SPI0,
252 .end = IRQ_SPI0,
253 .flags = IORESOURCE_IRQ,
254 },
255 };
256
257 static struct platform_device bfin_spi0_device = {
258 .name = "bfin-spi",
259 .id = 0, /* Bus number */
260 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
261 .resource = bfin_spi0_resource,
262 .dev = {
263 .platform_data = &bfin_spi0_info, /* Passed to driver */
264 },
265 };
266
267 /* SPI (1) */
268 static struct bfin5xx_spi_master bfin_spi1_info = {
269 .num_chipselect = 6,
270 .enable_dma = 1, /* master has the ability to do dma transfer */
271 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
272 };
273
274 static struct resource bfin_spi1_resource[] = {
275 [0] = {
276 .start = SPI1_REGBASE,
277 .end = SPI1_REGBASE + 0xFF,
278 .flags = IORESOURCE_MEM,
279 },
280 [1] = {
281 .start = CH_SPI1,
282 .end = CH_SPI1,
283 .flags = IORESOURCE_DMA,
284 },
285 [2] = {
286 .start = IRQ_SPI1,
287 .end = IRQ_SPI1,
288 .flags = IORESOURCE_IRQ,
289 },
290 };
291
292 static struct platform_device bfin_spi1_device = {
293 .name = "bfin-spi",
294 .id = 1, /* Bus number */
295 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
296 .resource = bfin_spi1_resource,
297 .dev = {
298 .platform_data = &bfin_spi1_info, /* Passed to driver */
299 },
300 };
301 #endif /* spi master and devices */
302
303 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
304 #ifdef CONFIG_SERIAL_BFIN_UART0
305 static struct resource bfin_uart0_resources[] = {
306 {
307 .start = UART0_THR,
308 .end = UART0_GCTL+2,
309 .flags = IORESOURCE_MEM,
310 },
311 {
312 .start = IRQ_UART0_TX,
313 .end = IRQ_UART0_TX,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = IRQ_UART0_RX,
318 .end = IRQ_UART0_RX,
319 .flags = IORESOURCE_IRQ,
320 },
321 {
322 .start = IRQ_UART0_ERROR,
323 .end = IRQ_UART0_ERROR,
324 .flags = IORESOURCE_IRQ,
325 },
326 {
327 .start = CH_UART0_TX,
328 .end = CH_UART0_TX,
329 .flags = IORESOURCE_DMA,
330 },
331 {
332 .start = CH_UART0_RX,
333 .end = CH_UART0_RX,
334 .flags = IORESOURCE_DMA,
335 },
336 };
337
338 static unsigned short bfin_uart0_peripherals[] = {
339 P_UART0_TX, P_UART0_RX, 0
340 };
341
342 static struct platform_device bfin_uart0_device = {
343 .name = "bfin-uart",
344 .id = 0,
345 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
346 .resource = bfin_uart0_resources,
347 .dev = {
348 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
349 },
350 };
351 #endif
352 #ifdef CONFIG_SERIAL_BFIN_UART1
353 static struct resource bfin_uart1_resources[] = {
354 {
355 .start = UART1_THR,
356 .end = UART1_GCTL+2,
357 .flags = IORESOURCE_MEM,
358 },
359 {
360 .start = IRQ_UART1_TX,
361 .end = IRQ_UART1_TX,
362 .flags = IORESOURCE_IRQ,
363 },
364 {
365 .start = IRQ_UART1_RX,
366 .end = IRQ_UART1_RX,
367 .flags = IORESOURCE_IRQ,
368 },
369 {
370 .start = IRQ_UART1_ERROR,
371 .end = IRQ_UART1_ERROR,
372 .flags = IORESOURCE_IRQ,
373 },
374 {
375 .start = CH_UART1_TX,
376 .end = CH_UART1_TX,
377 .flags = IORESOURCE_DMA,
378 },
379 {
380 .start = CH_UART1_RX,
381 .end = CH_UART1_RX,
382 .flags = IORESOURCE_DMA,
383 },
384 };
385
386 static unsigned short bfin_uart1_peripherals[] = {
387 P_UART1_TX, P_UART1_RX, 0
388 };
389
390 static struct platform_device bfin_uart1_device = {
391 .name = "bfin-uart",
392 .id = 1,
393 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
394 .resource = bfin_uart1_resources,
395 .dev = {
396 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
397 },
398 };
399 #endif
400 #endif
401
402 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
403 #ifdef CONFIG_BFIN_SIR0
404 static struct resource bfin_sir0_resources[] = {
405 {
406 .start = 0xFFC00400,
407 .end = 0xFFC004FF,
408 .flags = IORESOURCE_MEM,
409 },
410 {
411 .start = IRQ_UART0_RX,
412 .end = IRQ_UART0_RX+1,
413 .flags = IORESOURCE_IRQ,
414 },
415 {
416 .start = CH_UART0_RX,
417 .end = CH_UART0_RX+1,
418 .flags = IORESOURCE_DMA,
419 },
420 };
421
422 static struct platform_device bfin_sir0_device = {
423 .name = "bfin_sir",
424 .id = 0,
425 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
426 .resource = bfin_sir0_resources,
427 };
428 #endif
429 #ifdef CONFIG_BFIN_SIR1
430 static struct resource bfin_sir1_resources[] = {
431 {
432 .start = 0xFFC02000,
433 .end = 0xFFC020FF,
434 .flags = IORESOURCE_MEM,
435 },
436 {
437 .start = IRQ_UART1_RX,
438 .end = IRQ_UART1_RX+1,
439 .flags = IORESOURCE_IRQ,
440 },
441 {
442 .start = CH_UART1_RX,
443 .end = CH_UART1_RX+1,
444 .flags = IORESOURCE_DMA,
445 },
446 };
447
448 static struct platform_device bfin_sir1_device = {
449 .name = "bfin_sir",
450 .id = 1,
451 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
452 .resource = bfin_sir1_resources,
453 };
454 #endif
455 #endif
456
457 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
458 static struct resource bfin_twi0_resource[] = {
459 [0] = {
460 .start = TWI0_REGBASE,
461 .end = TWI0_REGBASE,
462 .flags = IORESOURCE_MEM,
463 },
464 [1] = {
465 .start = IRQ_TWI,
466 .end = IRQ_TWI,
467 .flags = IORESOURCE_IRQ,
468 },
469 };
470
471 static struct platform_device i2c_bfin_twi_device = {
472 .name = "i2c-bfin-twi",
473 .id = 0,
474 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
475 .resource = bfin_twi0_resource,
476 };
477 #endif
478
479 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
480 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
481 {
482 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
483 },
484 #endif
485 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
486 {
487 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
488 .irq = IRQ_PF8,
489 },
490 #endif
491 };
492
493 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
494 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
495 static struct resource bfin_sport0_uart_resources[] = {
496 {
497 .start = SPORT0_TCR1,
498 .end = SPORT0_MRCS3+4,
499 .flags = IORESOURCE_MEM,
500 },
501 {
502 .start = IRQ_SPORT0_RX,
503 .end = IRQ_SPORT0_RX+1,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = IRQ_SPORT0_ERROR,
508 .end = IRQ_SPORT0_ERROR,
509 .flags = IORESOURCE_IRQ,
510 },
511 };
512
513 static unsigned short bfin_sport0_peripherals[] = {
514 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
515 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
516 };
517
518 static struct platform_device bfin_sport0_uart_device = {
519 .name = "bfin-sport-uart",
520 .id = 0,
521 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
522 .resource = bfin_sport0_uart_resources,
523 .dev = {
524 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
525 },
526 };
527 #endif
528 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
529 static struct resource bfin_sport1_uart_resources[] = {
530 {
531 .start = SPORT1_TCR1,
532 .end = SPORT1_MRCS3+4,
533 .flags = IORESOURCE_MEM,
534 },
535 {
536 .start = IRQ_SPORT1_RX,
537 .end = IRQ_SPORT1_RX+1,
538 .flags = IORESOURCE_IRQ,
539 },
540 {
541 .start = IRQ_SPORT1_ERROR,
542 .end = IRQ_SPORT1_ERROR,
543 .flags = IORESOURCE_IRQ,
544 },
545 };
546
547 static unsigned short bfin_sport1_peripherals[] = {
548 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
549 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
550 };
551
552 static struct platform_device bfin_sport1_uart_device = {
553 .name = "bfin-sport-uart",
554 .id = 1,
555 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
556 .resource = bfin_sport1_uart_resources,
557 .dev = {
558 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
559 },
560 };
561 #endif
562 #endif
563
564 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
565 #include <linux/input.h>
566 #include <linux/gpio_keys.h>
567
568 static struct gpio_keys_button bfin_gpio_keys_table[] = {
569 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
570 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
571 };
572
573 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
574 .buttons = bfin_gpio_keys_table,
575 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
576 };
577
578 static struct platform_device bfin_device_gpiokeys = {
579 .name = "gpio-keys",
580 .dev = {
581 .platform_data = &bfin_gpio_keys_data,
582 },
583 };
584 #endif
585
586 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
587
588 static struct bfin_sd_host bfin_sdh_data = {
589 .dma_chan = CH_RSI,
590 .irq_int0 = IRQ_RSI_INT0,
591 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
592 };
593
594 static struct platform_device bf51x_sdh_device = {
595 .name = "bfin-sdh",
596 .id = 0,
597 .dev = {
598 .platform_data = &bfin_sdh_data,
599 },
600 };
601 #endif
602
603 static const unsigned int cclk_vlev_datasheet[] =
604 {
605 VRPAIR(VLEV_100, 400000000),
606 VRPAIR(VLEV_105, 426000000),
607 VRPAIR(VLEV_110, 500000000),
608 VRPAIR(VLEV_115, 533000000),
609 VRPAIR(VLEV_120, 600000000),
610 };
611
612 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
613 .tuple_tab = cclk_vlev_datasheet,
614 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
615 .vr_settling_time = 25 /* us */,
616 };
617
618 static struct platform_device bfin_dpmc = {
619 .name = "bfin dpmc",
620 .dev = {
621 .platform_data = &bfin_dmpc_vreg_data,
622 },
623 };
624
625 static struct platform_device *tcm_devices[] __initdata = {
626
627 &bfin_dpmc,
628
629 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
630 &rtc_device,
631 #endif
632
633 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
634 &bfin_mii_bus,
635 &bfin_mac_device,
636 #endif
637
638 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
639 &bfin_spi0_device,
640 &bfin_spi1_device,
641 #endif
642
643 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
644 #ifdef CONFIG_SERIAL_BFIN_UART0
645 &bfin_uart0_device,
646 #endif
647 #ifdef CONFIG_SERIAL_BFIN_UART1
648 &bfin_uart1_device,
649 #endif
650 #endif
651
652 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
653 #ifdef CONFIG_BFIN_SIR0
654 &bfin_sir0_device,
655 #endif
656 #ifdef CONFIG_BFIN_SIR1
657 &bfin_sir1_device,
658 #endif
659 #endif
660
661 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
662 &i2c_bfin_twi_device,
663 #endif
664
665 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
666 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
667 &bfin_sport0_uart_device,
668 #endif
669 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
670 &bfin_sport1_uart_device,
671 #endif
672 #endif
673
674 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
675 &bfin_device_gpiokeys,
676 #endif
677
678 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
679 &bf51x_sdh_device,
680 #endif
681
682 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
683 &tcm_flash_device,
684 #endif
685 };
686
tcm_init(void)687 static int __init tcm_init(void)
688 {
689 printk(KERN_INFO "%s(): registering device resources\n", __func__);
690 i2c_register_board_info(0, bfin_i2c_board_info,
691 ARRAY_SIZE(bfin_i2c_board_info));
692 platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
693 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
694 return 0;
695 }
696
697 arch_initcall(tcm_init);
698
699 static struct platform_device *tcm_early_devices[] __initdata = {
700 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
701 #ifdef CONFIG_SERIAL_BFIN_UART0
702 &bfin_uart0_device,
703 #endif
704 #ifdef CONFIG_SERIAL_BFIN_UART1
705 &bfin_uart1_device,
706 #endif
707 #endif
708
709 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
710 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
711 &bfin_sport0_uart_device,
712 #endif
713 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
714 &bfin_sport1_uart_device,
715 #endif
716 #endif
717 };
718
native_machine_early_platform_add_devices(void)719 void __init native_machine_early_platform_add_devices(void)
720 {
721 printk(KERN_INFO "register early platform devices\n");
722 early_platform_add_devices(tcm_early_devices,
723 ARRAY_SIZE(tcm_early_devices));
724 }
725
native_machine_restart(char * cmd)726 void native_machine_restart(char *cmd)
727 {
728 /* workaround reboot hang when booting from SPI */
729 if ((bfin_read_SYSCR() & 0x7) == 0x3)
730 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
731 }
732
bfin_get_ether_addr(char * addr)733 int bfin_get_ether_addr(char *addr)
734 {
735 return 1;
736 }
737 EXPORT_SYMBOL(bfin_get_ether_addr);
738