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Searched refs:REG_ADDR (Results 1 – 25 of 130) sorted by relevance

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/arch/cris/arch-v32/mach-fs/
Dhw_settings.S32 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
34 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
36 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg)
38 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg)
40 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0)
42 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1)
44 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing)
46 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd)
49 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
51 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
[all …]
Dio.c24 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe),
25 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout),
26 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din),
30 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe),
31 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout),
32 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din),
36 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe),
37 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout),
38 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din),
42 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pd_oe),
[all …]
Ddram_init.S28 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
31 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0
68 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
72 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5
98 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
/arch/cris/arch-v32/mach-a3/
Dhw_settings.S32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg)
34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency)
36 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
40 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
42 .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
44 .dword REG_ADDR(gio, regi_gio, rw_pb_dout)
46 .dword REG_ADDR(gio, regi_gio, rw_pb_oe)
48 .dword REG_ADDR(gio, regi_gio, rw_pc_dout)
50 .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
Dio.c20 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_oe),
21 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pa_dout),
22 (unsigned long *)REG_ADDR(gio, regi_gio, r_pa_din),
26 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_oe),
27 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pb_dout),
28 (unsigned long *)REG_ADDR(gio, regi_gio, r_pb_din),
32 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_oe),
33 (unsigned long *)REG_ADDR(gio, regi_gio, rw_pc_dout),
34 (unsigned long *)REG_ADDR(gio, regi_gio, r_pc_din),
Ddram_init.S33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0
74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0
79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0
84 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg), $r0
/arch/cris/include/arch-v32/mach-fs/mach/
Dstartup.inc11 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
15 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
19 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
23 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
27 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
31 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
35 move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
39 move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
43 move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
47 move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
[all …]
/arch/cris/include/arch-v32/mach-a3/mach/
Dstartup.inc19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
31 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
35 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
39 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
43 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1
45 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1
52 move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
60 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
[all …]
/arch/cris/arch-v32/drivers/mach-a3/
Dnandflash.c67 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
71 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
75 this->IO_ADDR_W = (void __iomem *)REG_ADDR(pio, in crisv32_hwcontrol()
146 read_cs = write_cs = (void __iomem *)REG_ADDR(pio, regi_pio, in crisv32_nand_flash_probe()
/arch/cris/include/arch-v32/arch/hwregs/iop/asm/
Diop_version_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_scrc_in_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_scrc_out_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/
Diop_version_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Diop_sap_in_defs_asm.h40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/arch/hwregs/asm/
Dirq_nmi_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dstrcop_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dcris_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dstrmux_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
Dconfig_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/arch/hwregs/
Dstrcop_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
Dirq_nmi_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \ macro
/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/arch/cris/include/arch-v32/mach-fs/mach/hwregs/asm/
Dconfig_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
Dstrmux_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro

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