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1 /* linux/arch/arm/mach-s5p64x0/dma.c
2  *
3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4  *		http://www.samsung.com
5  *
6  * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7  *	Jaswinder Singh <jassi.brar@samsung.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23 
24 #include <linux/dma-mapping.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl330.h>
27 
28 #include <asm/irq.h>
29 
30 #include <mach/map.h>
31 #include <mach/irqs.h>
32 #include <mach/regs-clock.h>
33 #include <mach/dma.h>
34 
35 #include <plat/cpu.h>
36 #include <plat/devs.h>
37 #include <plat/irqs.h>
38 
39 static u64 dma_dmamask = DMA_BIT_MASK(32);
40 
41 static u8 s5p6440_pdma_peri[] = {
42 	DMACH_UART0_RX,
43 	DMACH_UART0_TX,
44 	DMACH_UART1_RX,
45 	DMACH_UART1_TX,
46 	DMACH_UART2_RX,
47 	DMACH_UART2_TX,
48 	DMACH_UART3_RX,
49 	DMACH_UART3_TX,
50 	DMACH_MAX,
51 	DMACH_MAX,
52 	DMACH_PCM0_TX,
53 	DMACH_PCM0_RX,
54 	DMACH_I2S0_TX,
55 	DMACH_I2S0_RX,
56 	DMACH_SPI0_TX,
57 	DMACH_SPI0_RX,
58 	DMACH_MAX,
59 	DMACH_MAX,
60 	DMACH_MAX,
61 	DMACH_MAX,
62 	DMACH_SPI1_TX,
63 	DMACH_SPI1_RX,
64 };
65 
66 static struct dma_pl330_platdata s5p6440_pdma_pdata = {
67 	.nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
68 	.peri_id = s5p6440_pdma_peri,
69 };
70 
71 static u8 s5p6450_pdma_peri[] = {
72 	DMACH_UART0_RX,
73 	DMACH_UART0_TX,
74 	DMACH_UART1_RX,
75 	DMACH_UART1_TX,
76 	DMACH_UART2_RX,
77 	DMACH_UART2_TX,
78 	DMACH_UART3_RX,
79 	DMACH_UART3_TX,
80 	DMACH_UART4_RX,
81 	DMACH_UART4_TX,
82 	DMACH_PCM0_TX,
83 	DMACH_PCM0_RX,
84 	DMACH_I2S0_TX,
85 	DMACH_I2S0_RX,
86 	DMACH_SPI0_TX,
87 	DMACH_SPI0_RX,
88 	DMACH_PCM1_TX,
89 	DMACH_PCM1_RX,
90 	DMACH_PCM2_TX,
91 	DMACH_PCM2_RX,
92 	DMACH_SPI1_TX,
93 	DMACH_SPI1_RX,
94 	DMACH_USI_TX,
95 	DMACH_USI_RX,
96 	DMACH_MAX,
97 	DMACH_I2S1_TX,
98 	DMACH_I2S1_RX,
99 	DMACH_I2S2_TX,
100 	DMACH_I2S2_RX,
101 	DMACH_PWM,
102 	DMACH_UART5_RX,
103 	DMACH_UART5_TX,
104 };
105 
106 static struct dma_pl330_platdata s5p6450_pdma_pdata = {
107 	.nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
108 	.peri_id = s5p6450_pdma_peri,
109 };
110 
111 static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330,
112 	S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL);
113 
s5p64x0_dma_init(void)114 static int __init s5p64x0_dma_init(void)
115 {
116 	if (soc_is_s5p6450()) {
117 		dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
118 		dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
119 		s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
120 	} else {
121 		dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
122 		dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
123 		s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
124 	}
125 
126 	amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
127 
128 	return 0;
129 }
130 arch_initcall(s5p64x0_dma_init);
131