1 /*
2 * linux/arch/arm/mach-sa1100/assabet.c
3 *
4 * Author: Nicolas Pitre
5 *
6 * This file contains all Assabet-specific tweaks.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/ioport.h>
17 #include <linux/serial_core.h>
18 #include <linux/mfd/ucb1x00.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/delay.h>
22 #include <linux/mm.h>
23
24 #include <video/sa1100fb.h>
25
26 #include <mach/hardware.h>
27 #include <asm/mach-types.h>
28 #include <asm/setup.h>
29 #include <asm/page.h>
30 #include <asm/pgtable-hwdef.h>
31 #include <asm/pgtable.h>
32 #include <asm/tlbflush.h>
33
34 #include <asm/mach/arch.h>
35 #include <asm/mach/flash.h>
36 #include <asm/mach/irda.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/serial_sa1100.h>
39 #include <mach/assabet.h>
40 #include <mach/mcp.h>
41 #include <mach/irqs.h>
42
43 #include "generic.h"
44
45 #define ASSABET_BCR_DB1110 \
46 (ASSABET_BCR_SPK_OFF | \
47 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
48 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
49 ASSABET_BCR_IRDA_MD0)
50
51 #define ASSABET_BCR_DB1111 \
52 (ASSABET_BCR_SPK_OFF | \
53 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
54 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
55 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
56 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
57
58 unsigned long SCR_value = ASSABET_SCR_INIT;
59 EXPORT_SYMBOL(SCR_value);
60
61 static unsigned long BCR_value = ASSABET_BCR_DB1110;
62
ASSABET_BCR_frob(unsigned int mask,unsigned int val)63 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
64 {
65 unsigned long flags;
66
67 local_irq_save(flags);
68 BCR_value = (BCR_value & ~mask) | val;
69 ASSABET_BCR = BCR_value;
70 local_irq_restore(flags);
71 }
72
73 EXPORT_SYMBOL(ASSABET_BCR_frob);
74
assabet_ucb1x00_reset(enum ucb1x00_reset state)75 static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
76 {
77 if (state == UCB_RST_PROBE)
78 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
79 }
80
81
82 /*
83 * Assabet flash support code.
84 */
85
86 #ifdef ASSABET_REV_4
87 /*
88 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
89 */
90 static struct mtd_partition assabet_partitions[] = {
91 {
92 .name = "bootloader",
93 .size = 0x00020000,
94 .offset = 0,
95 .mask_flags = MTD_WRITEABLE,
96 }, {
97 .name = "bootloader params",
98 .size = 0x00020000,
99 .offset = MTDPART_OFS_APPEND,
100 .mask_flags = MTD_WRITEABLE,
101 }, {
102 .name = "jffs",
103 .size = MTDPART_SIZ_FULL,
104 .offset = MTDPART_OFS_APPEND,
105 }
106 };
107 #else
108 /*
109 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
110 */
111 static struct mtd_partition assabet_partitions[] = {
112 {
113 .name = "bootloader",
114 .size = 0x00040000,
115 .offset = 0,
116 .mask_flags = MTD_WRITEABLE,
117 }, {
118 .name = "bootloader params",
119 .size = 0x00040000,
120 .offset = MTDPART_OFS_APPEND,
121 .mask_flags = MTD_WRITEABLE,
122 }, {
123 .name = "jffs",
124 .size = MTDPART_SIZ_FULL,
125 .offset = MTDPART_OFS_APPEND,
126 }
127 };
128 #endif
129
130 static struct flash_platform_data assabet_flash_data = {
131 .map_name = "cfi_probe",
132 .parts = assabet_partitions,
133 .nr_parts = ARRAY_SIZE(assabet_partitions),
134 };
135
136 static struct resource assabet_flash_resources[] = {
137 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
138 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
139 };
140
141
142 /*
143 * Assabet IrDA support code.
144 */
145
assabet_irda_set_power(struct device * dev,unsigned int state)146 static int assabet_irda_set_power(struct device *dev, unsigned int state)
147 {
148 static unsigned int bcr_state[4] = {
149 ASSABET_BCR_IRDA_MD0,
150 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
151 ASSABET_BCR_IRDA_MD1,
152 0
153 };
154
155 if (state < 4) {
156 state = bcr_state[state];
157 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
158 ASSABET_BCR_IRDA_MD0));
159 ASSABET_BCR_set(state);
160 }
161 return 0;
162 }
163
assabet_irda_set_speed(struct device * dev,unsigned int speed)164 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
165 {
166 if (speed < 4000000)
167 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
168 else
169 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
170 }
171
172 static struct irda_platform_data assabet_irda_data = {
173 .set_power = assabet_irda_set_power,
174 .set_speed = assabet_irda_set_speed,
175 };
176
177 static struct ucb1x00_plat_data assabet_ucb1x00_data = {
178 .reset = assabet_ucb1x00_reset,
179 .gpio_base = -1,
180 };
181
182 static struct mcp_plat_data assabet_mcp_data = {
183 .mccr0 = MCCR0_ADM,
184 .sclk_rate = 11981000,
185 .codec_pdata = &assabet_ucb1x00_data,
186 };
187
assabet_lcd_set_visual(u32 visual)188 static void assabet_lcd_set_visual(u32 visual)
189 {
190 u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
191
192 if (machine_is_assabet()) {
193 #if 1 // phase 4 or newer Assabet's
194 if (is_true_color)
195 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
196 else
197 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
198 #else
199 // older Assabet's
200 if (is_true_color)
201 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
202 else
203 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
204 #endif
205 }
206 }
207
208 #ifndef ASSABET_PAL_VIDEO
assabet_lcd_backlight_power(int on)209 static void assabet_lcd_backlight_power(int on)
210 {
211 if (on)
212 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
213 else
214 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
215 }
216
217 /*
218 * Turn on/off the backlight. When turning the backlight on, we wait
219 * 500us after turning it on so we don't cause the supplies to droop
220 * when we enable the LCD controller (and cause a hard reset.)
221 */
assabet_lcd_power(int on)222 static void assabet_lcd_power(int on)
223 {
224 if (on) {
225 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
226 udelay(500);
227 } else
228 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
229 }
230
231 /*
232 * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
233 * takes an RGB666 signal, but we provide it with an RGB565 signal
234 * instead (def_rgb_16).
235 */
236 static struct sa1100fb_mach_info lq039q2ds54_info = {
237 .pixclock = 171521, .bpp = 16,
238 .xres = 320, .yres = 240,
239
240 .hsync_len = 5, .vsync_len = 1,
241 .left_margin = 61, .upper_margin = 3,
242 .right_margin = 9, .lower_margin = 0,
243
244 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
245
246 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
247 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
248
249 .backlight_power = assabet_lcd_backlight_power,
250 .lcd_power = assabet_lcd_power,
251 .set_visual = assabet_lcd_set_visual,
252 };
253 #else
assabet_pal_backlight_power(int on)254 static void assabet_pal_backlight_power(int on)
255 {
256 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
257 }
258
assabet_pal_power(int on)259 static void assabet_pal_power(int on)
260 {
261 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
262 }
263
264 static struct sa1100fb_mach_info pal_info = {
265 .pixclock = 67797, .bpp = 16,
266 .xres = 640, .yres = 512,
267
268 .hsync_len = 64, .vsync_len = 6,
269 .left_margin = 125, .upper_margin = 70,
270 .right_margin = 115, .lower_margin = 36,
271
272 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
273 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
274
275 .backlight_power = assabet_pal_backlight_power,
276 .lcd_power = assabet_pal_power,
277 .set_visual = assabet_lcd_set_visual,
278 };
279 #endif
280
281 #ifdef CONFIG_ASSABET_NEPONSET
282 static struct resource neponset_resources[] = {
283 DEFINE_RES_MEM(0x10000000, 0x08000000),
284 DEFINE_RES_MEM(0x18000000, 0x04000000),
285 DEFINE_RES_MEM(0x40000000, SZ_8K),
286 DEFINE_RES_IRQ(IRQ_GPIO25),
287 };
288 #endif
289
assabet_init(void)290 static void __init assabet_init(void)
291 {
292 /*
293 * Ensure that the power supply is in "high power" mode.
294 */
295 GPSR = GPIO_GPIO16;
296 GPDR |= GPIO_GPIO16;
297
298 /*
299 * Ensure that these pins are set as outputs and are driving
300 * logic 0. This ensures that we won't inadvertently toggle
301 * the WS latch in the CPLD, and we don't float causing
302 * excessive power drain. --rmk
303 */
304 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
305 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
306
307 /*
308 * Also set GPIO27 as an output; this is used to clock UART3
309 * via the FPGA and as otherwise has no pullups or pulldowns,
310 * so stop it floating.
311 */
312 GPCR = GPIO_GPIO27;
313 GPDR |= GPIO_GPIO27;
314
315 /*
316 * Set up registers for sleep mode.
317 */
318 PWER = PWER_GPIO0;
319 PGSR = 0;
320 PCFR = 0;
321 PSDR = 0;
322 PPDR |= PPC_TXD3 | PPC_TXD1;
323 PPSR |= PPC_TXD3 | PPC_TXD1;
324
325 sa11x0_ppc_configure_mcp();
326
327 if (machine_has_neponset()) {
328 /*
329 * Angel sets this, but other bootloaders may not.
330 *
331 * This must precede any driver calls to BCR_set()
332 * or BCR_clear().
333 */
334 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
335
336 #ifndef CONFIG_ASSABET_NEPONSET
337 printk( "Warning: Neponset detected but full support "
338 "hasn't been configured in the kernel\n" );
339 #else
340 platform_device_register_simple("neponset", 0,
341 neponset_resources, ARRAY_SIZE(neponset_resources));
342 #endif
343 }
344
345 #ifndef ASSABET_PAL_VIDEO
346 sa11x0_register_lcd(&lq039q2ds54_info);
347 #else
348 sa11x0_register_lcd(&pal_video);
349 #endif
350 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
351 ARRAY_SIZE(assabet_flash_resources));
352 sa11x0_register_irda(&assabet_irda_data);
353 sa11x0_register_mcp(&assabet_mcp_data);
354 }
355
356 /*
357 * On Assabet, we must probe for the Neponset board _before_
358 * paging_init() has occurred to actually determine the amount
359 * of RAM available. To do so, we map the appropriate IO section
360 * in the page table here in order to access GPIO registers.
361 */
map_sa1100_gpio_regs(void)362 static void __init map_sa1100_gpio_regs( void )
363 {
364 unsigned long phys = __PREG(GPLR) & PMD_MASK;
365 unsigned long virt = io_p2v(phys);
366 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
367 pmd_t *pmd;
368
369 pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
370 *pmd = __pmd(phys | prot);
371 flush_pmd_entry(pmd);
372 }
373
374 /*
375 * Read System Configuration "Register"
376 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
377 * User's Guide", section 4.4.1)
378 *
379 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
380 * to set up the serial port for decompression status messages. We
381 * repeat it here because the kernel may not be loaded as a zImage, and
382 * also because it's a hassle to communicate the SCR value to the kernel
383 * from the decompressor.
384 *
385 * Note that IRQs are guaranteed to be disabled.
386 */
get_assabet_scr(void)387 static void __init get_assabet_scr(void)
388 {
389 unsigned long scr, i;
390
391 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
392 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
393 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
394 for(i = 100; i--; ) /* Read GPIO 9:2 */
395 scr = GPLR;
396 GPDR |= 0x3fc; /* restore correct pin direction */
397 scr &= 0x3fc; /* save as system configuration byte. */
398 SCR_value = scr;
399 }
400
401 static void __init
fixup_assabet(struct tag * tags,char ** cmdline,struct meminfo * mi)402 fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
403 {
404 /* This must be done before any call to machine_has_neponset() */
405 map_sa1100_gpio_regs();
406 get_assabet_scr();
407
408 if (machine_has_neponset())
409 printk("Neponset expansion board detected\n");
410 }
411
412
assabet_uart_pm(struct uart_port * port,u_int state,u_int oldstate)413 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
414 {
415 if (port->mapbase == _Ser1UTCR0) {
416 if (state)
417 ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
418 ASSABET_BCR_COM_RTS |
419 ASSABET_BCR_COM_DTR);
420 else
421 ASSABET_BCR_set(ASSABET_BCR_RS232EN |
422 ASSABET_BCR_COM_RTS |
423 ASSABET_BCR_COM_DTR);
424 }
425 }
426
427 /*
428 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
429 * and UART3 (radio module). We only handle them for UART1 here.
430 */
assabet_set_mctrl(struct uart_port * port,u_int mctrl)431 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
432 {
433 if (port->mapbase == _Ser1UTCR0) {
434 u_int set = 0, clear = 0;
435
436 if (mctrl & TIOCM_RTS)
437 clear |= ASSABET_BCR_COM_RTS;
438 else
439 set |= ASSABET_BCR_COM_RTS;
440
441 if (mctrl & TIOCM_DTR)
442 clear |= ASSABET_BCR_COM_DTR;
443 else
444 set |= ASSABET_BCR_COM_DTR;
445
446 ASSABET_BCR_clear(clear);
447 ASSABET_BCR_set(set);
448 }
449 }
450
assabet_get_mctrl(struct uart_port * port)451 static u_int assabet_get_mctrl(struct uart_port *port)
452 {
453 u_int ret = 0;
454 u_int bsr = ASSABET_BSR;
455
456 /* need 2 reads to read current value */
457 bsr = ASSABET_BSR;
458
459 if (port->mapbase == _Ser1UTCR0) {
460 if (bsr & ASSABET_BSR_COM_DCD)
461 ret |= TIOCM_CD;
462 if (bsr & ASSABET_BSR_COM_CTS)
463 ret |= TIOCM_CTS;
464 if (bsr & ASSABET_BSR_COM_DSR)
465 ret |= TIOCM_DSR;
466 } else if (port->mapbase == _Ser3UTCR0) {
467 if (bsr & ASSABET_BSR_RAD_DCD)
468 ret |= TIOCM_CD;
469 if (bsr & ASSABET_BSR_RAD_CTS)
470 ret |= TIOCM_CTS;
471 if (bsr & ASSABET_BSR_RAD_DSR)
472 ret |= TIOCM_DSR;
473 if (bsr & ASSABET_BSR_RAD_RI)
474 ret |= TIOCM_RI;
475 } else {
476 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
477 }
478
479 return ret;
480 }
481
482 static struct sa1100_port_fns assabet_port_fns __initdata = {
483 .set_mctrl = assabet_set_mctrl,
484 .get_mctrl = assabet_get_mctrl,
485 .pm = assabet_uart_pm,
486 };
487
488 static struct map_desc assabet_io_desc[] __initdata = {
489 { /* Board Control Register */
490 .virtual = 0xf1000000,
491 .pfn = __phys_to_pfn(0x12000000),
492 .length = 0x00100000,
493 .type = MT_DEVICE
494 }, { /* MQ200 */
495 .virtual = 0xf2800000,
496 .pfn = __phys_to_pfn(0x4b800000),
497 .length = 0x00800000,
498 .type = MT_DEVICE
499 }
500 };
501
assabet_map_io(void)502 static void __init assabet_map_io(void)
503 {
504 sa1100_map_io();
505 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
506
507 /*
508 * Set SUS bit in SDCR0 so serial port 1 functions.
509 * Its called GPCLKR0 in my SA1110 manual.
510 */
511 Ser1SDCR0 |= SDCR0_SUS;
512
513 if (!machine_has_neponset())
514 sa1100_register_uart_fns(&assabet_port_fns);
515
516 /*
517 * When Neponset is attached, the first UART should be
518 * UART3. That's what Angel is doing and many documents
519 * are stating this.
520 *
521 * We do the Neponset mapping even if Neponset support
522 * isn't compiled in so the user will still get something on
523 * the expected physical serial port.
524 *
525 * We no longer do this; not all boot loaders support it,
526 * and UART3 appears to be somewhat unreliable with blob.
527 */
528 sa1100_register_uart(0, 1);
529 sa1100_register_uart(2, 3);
530 }
531
532
533 MACHINE_START(ASSABET, "Intel-Assabet")
534 .atag_offset = 0x100,
535 .fixup = fixup_assabet,
536 .map_io = assabet_map_io,
537 .nr_irqs = SA1100_NR_IRQS,
538 .init_irq = sa1100_init_irq,
539 .timer = &sa1100_timer,
540 .init_machine = assabet_init,
541 #ifdef CONFIG_SA1111
542 .dma_zone_size = SZ_1M,
543 #endif
544 .restart = sa11x0_restart,
545 MACHINE_END
546