1 /*
2 * linux/arch/arm/mach-vexpress/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/smp.h>
14 #include <linux/io.h>
15 #include <linux/of_fdt.h>
16
17 #include <asm/smp_scu.h>
18 #include <asm/hardware/gic.h>
19 #include <asm/mach/map.h>
20
21 #include <mach/motherboard.h>
22
23 #include "core.h"
24
25 extern void versatile_secondary_startup(void);
26
27 #if defined(CONFIG_OF)
28
29 static enum {
30 GENERIC_SCU,
31 CORTEX_A9_SCU,
32 } vexpress_dt_scu __initdata = GENERIC_SCU;
33
34 static struct map_desc vexpress_dt_cortex_a9_scu_map __initdata = {
35 .virtual = V2T_PERIPH,
36 /* .pfn set in vexpress_dt_init_cortex_a9_scu() */
37 .length = SZ_128,
38 .type = MT_DEVICE,
39 };
40
41 static void *vexpress_dt_cortex_a9_scu_base __initdata;
42
43 const static char *vexpress_dt_cortex_a9_match[] __initconst = {
44 "arm,cortex-a5-scu",
45 "arm,cortex-a9-scu",
46 NULL
47 };
48
vexpress_dt_find_scu(unsigned long node,const char * uname,int depth,void * data)49 static int __init vexpress_dt_find_scu(unsigned long node,
50 const char *uname, int depth, void *data)
51 {
52 if (of_flat_dt_match(node, vexpress_dt_cortex_a9_match)) {
53 phys_addr_t phys_addr;
54 __be32 *reg = of_get_flat_dt_prop(node, "reg", NULL);
55
56 if (WARN_ON(!reg))
57 return -EINVAL;
58
59 phys_addr = be32_to_cpup(reg);
60 vexpress_dt_scu = CORTEX_A9_SCU;
61
62 vexpress_dt_cortex_a9_scu_map.pfn = __phys_to_pfn(phys_addr);
63 iotable_init(&vexpress_dt_cortex_a9_scu_map, 1);
64 vexpress_dt_cortex_a9_scu_base = ioremap(phys_addr, SZ_256);
65 if (WARN_ON(!vexpress_dt_cortex_a9_scu_base))
66 return -EFAULT;
67 }
68
69 return 0;
70 }
71
vexpress_dt_smp_map_io(void)72 void __init vexpress_dt_smp_map_io(void)
73 {
74 if (initial_boot_params)
75 WARN_ON(of_scan_flat_dt(vexpress_dt_find_scu, NULL));
76 }
77
vexpress_dt_cpus_num(unsigned long node,const char * uname,int depth,void * data)78 static int __init vexpress_dt_cpus_num(unsigned long node, const char *uname,
79 int depth, void *data)
80 {
81 static int prev_depth = -1;
82 static int nr_cpus = -1;
83
84 if (prev_depth > depth && nr_cpus > 0)
85 return nr_cpus;
86
87 if (nr_cpus < 0 && strcmp(uname, "cpus") == 0)
88 nr_cpus = 0;
89
90 if (nr_cpus >= 0) {
91 const char *device_type = of_get_flat_dt_prop(node,
92 "device_type", NULL);
93
94 if (device_type && strcmp(device_type, "cpu") == 0)
95 nr_cpus++;
96 }
97
98 prev_depth = depth;
99
100 return 0;
101 }
102
vexpress_dt_smp_init_cpus(void)103 static void __init vexpress_dt_smp_init_cpus(void)
104 {
105 int ncores = 0, i;
106
107 switch (vexpress_dt_scu) {
108 case GENERIC_SCU:
109 ncores = of_scan_flat_dt(vexpress_dt_cpus_num, NULL);
110 break;
111 case CORTEX_A9_SCU:
112 ncores = scu_get_core_count(vexpress_dt_cortex_a9_scu_base);
113 break;
114 default:
115 WARN_ON(1);
116 break;
117 }
118
119 if (ncores < 2)
120 return;
121
122 if (ncores > nr_cpu_ids) {
123 pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
124 ncores, nr_cpu_ids);
125 ncores = nr_cpu_ids;
126 }
127
128 for (i = 0; i < ncores; ++i)
129 set_cpu_possible(i, true);
130
131 set_smp_cross_call(gic_raise_softirq);
132 }
133
vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)134 static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
135 {
136 int i;
137
138 switch (vexpress_dt_scu) {
139 case GENERIC_SCU:
140 for (i = 0; i < max_cpus; i++)
141 set_cpu_present(i, true);
142 break;
143 case CORTEX_A9_SCU:
144 scu_enable(vexpress_dt_cortex_a9_scu_base);
145 break;
146 default:
147 WARN_ON(1);
148 break;
149 }
150 }
151
152 #else
153
vexpress_dt_smp_init_cpus(void)154 static void __init vexpress_dt_smp_init_cpus(void)
155 {
156 WARN_ON(1);
157 }
158
vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)159 void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
160 {
161 WARN_ON(1);
162 }
163
164 #endif
165
166 /*
167 * Initialise the CPU possible map early - this describes the CPUs
168 * which may be present or become present in the system.
169 */
smp_init_cpus(void)170 void __init smp_init_cpus(void)
171 {
172 if (ct_desc)
173 ct_desc->init_cpu_map();
174 else
175 vexpress_dt_smp_init_cpus();
176
177 }
178
platform_smp_prepare_cpus(unsigned int max_cpus)179 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
180 {
181 /*
182 * Initialise the present map, which describes the set of CPUs
183 * actually populated at the present time.
184 */
185 if (ct_desc)
186 ct_desc->smp_enable(max_cpus);
187 else
188 vexpress_dt_smp_prepare_cpus(max_cpus);
189
190 /*
191 * Write the address of secondary startup into the
192 * system-wide flags register. The boot monitor waits
193 * until it receives a soft interrupt, and then the
194 * secondary CPU branches to this address.
195 */
196 v2m_flags_set(virt_to_phys(versatile_secondary_startup));
197 }
198