1 /* linux/arch/arm/plat-s5p/irq-pm.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/plat-s3c24xx/irq-pm.c,
7 * Copyright (c) 2003,2004 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19
20 #include <plat/cpu.h>
21 #include <plat/irqs.h>
22 #include <plat/pm.h>
23 #include <mach/map.h>
24
25 #include <mach/regs-gpio.h>
26 #include <mach/regs-irq.h>
27
28 /* state for IRQs over sleep */
29
30 /* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
31 * as wakeup sources
32 *
33 * set bit to 1 in allow bitfield to enable the wakeup settings on it
34 */
35
36 unsigned long s3c_irqwake_intallow = 0x00000006L;
37 unsigned long s3c_irqwake_eintallow = 0xffffffffL;
38
s3c_irq_wake(struct irq_data * data,unsigned int state)39 int s3c_irq_wake(struct irq_data *data, unsigned int state)
40 {
41 unsigned long irqbit;
42 unsigned int irq_rtc_tic, irq_rtc_alarm;
43
44 #ifdef CONFIG_ARCH_EXYNOS
45 if (soc_is_exynos5250()) {
46 irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
47 irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
48 } else {
49 irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
50 irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
51 }
52 #else
53 irq_rtc_tic = IRQ_RTC_TIC;
54 irq_rtc_alarm = IRQ_RTC_ALARM;
55 #endif
56
57 if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
58 irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
59
60 if (!state)
61 s3c_irqwake_intmask |= irqbit;
62 else
63 s3c_irqwake_intmask &= ~irqbit;
64 } else {
65 return -ENOENT;
66 }
67
68 return 0;
69 }
70
71 static struct sleep_save eint_save[] = {
72 SAVE_ITEM(S5P_EINT_CON(0)),
73 SAVE_ITEM(S5P_EINT_CON(1)),
74 SAVE_ITEM(S5P_EINT_CON(2)),
75 SAVE_ITEM(S5P_EINT_CON(3)),
76
77 SAVE_ITEM(S5P_EINT_FLTCON(0)),
78 SAVE_ITEM(S5P_EINT_FLTCON(1)),
79 SAVE_ITEM(S5P_EINT_FLTCON(2)),
80 SAVE_ITEM(S5P_EINT_FLTCON(3)),
81 SAVE_ITEM(S5P_EINT_FLTCON(4)),
82 SAVE_ITEM(S5P_EINT_FLTCON(5)),
83 SAVE_ITEM(S5P_EINT_FLTCON(6)),
84 SAVE_ITEM(S5P_EINT_FLTCON(7)),
85
86 SAVE_ITEM(S5P_EINT_MASK(0)),
87 SAVE_ITEM(S5P_EINT_MASK(1)),
88 SAVE_ITEM(S5P_EINT_MASK(2)),
89 SAVE_ITEM(S5P_EINT_MASK(3)),
90 };
91
s3c24xx_irq_suspend(void)92 int s3c24xx_irq_suspend(void)
93 {
94 s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));
95
96 return 0;
97 }
98
s3c24xx_irq_resume(void)99 void s3c24xx_irq_resume(void)
100 {
101 s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
102 }
103
104