1 /*
2 * arch/blackfin/kernel/reboot.c - handle shutdown/reboot
3 *
4 * Copyright 2004-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/interrupt.h>
10 #include <asm/bfin-global.h>
11 #include <asm/reboot.h>
12 #include <asm/bfrom.h>
13
14 /* A system soft reset makes external memory unusable so force
15 * this function into L1. We use the compiler ssync here rather
16 * than SSYNC() because it's safe (no interrupts and such) and
17 * we save some L1. We do not need to force sanity in the SYSCR
18 * register as the BMODE selection bit is cleared by the soft
19 * reset while the Core B bit (on dual core parts) is cleared by
20 * the core reset.
21 */
22 __attribute__ ((__l1_text__, __noreturn__))
bfin_reset(void)23 static void bfin_reset(void)
24 {
25 if (!ANOMALY_05000353 && !ANOMALY_05000386)
26 bfrom_SoftReset((void *)(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 20));
27
28 /* Wait for completion of "system" events such as cache line
29 * line fills so that we avoid infinite stalls later on as
30 * much as possible. This code is in L1, so it won't trigger
31 * any such event after this point in time.
32 */
33 __builtin_bfin_ssync();
34
35 /* Initiate System software reset. */
36 bfin_write_SWRST(0x7);
37
38 /* Due to the way reset is handled in the hardware, we need
39 * to delay for 10 SCLKS. The only reliable way to do this is
40 * to calculate the CCLK/SCLK ratio and multiply 10. For now,
41 * we'll assume worse case which is a 1:15 ratio.
42 */
43 asm(
44 "LSETUP (1f, 1f) LC0 = %0\n"
45 "1: nop;"
46 :
47 : "a" (15 * 10)
48 : "LC0", "LB0", "LT0"
49 );
50
51 /* Clear System software reset */
52 bfin_write_SWRST(0);
53
54 /* The BF526 ROM will crash during reset */
55 #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
56 /* Seems to be fixed with newer parts though ... */
57 if (__SILICON_REVISION__ < 1 && bfin_revid() < 1)
58 bfin_read_SWRST();
59 #endif
60
61 /* Wait for the SWRST write to complete. Cannot rely on SSYNC
62 * though as the System state is all reset now.
63 */
64 asm(
65 "LSETUP (1f, 1f) LC1 = %0\n"
66 "1: nop;"
67 :
68 : "a" (15 * 1)
69 : "LC1", "LB1", "LT1"
70 );
71
72 while (1)
73 /* Issue core reset */
74 asm("raise 1");
75 }
76
77 __attribute__((weak))
native_machine_restart(char * cmd)78 void native_machine_restart(char *cmd)
79 {
80 }
81
machine_restart(char * cmd)82 void machine_restart(char *cmd)
83 {
84 native_machine_restart(cmd);
85 local_irq_disable();
86 if (smp_processor_id())
87 smp_call_function((void *)bfin_reset, 0, 1);
88 else
89 bfin_reset();
90 }
91
92 __attribute__((weak))
native_machine_halt(void)93 void native_machine_halt(void)
94 {
95 idle_with_irq_disabled();
96 }
97
machine_halt(void)98 void machine_halt(void)
99 {
100 native_machine_halt();
101 }
102
103 __attribute__((weak))
native_machine_power_off(void)104 void native_machine_power_off(void)
105 {
106 idle_with_irq_disabled();
107 }
108
machine_power_off(void)109 void machine_power_off(void)
110 {
111 native_machine_power_off();
112 }
113