1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Cambridge Signal Processing
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
17 #include <linux/usb/isp1362.h>
18 #endif
19 #include <linux/ata_platform.h>
20 #include <linux/irq.h>
21 #include <linux/interrupt.h>
22 #include <linux/usb/sl811.h>
23 #include <asm/dma.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
26 #include <asm/portmux.h>
27 #include <linux/spi/ad7877.h>
28
29 /*
30 * Name the Board for the /proc/cpuinfo
31 */
32 const char bfin_board_name[] = "CamSig Minotaur BF537";
33
34 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
35 static struct resource bfin_pcmcia_cf_resources[] = {
36 {
37 .start = 0x20310000, /* IO PORT */
38 .end = 0x20312000,
39 .flags = IORESOURCE_MEM,
40 }, {
41 .start = 0x20311000, /* Attribute Memory */
42 .end = 0x20311FFF,
43 .flags = IORESOURCE_MEM,
44 }, {
45 .start = IRQ_PF4,
46 .end = IRQ_PF4,
47 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
48 }, {
49 .start = IRQ_PF6, /* Card Detect PF6 */
50 .end = IRQ_PF6,
51 .flags = IORESOURCE_IRQ,
52 },
53 };
54
55 static struct platform_device bfin_pcmcia_cf_device = {
56 .name = "bfin_cf_pcmcia",
57 .id = -1,
58 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
59 .resource = bfin_pcmcia_cf_resources,
60 };
61 #endif
62
63 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
64 static struct platform_device rtc_device = {
65 .name = "rtc-bfin",
66 .id = -1,
67 };
68 #endif
69
70 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
71 #include <linux/bfin_mac.h>
72 static const unsigned short bfin_mac_peripherals[] = P_MII0;
73
74 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
75 {
76 .addr = 1,
77 .irq = IRQ_MAC_PHYINT,
78 },
79 };
80
81 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
82 .phydev_number = 1,
83 .phydev_data = bfin_phydev_data,
84 .phy_mode = PHY_INTERFACE_MODE_MII,
85 .mac_peripherals = bfin_mac_peripherals,
86 };
87
88 static struct platform_device bfin_mii_bus = {
89 .name = "bfin_mii_bus",
90 .dev = {
91 .platform_data = &bfin_mii_bus_data,
92 }
93 };
94
95 static struct platform_device bfin_mac_device = {
96 .name = "bfin_mac",
97 .dev = {
98 .platform_data = &bfin_mii_bus,
99 }
100 };
101 #endif
102
103 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
104 static struct resource net2272_bfin_resources[] = {
105 {
106 .start = 0x20300000,
107 .end = 0x20300000 + 0x100,
108 .flags = IORESOURCE_MEM,
109 }, {
110 .start = IRQ_PF7,
111 .end = IRQ_PF7,
112 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
113 },
114 };
115
116 static struct platform_device net2272_bfin_device = {
117 .name = "net2272",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
120 .resource = net2272_bfin_resources,
121 };
122 #endif
123
124 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
125 /* all SPI peripherals info goes here */
126
127 #if defined(CONFIG_MTD_M25P80) \
128 || defined(CONFIG_MTD_M25P80_MODULE)
129
130 /* Partition sizes */
131 #define FLASH_SIZE 0x00400000
132 #define PSIZE_UBOOT 0x00030000
133 #define PSIZE_INITRAMFS 0x00240000
134
135 static struct mtd_partition bfin_spi_flash_partitions[] = {
136 {
137 .name = "bootloader(spi)",
138 .size = PSIZE_UBOOT,
139 .offset = 0x000000,
140 .mask_flags = MTD_CAP_ROM
141 }, {
142 .name = "initramfs(spi)",
143 .size = PSIZE_INITRAMFS,
144 .offset = PSIZE_UBOOT
145 }, {
146 .name = "opt(spi)",
147 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
148 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
149 }
150 };
151
152 static struct flash_platform_data bfin_spi_flash_data = {
153 .name = "m25p80",
154 .parts = bfin_spi_flash_partitions,
155 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
156 .type = "m25p64",
157 };
158
159 /* SPI flash chip (m25p64) */
160 static struct bfin5xx_spi_chip spi_flash_chip_info = {
161 .enable_dma = 0, /* use dma transfer with this chip*/
162 };
163 #endif
164
165 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
166 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
167 .enable_dma = 0,
168 };
169 #endif
170
171 static struct spi_board_info bfin_spi_board_info[] __initdata = {
172 #if defined(CONFIG_MTD_M25P80) \
173 || defined(CONFIG_MTD_M25P80_MODULE)
174 {
175 /* the modalias must be the same as spi device driver name */
176 .modalias = "m25p80", /* Name of spi_driver for this device */
177 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
178 .bus_num = 0, /* Framework bus number */
179 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
180 .platform_data = &bfin_spi_flash_data,
181 .controller_data = &spi_flash_chip_info,
182 .mode = SPI_MODE_3,
183 },
184 #endif
185
186 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
187 {
188 .modalias = "mmc_spi",
189 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
190 .bus_num = 0,
191 .chip_select = 5,
192 .controller_data = &mmc_spi_chip_info,
193 .mode = SPI_MODE_3,
194 },
195 #endif
196 };
197
198 /* SPI controller data */
199 static struct bfin5xx_spi_master bfin_spi0_info = {
200 .num_chipselect = 8,
201 .enable_dma = 1, /* master has the ability to do dma transfer */
202 };
203
204 /* SPI (0) */
205 static struct resource bfin_spi0_resource[] = {
206 [0] = {
207 .start = SPI0_REGBASE,
208 .end = SPI0_REGBASE + 0xFF,
209 .flags = IORESOURCE_MEM,
210 },
211 [1] = {
212 .start = CH_SPI,
213 .end = CH_SPI,
214 .flags = IORESOURCE_DMA,
215 },
216 [2] = {
217 .start = IRQ_SPI,
218 .end = IRQ_SPI,
219 .flags = IORESOURCE_IRQ,
220 },
221 };
222
223 static struct platform_device bfin_spi0_device = {
224 .name = "bfin-spi",
225 .id = 0, /* Bus number */
226 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
227 .resource = bfin_spi0_resource,
228 .dev = {
229 .platform_data = &bfin_spi0_info, /* Passed to driver */
230 },
231 };
232 #endif /* spi master and devices */
233
234 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
235 #ifdef CONFIG_SERIAL_BFIN_UART0
236 static struct resource bfin_uart0_resources[] = {
237 {
238 .start = UART0_THR,
239 .end = UART0_GCTL+2,
240 .flags = IORESOURCE_MEM,
241 },
242 {
243 .start = IRQ_UART0_TX,
244 .end = IRQ_UART0_TX,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = IRQ_UART0_RX,
249 .end = IRQ_UART0_RX,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = IRQ_UART0_ERROR,
254 .end = IRQ_UART0_ERROR,
255 .flags = IORESOURCE_IRQ,
256 },
257 {
258 .start = CH_UART0_TX,
259 .end = CH_UART0_TX,
260 .flags = IORESOURCE_DMA,
261 },
262 {
263 .start = CH_UART0_RX,
264 .end = CH_UART0_RX,
265 .flags = IORESOURCE_DMA,
266 },
267 };
268
269 static unsigned short bfin_uart0_peripherals[] = {
270 P_UART0_TX, P_UART0_RX, 0
271 };
272
273 static struct platform_device bfin_uart0_device = {
274 .name = "bfin-uart",
275 .id = 0,
276 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
277 .resource = bfin_uart0_resources,
278 .dev = {
279 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
280 },
281 };
282 #endif
283 #ifdef CONFIG_SERIAL_BFIN_UART1
284 static struct resource bfin_uart1_resources[] = {
285 {
286 .start = UART1_THR,
287 .end = UART1_GCTL+2,
288 .flags = IORESOURCE_MEM,
289 },
290 {
291 .start = IRQ_UART1_TX,
292 .end = IRQ_UART1_TX,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = IRQ_UART1_RX,
297 .end = IRQ_UART1_RX,
298 .flags = IORESOURCE_IRQ,
299 },
300 {
301 .start = IRQ_UART1_ERROR,
302 .end = IRQ_UART1_ERROR,
303 .flags = IORESOURCE_IRQ,
304 },
305 {
306 .start = CH_UART1_TX,
307 .end = CH_UART1_TX,
308 .flags = IORESOURCE_DMA,
309 },
310 {
311 .start = CH_UART1_RX,
312 .end = CH_UART1_RX,
313 .flags = IORESOURCE_DMA,
314 },
315 };
316
317 static unsigned short bfin_uart1_peripherals[] = {
318 P_UART1_TX, P_UART1_RX, 0
319 };
320
321 static struct platform_device bfin_uart1_device = {
322 .name = "bfin-uart",
323 .id = 1,
324 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
325 .resource = bfin_uart1_resources,
326 .dev = {
327 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
328 },
329 };
330 #endif
331 #endif
332
333 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
334 #ifdef CONFIG_BFIN_SIR0
335 static struct resource bfin_sir0_resources[] = {
336 {
337 .start = 0xFFC00400,
338 .end = 0xFFC004FF,
339 .flags = IORESOURCE_MEM,
340 },
341 {
342 .start = IRQ_UART0_RX,
343 .end = IRQ_UART0_RX+1,
344 .flags = IORESOURCE_IRQ,
345 },
346 {
347 .start = CH_UART0_RX,
348 .end = CH_UART0_RX+1,
349 .flags = IORESOURCE_DMA,
350 },
351 };
352
353 static struct platform_device bfin_sir0_device = {
354 .name = "bfin_sir",
355 .id = 0,
356 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
357 .resource = bfin_sir0_resources,
358 };
359 #endif
360 #ifdef CONFIG_BFIN_SIR1
361 static struct resource bfin_sir1_resources[] = {
362 {
363 .start = 0xFFC02000,
364 .end = 0xFFC020FF,
365 .flags = IORESOURCE_MEM,
366 },
367 {
368 .start = IRQ_UART1_RX,
369 .end = IRQ_UART1_RX+1,
370 .flags = IORESOURCE_IRQ,
371 },
372 {
373 .start = CH_UART1_RX,
374 .end = CH_UART1_RX+1,
375 .flags = IORESOURCE_DMA,
376 },
377 };
378
379 static struct platform_device bfin_sir1_device = {
380 .name = "bfin_sir",
381 .id = 1,
382 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
383 .resource = bfin_sir1_resources,
384 };
385 #endif
386 #endif
387
388 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
389 static struct resource bfin_twi0_resource[] = {
390 [0] = {
391 .start = TWI0_REGBASE,
392 .end = TWI0_REGBASE + 0xFF,
393 .flags = IORESOURCE_MEM,
394 },
395 [1] = {
396 .start = IRQ_TWI,
397 .end = IRQ_TWI,
398 .flags = IORESOURCE_IRQ,
399 },
400 };
401
402 static struct platform_device i2c_bfin_twi_device = {
403 .name = "i2c-bfin-twi",
404 .id = 0,
405 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
406 .resource = bfin_twi0_resource,
407 };
408 #endif
409
410 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
411 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
412 static struct resource bfin_sport0_uart_resources[] = {
413 {
414 .start = SPORT0_TCR1,
415 .end = SPORT0_MRCS3+4,
416 .flags = IORESOURCE_MEM,
417 },
418 {
419 .start = IRQ_SPORT0_RX,
420 .end = IRQ_SPORT0_RX+1,
421 .flags = IORESOURCE_IRQ,
422 },
423 {
424 .start = IRQ_SPORT0_ERROR,
425 .end = IRQ_SPORT0_ERROR,
426 .flags = IORESOURCE_IRQ,
427 },
428 };
429
430 static unsigned short bfin_sport0_peripherals[] = {
431 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
432 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
433 };
434
435 static struct platform_device bfin_sport0_uart_device = {
436 .name = "bfin-sport-uart",
437 .id = 0,
438 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
439 .resource = bfin_sport0_uart_resources,
440 .dev = {
441 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
442 },
443 };
444 #endif
445 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
446 static struct resource bfin_sport1_uart_resources[] = {
447 {
448 .start = SPORT1_TCR1,
449 .end = SPORT1_MRCS3+4,
450 .flags = IORESOURCE_MEM,
451 },
452 {
453 .start = IRQ_SPORT1_RX,
454 .end = IRQ_SPORT1_RX+1,
455 .flags = IORESOURCE_IRQ,
456 },
457 {
458 .start = IRQ_SPORT1_ERROR,
459 .end = IRQ_SPORT1_ERROR,
460 .flags = IORESOURCE_IRQ,
461 },
462 };
463
464 static unsigned short bfin_sport1_peripherals[] = {
465 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
466 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
467 };
468
469 static struct platform_device bfin_sport1_uart_device = {
470 .name = "bfin-sport-uart",
471 .id = 1,
472 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
473 .resource = bfin_sport1_uart_resources,
474 .dev = {
475 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
476 },
477 };
478 #endif
479 #endif
480
481 static struct platform_device *minotaur_devices[] __initdata = {
482 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
483 &bfin_pcmcia_cf_device,
484 #endif
485
486 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
487 &rtc_device,
488 #endif
489
490 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
491 &bfin_mii_bus,
492 &bfin_mac_device,
493 #endif
494
495 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
496 &net2272_bfin_device,
497 #endif
498
499 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
500 &bfin_spi0_device,
501 #endif
502
503 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
504 #ifdef CONFIG_SERIAL_BFIN_UART0
505 &bfin_uart0_device,
506 #endif
507 #ifdef CONFIG_SERIAL_BFIN_UART1
508 &bfin_uart1_device,
509 #endif
510 #endif
511
512 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
513 #ifdef CONFIG_BFIN_SIR0
514 &bfin_sir0_device,
515 #endif
516 #ifdef CONFIG_BFIN_SIR1
517 &bfin_sir1_device,
518 #endif
519 #endif
520
521 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
522 &i2c_bfin_twi_device,
523 #endif
524
525 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
526 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
527 &bfin_sport0_uart_device,
528 #endif
529 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
530 &bfin_sport1_uart_device,
531 #endif
532 #endif
533
534 };
535
minotaur_init(void)536 static int __init minotaur_init(void)
537 {
538 printk(KERN_INFO "%s(): registering device resources\n", __func__);
539 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
540 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
541 spi_register_board_info(bfin_spi_board_info,
542 ARRAY_SIZE(bfin_spi_board_info));
543 #endif
544
545 return 0;
546 }
547
548 arch_initcall(minotaur_init);
549
550 static struct platform_device *minotaur_early_devices[] __initdata = {
551 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
552 #ifdef CONFIG_SERIAL_BFIN_UART0
553 &bfin_uart0_device,
554 #endif
555 #ifdef CONFIG_SERIAL_BFIN_UART1
556 &bfin_uart1_device,
557 #endif
558 #endif
559
560 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
561 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
562 &bfin_sport0_uart_device,
563 #endif
564 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
565 &bfin_sport1_uart_device,
566 #endif
567 #endif
568 };
569
native_machine_early_platform_add_devices(void)570 void __init native_machine_early_platform_add_devices(void)
571 {
572 printk(KERN_INFO "register early platform devices\n");
573 early_platform_add_devices(minotaur_early_devices,
574 ARRAY_SIZE(minotaur_early_devices));
575 }
576
native_machine_restart(char * cmd)577 void native_machine_restart(char *cmd)
578 {
579 /* workaround reboot hang when booting from SPI */
580 if ((bfin_read_SYSCR() & 0x7) == 0x3)
581 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
582 }
583