1 #ifndef _IA64_MSI_DEF_H 2 #define _IA64_MSI_DEF_H 3 4 /* 5 * Shifts for APIC-based data 6 */ 7 8 #define MSI_DATA_VECTOR_SHIFT 0 9 #define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT) 10 #define MSI_DATA_VECTOR_MASK 0xffffff00 11 12 #define MSI_DATA_DELIVERY_MODE_SHIFT 8 13 #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) 14 #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) 15 16 #define MSI_DATA_LEVEL_SHIFT 14 17 #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) 18 #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) 19 20 #define MSI_DATA_TRIGGER_SHIFT 15 21 #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) 22 #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) 23 24 /* 25 * Shift/mask fields for APIC-based bus address 26 */ 27 28 #define MSI_ADDR_DEST_ID_SHIFT 4 29 #define MSI_ADDR_HEADER 0xfee00000 30 31 #define MSI_ADDR_DEST_ID_MASK 0xfff0000f 32 #define MSI_ADDR_DEST_ID_CPU(cpu) ((cpu) << MSI_ADDR_DEST_ID_SHIFT) 33 34 #define MSI_ADDR_DEST_MODE_SHIFT 2 35 #define MSI_ADDR_DEST_MODE_PHYS (0 << MSI_ADDR_DEST_MODE_SHIFT) 36 #define MSI_ADDR_DEST_MODE_LOGIC (1 << MSI_ADDR_DEST_MODE_SHIFT) 37 38 #define MSI_ADDR_REDIRECTION_SHIFT 3 39 #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) 40 #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) 41 42 #endif/* _IA64_MSI_DEF_H */ 43