1 /*
2 * DBAu1300 init and platform device setup.
3 *
4 * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
5 */
6
7 #include <linux/dma-mapping.h>
8 #include <linux/gpio.h>
9 #include <linux/gpio_keys.h>
10 #include <linux/init.h>
11 #include <linux/input.h> /* KEY_* codes */
12 #include <linux/i2c.h>
13 #include <linux/io.h>
14 #include <linux/leds.h>
15 #include <linux/ata_platform.h>
16 #include <linux/mmc/host.h>
17 #include <linux/module.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/platform_device.h>
22 #include <linux/smsc911x.h>
23
24 #include <asm/mach-au1x00/au1000.h>
25 #include <asm/mach-au1x00/au1100_mmc.h>
26 #include <asm/mach-au1x00/au1200fb.h>
27 #include <asm/mach-au1x00/au1xxx_dbdma.h>
28 #include <asm/mach-au1x00/au1xxx_psc.h>
29 #include <asm/mach-db1x00/db1300.h>
30 #include <asm/mach-db1x00/bcsr.h>
31 #include <asm/mach-au1x00/prom.h>
32
33 #include "platform.h"
34
35 static struct i2c_board_info db1300_i2c_devs[] __initdata = {
36 { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
37 { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
38 };
39
40 /* multifunction pins to assign to GPIO controller */
41 static int db1300_gpio_pins[] __initdata = {
42 AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
43 AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
44 AU1300_PIN_EXTCLK1,
45 -1, /* terminator */
46 };
47
48 /* multifunction pins to assign to device functions */
49 static int db1300_dev_pins[] __initdata = {
50 /* wake-from-str pins 0-3 */
51 AU1300_PIN_WAKE0,
52 /* external clock sources for PSC0 */
53 AU1300_PIN_EXTCLK0,
54 /* 8bit MMC interface on SD0: 6-9 */
55 AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
56 AU1300_PIN_SD0DAT7,
57 /* UART1 pins: 11-18 */
58 AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
59 AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
60 AU1300_PIN_U1RX, AU1300_PIN_U1TX,
61 /* UART0 pins: 19-24 */
62 AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
63 AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
64 /* UART2: 25-26 */
65 AU1300_PIN_U2RX, AU1300_PIN_U2TX,
66 /* UART3: 27-28 */
67 AU1300_PIN_U3RX, AU1300_PIN_U3TX,
68 /* LCD controller PWMs, ext pixclock: 30-31 */
69 AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
70 /* SD1 interface: 32-37 */
71 AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
72 AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
73 /* SD2 interface: 38-43 */
74 AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
75 AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
76 /* PSC0/1 clocks: 44-45 */
77 AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
78 /* PSCs: 46-49/50-53/54-57/58-61 */
79 AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
80 AU1300_PIN_PSC0D1,
81 AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
82 AU1300_PIN_PSC1D1,
83 AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
84 AU1300_PIN_PSC2D1,
85 AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
86 AU1300_PIN_PSC3D1,
87 /* PCMCIA interface: 62-70 */
88 AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
89 AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
90 AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
91 /* camera interface H/V sync inputs: 71-72 */
92 AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
93 /* PSC2/3 clocks: 73-74 */
94 AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
95 -1, /* terminator */
96 };
97
db1300_gpio_config(void)98 static void __init db1300_gpio_config(void)
99 {
100 int *i;
101
102 i = &db1300_dev_pins[0];
103 while (*i != -1)
104 au1300_pinfunc_to_dev(*i++);
105
106 i = &db1300_gpio_pins[0];
107 while (*i != -1)
108 au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
109
110 au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
111 }
112
get_system_type(void)113 char *get_system_type(void)
114 {
115 return "DB1300";
116 }
117
118 /**********************************************************************/
119
au1300_nand_cmd_ctrl(struct mtd_info * mtd,int cmd,unsigned int ctrl)120 static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
121 unsigned int ctrl)
122 {
123 struct nand_chip *this = mtd->priv;
124 unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
125
126 ioaddr &= 0xffffff00;
127
128 if (ctrl & NAND_CLE) {
129 ioaddr += MEM_STNAND_CMD;
130 } else if (ctrl & NAND_ALE) {
131 ioaddr += MEM_STNAND_ADDR;
132 } else {
133 /* assume we want to r/w real data by default */
134 ioaddr += MEM_STNAND_DATA;
135 }
136 this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
137 if (cmd != NAND_CMD_NONE) {
138 __raw_writeb(cmd, this->IO_ADDR_W);
139 wmb();
140 }
141 }
142
au1300_nand_device_ready(struct mtd_info * mtd)143 static int au1300_nand_device_ready(struct mtd_info *mtd)
144 {
145 return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
146 }
147
148 static const char *db1300_part_probes[] = { "cmdlinepart", NULL };
149
150 static struct mtd_partition db1300_nand_parts[] = {
151 {
152 .name = "NAND FS 0",
153 .offset = 0,
154 .size = 8 * 1024 * 1024,
155 },
156 {
157 .name = "NAND FS 1",
158 .offset = MTDPART_OFS_APPEND,
159 .size = MTDPART_SIZ_FULL
160 },
161 };
162
163 struct platform_nand_data db1300_nand_platdata = {
164 .chip = {
165 .nr_chips = 1,
166 .chip_offset = 0,
167 .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
168 .partitions = db1300_nand_parts,
169 .chip_delay = 20,
170 .part_probe_types = db1300_part_probes,
171 },
172 .ctrl = {
173 .dev_ready = au1300_nand_device_ready,
174 .cmd_ctrl = au1300_nand_cmd_ctrl,
175 },
176 };
177
178 static struct resource db1300_nand_res[] = {
179 [0] = {
180 .start = DB1300_NAND_PHYS_ADDR,
181 .end = DB1300_NAND_PHYS_ADDR + 0xff,
182 .flags = IORESOURCE_MEM,
183 },
184 };
185
186 static struct platform_device db1300_nand_dev = {
187 .name = "gen_nand",
188 .num_resources = ARRAY_SIZE(db1300_nand_res),
189 .resource = db1300_nand_res,
190 .id = -1,
191 .dev = {
192 .platform_data = &db1300_nand_platdata,
193 }
194 };
195
196 /**********************************************************************/
197
198 static struct resource db1300_eth_res[] = {
199 [0] = {
200 .start = DB1300_ETH_PHYS_ADDR,
201 .end = DB1300_ETH_PHYS_END,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = DB1300_ETH_INT,
206 .end = DB1300_ETH_INT,
207 .flags = IORESOURCE_IRQ,
208 },
209 };
210
211 static struct smsc911x_platform_config db1300_eth_config = {
212 .phy_interface = PHY_INTERFACE_MODE_MII,
213 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
214 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
215 .flags = SMSC911X_USE_32BIT,
216 };
217
218 static struct platform_device db1300_eth_dev = {
219 .name = "smsc911x",
220 .id = -1,
221 .num_resources = ARRAY_SIZE(db1300_eth_res),
222 .resource = db1300_eth_res,
223 .dev = {
224 .platform_data = &db1300_eth_config,
225 },
226 };
227
228 /**********************************************************************/
229
230 static struct resource au1300_psc1_res[] = {
231 [0] = {
232 .start = AU1300_PSC1_PHYS_ADDR,
233 .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
234 .flags = IORESOURCE_MEM,
235 },
236 [1] = {
237 .start = AU1300_PSC1_INT,
238 .end = AU1300_PSC1_INT,
239 .flags = IORESOURCE_IRQ,
240 },
241 [2] = {
242 .start = AU1300_DSCR_CMD0_PSC1_TX,
243 .end = AU1300_DSCR_CMD0_PSC1_TX,
244 .flags = IORESOURCE_DMA,
245 },
246 [3] = {
247 .start = AU1300_DSCR_CMD0_PSC1_RX,
248 .end = AU1300_DSCR_CMD0_PSC1_RX,
249 .flags = IORESOURCE_DMA,
250 },
251 };
252
253 static struct platform_device db1300_ac97_dev = {
254 .name = "au1xpsc_ac97",
255 .id = 1, /* PSC ID. match with AC97 codec ID! */
256 .num_resources = ARRAY_SIZE(au1300_psc1_res),
257 .resource = au1300_psc1_res,
258 };
259
260 /**********************************************************************/
261
262 static struct resource au1300_psc2_res[] = {
263 [0] = {
264 .start = AU1300_PSC2_PHYS_ADDR,
265 .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
266 .flags = IORESOURCE_MEM,
267 },
268 [1] = {
269 .start = AU1300_PSC2_INT,
270 .end = AU1300_PSC2_INT,
271 .flags = IORESOURCE_IRQ,
272 },
273 [2] = {
274 .start = AU1300_DSCR_CMD0_PSC2_TX,
275 .end = AU1300_DSCR_CMD0_PSC2_TX,
276 .flags = IORESOURCE_DMA,
277 },
278 [3] = {
279 .start = AU1300_DSCR_CMD0_PSC2_RX,
280 .end = AU1300_DSCR_CMD0_PSC2_RX,
281 .flags = IORESOURCE_DMA,
282 },
283 };
284
285 static struct platform_device db1300_i2s_dev = {
286 .name = "au1xpsc_i2s",
287 .id = 2, /* PSC ID */
288 .num_resources = ARRAY_SIZE(au1300_psc2_res),
289 .resource = au1300_psc2_res,
290 };
291
292 /**********************************************************************/
293
294 static struct resource au1300_psc3_res[] = {
295 [0] = {
296 .start = AU1300_PSC3_PHYS_ADDR,
297 .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
298 .flags = IORESOURCE_MEM,
299 },
300 [1] = {
301 .start = AU1300_PSC3_INT,
302 .end = AU1300_PSC3_INT,
303 .flags = IORESOURCE_IRQ,
304 },
305 [2] = {
306 .start = AU1300_DSCR_CMD0_PSC3_TX,
307 .end = AU1300_DSCR_CMD0_PSC3_TX,
308 .flags = IORESOURCE_DMA,
309 },
310 [3] = {
311 .start = AU1300_DSCR_CMD0_PSC3_RX,
312 .end = AU1300_DSCR_CMD0_PSC3_RX,
313 .flags = IORESOURCE_DMA,
314 },
315 };
316
317 static struct platform_device db1300_i2c_dev = {
318 .name = "au1xpsc_smbus",
319 .id = 0, /* bus number */
320 .num_resources = ARRAY_SIZE(au1300_psc3_res),
321 .resource = au1300_psc3_res,
322 };
323
324 /**********************************************************************/
325
326 /* proper key assignments when facing the LCD panel. For key assignments
327 * according to the schematics swap up with down and left with right.
328 * I chose to use it to emulate the arrow keys of a keyboard.
329 */
330 static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
331 {
332 .code = KEY_DOWN,
333 .gpio = AU1300_PIN_LCDPWM0,
334 .type = EV_KEY,
335 .debounce_interval = 1,
336 .active_low = 1,
337 .desc = "5waysw-down",
338 },
339 {
340 .code = KEY_UP,
341 .gpio = AU1300_PIN_PSC2SYNC1,
342 .type = EV_KEY,
343 .debounce_interval = 1,
344 .active_low = 1,
345 .desc = "5waysw-up",
346 },
347 {
348 .code = KEY_RIGHT,
349 .gpio = AU1300_PIN_WAKE3,
350 .type = EV_KEY,
351 .debounce_interval = 1,
352 .active_low = 1,
353 .desc = "5waysw-right",
354 },
355 {
356 .code = KEY_LEFT,
357 .gpio = AU1300_PIN_WAKE2,
358 .type = EV_KEY,
359 .debounce_interval = 1,
360 .active_low = 1,
361 .desc = "5waysw-left",
362 },
363 {
364 .code = KEY_ENTER,
365 .gpio = AU1300_PIN_WAKE1,
366 .type = EV_KEY,
367 .debounce_interval = 1,
368 .active_low = 1,
369 .desc = "5waysw-push",
370 },
371 };
372
373 static struct gpio_keys_platform_data db1300_5waysw_data = {
374 .buttons = db1300_5waysw_arrowkeys,
375 .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
376 .rep = 1,
377 .name = "db1300-5wayswitch",
378 };
379
380 static struct platform_device db1300_5waysw_dev = {
381 .name = "gpio-keys",
382 .dev = {
383 .platform_data = &db1300_5waysw_data,
384 },
385 };
386
387 /**********************************************************************/
388
389 static struct pata_platform_info db1300_ide_info = {
390 .ioport_shift = DB1300_IDE_REG_SHIFT,
391 };
392
393 #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
394 static struct resource db1300_ide_res[] = {
395 [0] = {
396 .start = DB1300_IDE_PHYS_ADDR,
397 .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
398 .flags = IORESOURCE_MEM,
399 },
400 [1] = {
401 .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
402 .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
403 .flags = IORESOURCE_MEM,
404 },
405 [2] = {
406 .start = DB1300_IDE_INT,
407 .end = DB1300_IDE_INT,
408 .flags = IORESOURCE_IRQ,
409 },
410 };
411
412 static struct platform_device db1300_ide_dev = {
413 .dev = {
414 .platform_data = &db1300_ide_info,
415 },
416 .name = "pata_platform",
417 .resource = db1300_ide_res,
418 .num_resources = ARRAY_SIZE(db1300_ide_res),
419 };
420
421 /**********************************************************************/
422
db1300_mmc_cd(int irq,void * ptr)423 static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
424 {
425 void(*mmc_cd)(struct mmc_host *, unsigned long);
426
427 /* disable the one currently screaming. No other way to shut it up */
428 if (irq == DB1300_SD1_INSERT_INT) {
429 disable_irq_nosync(DB1300_SD1_INSERT_INT);
430 enable_irq(DB1300_SD1_EJECT_INT);
431 } else {
432 disable_irq_nosync(DB1300_SD1_EJECT_INT);
433 enable_irq(DB1300_SD1_INSERT_INT);
434 }
435
436 /* link against CONFIG_MMC=m. We can only be called once MMC core has
437 * initialized the controller, so symbol_get() should always succeed.
438 */
439 mmc_cd = symbol_get(mmc_detect_change);
440 mmc_cd(ptr, msecs_to_jiffies(500));
441 symbol_put(mmc_detect_change);
442
443 return IRQ_HANDLED;
444 }
445
db1300_mmc_card_readonly(void * mmc_host)446 static int db1300_mmc_card_readonly(void *mmc_host)
447 {
448 /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
449 return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
450 }
451
db1300_mmc_card_inserted(void * mmc_host)452 static int db1300_mmc_card_inserted(void *mmc_host)
453 {
454 return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
455 }
456
db1300_mmc_cd_setup(void * mmc_host,int en)457 static int db1300_mmc_cd_setup(void *mmc_host, int en)
458 {
459 int ret;
460
461 if (en) {
462 ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
463 "sd_insert", mmc_host);
464 if (ret)
465 goto out;
466
467 ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
468 "sd_eject", mmc_host);
469 if (ret) {
470 free_irq(DB1300_SD1_INSERT_INT, mmc_host);
471 goto out;
472 }
473
474 if (db1300_mmc_card_inserted(mmc_host))
475 enable_irq(DB1300_SD1_EJECT_INT);
476 else
477 enable_irq(DB1300_SD1_INSERT_INT);
478
479 } else {
480 free_irq(DB1300_SD1_INSERT_INT, mmc_host);
481 free_irq(DB1300_SD1_EJECT_INT, mmc_host);
482 }
483 ret = 0;
484 out:
485 return ret;
486 }
487
db1300_mmcled_set(struct led_classdev * led,enum led_brightness brightness)488 static void db1300_mmcled_set(struct led_classdev *led,
489 enum led_brightness brightness)
490 {
491 if (brightness != LED_OFF)
492 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
493 else
494 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
495 }
496
497 static struct led_classdev db1300_mmc_led = {
498 .brightness_set = db1300_mmcled_set,
499 };
500
501 struct au1xmmc_platform_data db1300_sd1_platdata = {
502 .cd_setup = db1300_mmc_cd_setup,
503 .card_inserted = db1300_mmc_card_inserted,
504 .card_readonly = db1300_mmc_card_readonly,
505 .led = &db1300_mmc_led,
506 };
507
508 static struct resource au1300_sd1_res[] = {
509 [0] = {
510 .start = AU1300_SD1_PHYS_ADDR,
511 .end = AU1300_SD1_PHYS_ADDR,
512 .flags = IORESOURCE_MEM,
513 },
514 [1] = {
515 .start = AU1300_SD1_INT,
516 .end = AU1300_SD1_INT,
517 .flags = IORESOURCE_IRQ,
518 },
519 [2] = {
520 .start = AU1300_DSCR_CMD0_SDMS_TX1,
521 .end = AU1300_DSCR_CMD0_SDMS_TX1,
522 .flags = IORESOURCE_DMA,
523 },
524 [3] = {
525 .start = AU1300_DSCR_CMD0_SDMS_RX1,
526 .end = AU1300_DSCR_CMD0_SDMS_RX1,
527 .flags = IORESOURCE_DMA,
528 },
529 };
530
531 static struct platform_device db1300_sd1_dev = {
532 .dev = {
533 .platform_data = &db1300_sd1_platdata,
534 },
535 .name = "au1xxx-mmc",
536 .id = 1,
537 .resource = au1300_sd1_res,
538 .num_resources = ARRAY_SIZE(au1300_sd1_res),
539 };
540
541 /**********************************************************************/
542
db1300_movinand_inserted(void * mmc_host)543 static int db1300_movinand_inserted(void *mmc_host)
544 {
545 return 0; /* disable for now, it doesn't work yet */
546 }
547
db1300_movinand_readonly(void * mmc_host)548 static int db1300_movinand_readonly(void *mmc_host)
549 {
550 return 0;
551 }
552
db1300_movinand_led_set(struct led_classdev * led,enum led_brightness brightness)553 static void db1300_movinand_led_set(struct led_classdev *led,
554 enum led_brightness brightness)
555 {
556 if (brightness != LED_OFF)
557 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
558 else
559 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
560 }
561
562 static struct led_classdev db1300_movinand_led = {
563 .brightness_set = db1300_movinand_led_set,
564 };
565
566 struct au1xmmc_platform_data db1300_sd0_platdata = {
567 .card_inserted = db1300_movinand_inserted,
568 .card_readonly = db1300_movinand_readonly,
569 .led = &db1300_movinand_led,
570 .mask_host_caps = MMC_CAP_NEEDS_POLL,
571 };
572
573 static struct resource au1300_sd0_res[] = {
574 [0] = {
575 .start = AU1100_SD0_PHYS_ADDR,
576 .end = AU1100_SD0_PHYS_ADDR,
577 .flags = IORESOURCE_MEM,
578 },
579 [1] = {
580 .start = AU1300_SD0_INT,
581 .end = AU1300_SD0_INT,
582 .flags = IORESOURCE_IRQ,
583 },
584 [2] = {
585 .start = AU1300_DSCR_CMD0_SDMS_TX0,
586 .end = AU1300_DSCR_CMD0_SDMS_TX0,
587 .flags = IORESOURCE_DMA,
588 },
589 [3] = {
590 .start = AU1300_DSCR_CMD0_SDMS_RX0,
591 .end = AU1300_DSCR_CMD0_SDMS_RX0,
592 .flags = IORESOURCE_DMA,
593 },
594 };
595
596 static struct platform_device db1300_sd0_dev = {
597 .dev = {
598 .platform_data = &db1300_sd0_platdata,
599 },
600 .name = "au1xxx-mmc",
601 .id = 0,
602 .resource = au1300_sd0_res,
603 .num_resources = ARRAY_SIZE(au1300_sd0_res),
604 };
605
606 /**********************************************************************/
607
608 static struct platform_device db1300_wm9715_dev = {
609 .name = "wm9712-codec",
610 .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
611 };
612
613 static struct platform_device db1300_ac97dma_dev = {
614 .name = "au1xpsc-pcm",
615 .id = 1, /* PSC ID */
616 };
617
618 static struct platform_device db1300_i2sdma_dev = {
619 .name = "au1xpsc-pcm",
620 .id = 2, /* PSC ID */
621 };
622
623 static struct platform_device db1300_sndac97_dev = {
624 .name = "db1300-ac97",
625 };
626
627 static struct platform_device db1300_sndi2s_dev = {
628 .name = "db1300-i2s",
629 };
630
631 /**********************************************************************/
632
db1300fb_panel_index(void)633 static int db1300fb_panel_index(void)
634 {
635 return 9; /* DB1300_800x480 */
636 }
637
db1300fb_panel_init(void)638 static int db1300fb_panel_init(void)
639 {
640 /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
641 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
642 BCSR_BOARD_LCDBL);
643 return 0;
644 }
645
db1300fb_panel_shutdown(void)646 static int db1300fb_panel_shutdown(void)
647 {
648 /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
649 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
650 BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
651 return 0;
652 }
653
654 static struct au1200fb_platdata db1300fb_pd = {
655 .panel_index = db1300fb_panel_index,
656 .panel_init = db1300fb_panel_init,
657 .panel_shutdown = db1300fb_panel_shutdown,
658 };
659
660 static struct resource au1300_lcd_res[] = {
661 [0] = {
662 .start = AU1200_LCD_PHYS_ADDR,
663 .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
664 .flags = IORESOURCE_MEM,
665 },
666 [1] = {
667 .start = AU1300_LCD_INT,
668 .end = AU1300_LCD_INT,
669 .flags = IORESOURCE_IRQ,
670 }
671 };
672
673 static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
674
675 static struct platform_device db1300_lcd_dev = {
676 .name = "au1200-lcd",
677 .id = 0,
678 .dev = {
679 .dma_mask = &au1300_lcd_dmamask,
680 .coherent_dma_mask = DMA_BIT_MASK(32),
681 .platform_data = &db1300fb_pd,
682 },
683 .num_resources = ARRAY_SIZE(au1300_lcd_res),
684 .resource = au1300_lcd_res,
685 };
686
687 /**********************************************************************/
688
689 static struct platform_device *db1300_dev[] __initdata = {
690 &db1300_eth_dev,
691 &db1300_i2c_dev,
692 &db1300_5waysw_dev,
693 &db1300_nand_dev,
694 &db1300_ide_dev,
695 &db1300_sd0_dev,
696 &db1300_sd1_dev,
697 &db1300_lcd_dev,
698 &db1300_ac97_dev,
699 &db1300_i2s_dev,
700 &db1300_wm9715_dev,
701 &db1300_ac97dma_dev,
702 &db1300_i2sdma_dev,
703 &db1300_sndac97_dev,
704 &db1300_sndi2s_dev,
705 };
706
db1300_device_init(void)707 static int __init db1300_device_init(void)
708 {
709 int swapped, cpldirq;
710
711 /* setup CPLD IRQ muxer */
712 cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
713 irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
714 bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
715
716 /* insert/eject IRQs: one always triggers so don't enable them
717 * when doing request_irq() on them. DB1200 has this bug too.
718 */
719 irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
720 irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
721 irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
722 irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
723
724 /*
725 * setup board
726 */
727 prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
728
729 i2c_register_board_info(0, db1300_i2c_devs,
730 ARRAY_SIZE(db1300_i2c_devs));
731
732 /* Audio PSC clock is supplied by codecs (PSC1, 2) */
733 __raw_writel(PSC_SEL_CLK_SERCLK,
734 (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
735 wmb();
736 __raw_writel(PSC_SEL_CLK_SERCLK,
737 (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
738 wmb();
739 /* I2C uses internal 48MHz EXTCLK1 */
740 __raw_writel(PSC_SEL_CLK_INTCLK,
741 (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
742 wmb();
743
744 /* enable power to USB ports */
745 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
746
747 /* although it is socket #0, it uses the CPLD bits which previous boards
748 * have used for socket #1.
749 */
750 db1x_register_pcmcia_socket(
751 AU1000_PCMCIA_ATTR_PHYS_ADDR,
752 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
753 AU1000_PCMCIA_MEM_PHYS_ADDR,
754 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
755 AU1000_PCMCIA_IO_PHYS_ADDR,
756 AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
757 DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
758
759 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
760 db1x_register_norflash(64 << 20, 2, swapped);
761
762 return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
763 }
764 device_initcall(db1300_device_init);
765
766
board_setup(void)767 void __init board_setup(void)
768 {
769 unsigned short whoami;
770
771 db1300_gpio_config();
772 bcsr_init(DB1300_BCSR_PHYS_ADDR,
773 DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
774
775 whoami = bcsr_read(BCSR_WHOAMI);
776 printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
777 "BoardID %d CPLD Rev %d DaughtercardID %d\n",
778 BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
779 BCSR_WHOAMI_DCID(whoami));
780
781 /* enable UARTs, YAMON only enables #2 */
782 alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
783 alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
784 alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
785 }
786