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1 /*
2  * Locations of devices in the Zeus ASIC
3  *
4  * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19  *
20  * Author:       Ken Eppinett
21  *               David Schleef <ds@schleef.org>
22  *
23  * Description:  Defines the platform resources for the SA settop.
24  */
25 
26 #include <linux/init.h>
27 #include <asm/mach-powertv/asic.h>
28 
29 #define ZEUS_ADDR(x)	(ZEUS_IO_BASE + (x))
30 
31 const struct register_map zeus_register_map __initdata = {
32 	.eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
33 	.eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
34 	.eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},
35 
36 	.chipver3 = {.phys = ZEUS_ADDR(0x280800)},
37 	.chipver2 = {.phys = ZEUS_ADDR(0x280804)},
38 	.chipver1 = {.phys = ZEUS_ADDR(0x280808)},
39 	.chipver0 = {.phys = ZEUS_ADDR(0x28080c)},
40 
41 	/* The registers of IRBlaster */
42 	.uart1_intstat = {.phys = ZEUS_ADDR(0x281800)},
43 	.uart1_inten = {.phys = ZEUS_ADDR(0x281804)},
44 	.uart1_config1 = {.phys = ZEUS_ADDR(0x281808)},
45 	.uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)},
46 	.uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)},
47 	.uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)},
48 	.uart1_data = {.phys = ZEUS_ADDR(0x281818)},
49 	.uart1_status = {.phys = ZEUS_ADDR(0x28181C)},
50 
51 	.int_stat_3 = {.phys = ZEUS_ADDR(0x282800)},
52 	.int_stat_2 = {.phys = ZEUS_ADDR(0x282804)},
53 	.int_stat_1 = {.phys = ZEUS_ADDR(0x282808)},
54 	.int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)},
55 	.int_config = {.phys = ZEUS_ADDR(0x282810)},
56 	.int_int_scan = {.phys = ZEUS_ADDR(0x282818)},
57 	.ien_int_3 = {.phys = ZEUS_ADDR(0x282830)},
58 	.ien_int_2 = {.phys = ZEUS_ADDR(0x282834)},
59 	.ien_int_1 = {.phys = ZEUS_ADDR(0x282838)},
60 	.ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)},
61 	.int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)},
62 	.int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)},
63 	.int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)},
64 	.int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)},
65 	.int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)},
66 	.int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)},
67 	.int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)},
68 	.int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)},
69 	.int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)},
70 	.int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)},
71 	.int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)},
72 	.int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)},
73 	.int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)},
74 	.int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)},
75 	.int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)},
76 	.int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)},
77 	.int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
78 
79 	.mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
80 	.fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)},
81 	.test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
82 	.crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
83 	.usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
84 	.usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)},
85 	.ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)},
86 	.ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)},
87 	.bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)},
88 	.usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)},
89 	.usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)},
90 	.usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)},
91 	.usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)},
92 
93 	.pcie_regs = {.phys = ZEUS_ADDR(0x200000)},
94 	.tim_ch = {.phys = ZEUS_ADDR(0x282C10)},
95 	.tim_cl = {.phys = ZEUS_ADDR(0x282C14)},
96 	.gpio_dout = {.phys = ZEUS_ADDR(0x282c20)},
97 	.gpio_din = {.phys = ZEUS_ADDR(0x282c24)},
98 	.gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)},
99 	.watchdog = {.phys = ZEUS_ADDR(0x282c30)},
100 	.front_panel = {.phys = ZEUS_ADDR(0x283800)},
101 };
102