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1 /*
2  * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
3  *
4  * Description:
5  * MPC832xE MDS board specific routines.
6  *
7  * This program is free software; you can redistribute  it and/or modify it
8  * under  the terms of  the GNU General  Public License as published by the
9  * Free Software Foundation;  either version 2 of the  License, or (at your
10  * option) any later version.
11  */
12 
13 #include <linux/stddef.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/reboot.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/major.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/seq_file.h>
24 #include <linux/root_dev.h>
25 #include <linux/initrd.h>
26 #include <linux/of_platform.h>
27 #include <linux/of_device.h>
28 
29 #include <linux/atomic.h>
30 #include <asm/time.h>
31 #include <asm/io.h>
32 #include <asm/machdep.h>
33 #include <asm/ipic.h>
34 #include <asm/irq.h>
35 #include <asm/prom.h>
36 #include <asm/udbg.h>
37 #include <sysdev/fsl_soc.h>
38 #include <sysdev/fsl_pci.h>
39 #include <asm/qe.h>
40 #include <asm/qe_ic.h>
41 
42 #include "mpc83xx.h"
43 
44 #undef DEBUG
45 #ifdef DEBUG
46 #define DBG(fmt...) udbg_printf(fmt)
47 #else
48 #define DBG(fmt...)
49 #endif
50 
51 /* ************************************************************************
52  *
53  * Setup the architecture
54  *
55  */
mpc832x_sys_setup_arch(void)56 static void __init mpc832x_sys_setup_arch(void)
57 {
58 	struct device_node *np;
59 	u8 __iomem *bcsr_regs = NULL;
60 
61 	if (ppc_md.progress)
62 		ppc_md.progress("mpc832x_sys_setup_arch()", 0);
63 
64 	/* Map BCSR area */
65 	np = of_find_node_by_name(NULL, "bcsr");
66 	if (np) {
67 		struct resource res;
68 
69 		of_address_to_resource(np, 0, &res);
70 		bcsr_regs = ioremap(res.start, resource_size(&res));
71 		of_node_put(np);
72 	}
73 
74 	mpc83xx_setup_pci();
75 
76 #ifdef CONFIG_QUICC_ENGINE
77 	qe_reset();
78 
79 	if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
80 		par_io_init(np);
81 		of_node_put(np);
82 
83 		for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
84 			par_io_of_config(np);
85 	}
86 
87 	if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
88 			!= NULL){
89 		/* Reset the Ethernet PHYs */
90 #define BCSR8_FETH_RST 0x50
91 		clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
92 		udelay(1000);
93 		setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
94 		iounmap(bcsr_regs);
95 		of_node_put(np);
96 	}
97 #endif				/* CONFIG_QUICC_ENGINE */
98 }
99 
100 machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
101 
102 /*
103  * Called very early, MMU is off, device-tree isn't unflattened
104  */
mpc832x_sys_probe(void)105 static int __init mpc832x_sys_probe(void)
106 {
107         unsigned long root = of_get_flat_dt_root();
108 
109         return of_flat_dt_is_compatible(root, "MPC832xMDS");
110 }
111 
define_machine(mpc832x_mds)112 define_machine(mpc832x_mds) {
113 	.name 		= "MPC832x MDS",
114 	.probe 		= mpc832x_sys_probe,
115 	.setup_arch 	= mpc832x_sys_setup_arch,
116 	.init_IRQ	= mpc83xx_ipic_and_qe_init_IRQ,
117 	.get_irq 	= ipic_get_irq,
118 	.restart 	= mpc83xx_restart,
119 	.time_init 	= mpc83xx_time_init,
120 	.calibrate_decr	= generic_calibrate_decr,
121 	.progress 	= udbg_progress,
122 };
123