1 /*
2 * Based on MPC8560 ADS and arch/ppc tqm85xx ports
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2008 Freescale Semiconductor Inc.
7 *
8 * Copyright (c) 2005-2006 DENX Software Engineering
9 * Stefan Roese <sr@denx.de>
10 *
11 * Based on original work by
12 * Kumar Gala <kumar.gala@freescale.com>
13 * Copyright 2004 Freescale Semiconductor Inc.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20
21 #include <linux/stddef.h>
22 #include <linux/kernel.h>
23 #include <linux/pci.h>
24 #include <linux/kdev_t.h>
25 #include <linux/delay.h>
26 #include <linux/seq_file.h>
27 #include <linux/of_platform.h>
28
29 #include <asm/time.h>
30 #include <asm/machdep.h>
31 #include <asm/pci-bridge.h>
32 #include <asm/mpic.h>
33 #include <asm/prom.h>
34 #include <mm/mmu_decl.h>
35 #include <asm/udbg.h>
36
37 #include <sysdev/fsl_soc.h>
38 #include <sysdev/fsl_pci.h>
39
40 #include "mpc85xx.h"
41
42 #ifdef CONFIG_CPM2
43 #include <asm/cpm2.h>
44 #endif /* CONFIG_CPM2 */
45
tqm85xx_pic_init(void)46 static void __init tqm85xx_pic_init(void)
47 {
48 struct mpic *mpic = mpic_alloc(NULL, 0,
49 MPIC_BIG_ENDIAN,
50 0, 256, " OpenPIC ");
51 BUG_ON(mpic == NULL);
52 mpic_init(mpic);
53
54 mpc85xx_cpm2_pic_init();
55 }
56
57 /*
58 * Setup the architecture
59 */
tqm85xx_setup_arch(void)60 static void __init tqm85xx_setup_arch(void)
61 {
62 #ifdef CONFIG_PCI
63 struct device_node *np;
64 #endif
65
66 if (ppc_md.progress)
67 ppc_md.progress("tqm85xx_setup_arch()", 0);
68
69 #ifdef CONFIG_CPM2
70 cpm2_reset();
71 #endif
72
73 #ifdef CONFIG_PCI
74 for_each_node_by_type(np, "pci") {
75 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
76 of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
77 struct resource rsrc;
78 if (!of_address_to_resource(np, 0, &rsrc)) {
79 if ((rsrc.start & 0xfffff) == 0x8000)
80 fsl_add_bridge(np, 1);
81 else
82 fsl_add_bridge(np, 0);
83 }
84 }
85 }
86 #endif
87 }
88
tqm85xx_show_cpuinfo(struct seq_file * m)89 static void tqm85xx_show_cpuinfo(struct seq_file *m)
90 {
91 uint pvid, svid, phid1;
92
93 pvid = mfspr(SPRN_PVR);
94 svid = mfspr(SPRN_SVR);
95
96 seq_printf(m, "Vendor\t\t: TQ Components\n");
97 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
98 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
99
100 /* Display cpu Pll setting */
101 phid1 = mfspr(SPRN_HID1);
102 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
103 }
104
tqm85xx_ti1520_fixup(struct pci_dev * pdev)105 static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
106 {
107 unsigned int val;
108
109 /* Do not do the fixup on other platforms! */
110 if (!machine_is(tqm85xx))
111 return;
112
113 dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
114
115 /*
116 * Enable P2CCLK bit in system control register
117 * to enable CLOCK output to power chip
118 */
119 pci_read_config_dword(pdev, 0x80, &val);
120 pci_write_config_dword(pdev, 0x80, val | (1 << 27));
121
122 }
123 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
124 tqm85xx_ti1520_fixup);
125
126 machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices);
127
128 static const char *board[] __initdata = {
129 "tqc,tqm8540",
130 "tqc,tqm8541",
131 "tqc,tqm8548",
132 "tqc,tqm8555",
133 "tqc,tqm8560",
134 NULL
135 };
136
137 /*
138 * Called very early, device-tree isn't unflattened
139 */
tqm85xx_probe(void)140 static int __init tqm85xx_probe(void)
141 {
142 return of_flat_dt_match(of_get_flat_dt_root(), board);
143 }
144
define_machine(tqm85xx)145 define_machine(tqm85xx) {
146 .name = "TQM85xx",
147 .probe = tqm85xx_probe,
148 .setup_arch = tqm85xx_setup_arch,
149 .init_IRQ = tqm85xx_pic_init,
150 .show_cpuinfo = tqm85xx_show_cpuinfo,
151 .get_irq = mpic_get_irq,
152 .restart = fsl_rstcr_restart,
153 .calibrate_decr = generic_calibrate_decr,
154 .progress = udbg_progress,
155 };
156