1 /*
2 * PCI address cache; allows the lookup of PCI devices based on I/O address
3 *
4 * Copyright IBM Corporation 2004
5 * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/rbtree.h>
25 #include <linux/slab.h>
26 #include <linux/spinlock.h>
27 #include <linux/atomic.h>
28 #include <asm/pci-bridge.h>
29 #include <asm/ppc-pci.h>
30
31
32 /**
33 * The pci address cache subsystem. This subsystem places
34 * PCI device address resources into a red-black tree, sorted
35 * according to the address range, so that given only an i/o
36 * address, the corresponding PCI device can be **quickly**
37 * found. It is safe to perform an address lookup in an interrupt
38 * context; this ability is an important feature.
39 *
40 * Currently, the only customer of this code is the EEH subsystem;
41 * thus, this code has been somewhat tailored to suit EEH better.
42 * In particular, the cache does *not* hold the addresses of devices
43 * for which EEH is not enabled.
44 *
45 * (Implementation Note: The RB tree seems to be better/faster
46 * than any hash algo I could think of for this problem, even
47 * with the penalty of slow pointer chases for d-cache misses).
48 */
49 struct pci_io_addr_range {
50 struct rb_node rb_node;
51 unsigned long addr_lo;
52 unsigned long addr_hi;
53 struct pci_dev *pcidev;
54 unsigned int flags;
55 };
56
57 static struct pci_io_addr_cache {
58 struct rb_root rb_root;
59 spinlock_t piar_lock;
60 } pci_io_addr_cache_root;
61
__pci_addr_cache_get_device(unsigned long addr)62 static inline struct pci_dev *__pci_addr_cache_get_device(unsigned long addr)
63 {
64 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
65
66 while (n) {
67 struct pci_io_addr_range *piar;
68 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
69
70 if (addr < piar->addr_lo) {
71 n = n->rb_left;
72 } else {
73 if (addr > piar->addr_hi) {
74 n = n->rb_right;
75 } else {
76 pci_dev_get(piar->pcidev);
77 return piar->pcidev;
78 }
79 }
80 }
81
82 return NULL;
83 }
84
85 /**
86 * pci_addr_cache_get_device - Get device, given only address
87 * @addr: mmio (PIO) phys address or i/o port number
88 *
89 * Given an mmio phys address, or a port number, find a pci device
90 * that implements this address. Be sure to pci_dev_put the device
91 * when finished. I/O port numbers are assumed to be offset
92 * from zero (that is, they do *not* have pci_io_addr added in).
93 * It is safe to call this function within an interrupt.
94 */
pci_addr_cache_get_device(unsigned long addr)95 struct pci_dev *pci_addr_cache_get_device(unsigned long addr)
96 {
97 struct pci_dev *dev;
98 unsigned long flags;
99
100 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
101 dev = __pci_addr_cache_get_device(addr);
102 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
103 return dev;
104 }
105
106 #ifdef DEBUG
107 /*
108 * Handy-dandy debug print routine, does nothing more
109 * than print out the contents of our addr cache.
110 */
pci_addr_cache_print(struct pci_io_addr_cache * cache)111 static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
112 {
113 struct rb_node *n;
114 int cnt = 0;
115
116 n = rb_first(&cache->rb_root);
117 while (n) {
118 struct pci_io_addr_range *piar;
119 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
120 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
121 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
122 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
123 cnt++;
124 n = rb_next(n);
125 }
126 }
127 #endif
128
129 /* Insert address range into the rb tree. */
130 static struct pci_io_addr_range *
pci_addr_cache_insert(struct pci_dev * dev,unsigned long alo,unsigned long ahi,unsigned int flags)131 pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
132 unsigned long ahi, unsigned int flags)
133 {
134 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
135 struct rb_node *parent = NULL;
136 struct pci_io_addr_range *piar;
137
138 /* Walk tree, find a place to insert into tree */
139 while (*p) {
140 parent = *p;
141 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
142 if (ahi < piar->addr_lo) {
143 p = &parent->rb_left;
144 } else if (alo > piar->addr_hi) {
145 p = &parent->rb_right;
146 } else {
147 if (dev != piar->pcidev ||
148 alo != piar->addr_lo || ahi != piar->addr_hi) {
149 printk(KERN_WARNING "PIAR: overlapping address range\n");
150 }
151 return piar;
152 }
153 }
154 piar = kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
155 if (!piar)
156 return NULL;
157
158 pci_dev_get(dev);
159 piar->addr_lo = alo;
160 piar->addr_hi = ahi;
161 piar->pcidev = dev;
162 piar->flags = flags;
163
164 #ifdef DEBUG
165 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
166 alo, ahi, pci_name(dev));
167 #endif
168
169 rb_link_node(&piar->rb_node, parent, p);
170 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
171
172 return piar;
173 }
174
__pci_addr_cache_insert_device(struct pci_dev * dev)175 static void __pci_addr_cache_insert_device(struct pci_dev *dev)
176 {
177 struct device_node *dn;
178 struct eeh_dev *edev;
179 int i;
180
181 dn = pci_device_to_OF_node(dev);
182 if (!dn) {
183 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
184 return;
185 }
186
187 edev = of_node_to_eeh_dev(dn);
188 if (!edev) {
189 pr_warning("PCI: no EEH dev found for dn=%s\n",
190 dn->full_name);
191 return;
192 }
193
194 /* Skip any devices for which EEH is not enabled. */
195 if (!(edev->mode & EEH_MODE_SUPPORTED) ||
196 edev->mode & EEH_MODE_NOCHECK) {
197 #ifdef DEBUG
198 pr_info("PCI: skip building address cache for=%s - %s\n",
199 pci_name(dev), dn->full_name);
200 #endif
201 return;
202 }
203
204 /* Walk resources on this device, poke them into the tree */
205 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
206 unsigned long start = pci_resource_start(dev,i);
207 unsigned long end = pci_resource_end(dev,i);
208 unsigned int flags = pci_resource_flags(dev,i);
209
210 /* We are interested only bus addresses, not dma or other stuff */
211 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
212 continue;
213 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
214 continue;
215 pci_addr_cache_insert(dev, start, end, flags);
216 }
217 }
218
219 /**
220 * pci_addr_cache_insert_device - Add a device to the address cache
221 * @dev: PCI device whose I/O addresses we are interested in.
222 *
223 * In order to support the fast lookup of devices based on addresses,
224 * we maintain a cache of devices that can be quickly searched.
225 * This routine adds a device to that cache.
226 */
pci_addr_cache_insert_device(struct pci_dev * dev)227 void pci_addr_cache_insert_device(struct pci_dev *dev)
228 {
229 unsigned long flags;
230
231 /* Ignore PCI bridges */
232 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
233 return;
234
235 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
236 __pci_addr_cache_insert_device(dev);
237 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
238 }
239
__pci_addr_cache_remove_device(struct pci_dev * dev)240 static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
241 {
242 struct rb_node *n;
243
244 restart:
245 n = rb_first(&pci_io_addr_cache_root.rb_root);
246 while (n) {
247 struct pci_io_addr_range *piar;
248 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
249
250 if (piar->pcidev == dev) {
251 rb_erase(n, &pci_io_addr_cache_root.rb_root);
252 pci_dev_put(piar->pcidev);
253 kfree(piar);
254 goto restart;
255 }
256 n = rb_next(n);
257 }
258 }
259
260 /**
261 * pci_addr_cache_remove_device - remove pci device from addr cache
262 * @dev: device to remove
263 *
264 * Remove a device from the addr-cache tree.
265 * This is potentially expensive, since it will walk
266 * the tree multiple times (once per resource).
267 * But so what; device removal doesn't need to be that fast.
268 */
pci_addr_cache_remove_device(struct pci_dev * dev)269 void pci_addr_cache_remove_device(struct pci_dev *dev)
270 {
271 unsigned long flags;
272
273 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
274 __pci_addr_cache_remove_device(dev);
275 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
276 }
277
278 /**
279 * pci_addr_cache_build - Build a cache of I/O addresses
280 *
281 * Build a cache of pci i/o addresses. This cache will be used to
282 * find the pci device that corresponds to a given address.
283 * This routine scans all pci busses to build the cache.
284 * Must be run late in boot process, after the pci controllers
285 * have been scanned for devices (after all device resources are known).
286 */
pci_addr_cache_build(void)287 void __init pci_addr_cache_build(void)
288 {
289 struct device_node *dn;
290 struct eeh_dev *edev;
291 struct pci_dev *dev = NULL;
292
293 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
294
295 for_each_pci_dev(dev) {
296 pci_addr_cache_insert_device(dev);
297
298 dn = pci_device_to_OF_node(dev);
299 if (!dn)
300 continue;
301
302 edev = of_node_to_eeh_dev(dn);
303 if (!edev)
304 continue;
305
306 pci_dev_get(dev); /* matching put is in eeh_remove_device() */
307 dev->dev.archdata.edev = edev;
308 edev->pdev = dev;
309
310 eeh_sysfs_add_device(dev);
311 }
312
313 #ifdef DEBUG
314 /* Verify tree built up above, echo back the list of addrs. */
315 pci_addr_cache_print(&pci_io_addr_cache_root);
316 #endif
317 }
318
319