1 /*
2 * The SH64 TLB miss.
3 *
4 * Original code from fault.c
5 * Copyright (C) 2000, 2001 Paolo Alberelli
6 *
7 * Fast PTE->TLB refill path
8 * Copyright (C) 2003 Richard.Curnow@superh.com
9 *
10 * IMPORTANT NOTES :
11 * The do_fast_page_fault function is called from a context in entry.S
12 * where very few registers have been saved. In particular, the code in
13 * this file must be compiled not to use ANY caller-save registers that
14 * are not part of the restricted save set. Also, it means that code in
15 * this file must not make calls to functions elsewhere in the kernel, or
16 * else the excepting context will see corruption in its caller-save
17 * registers. Plus, the entry.S save area is non-reentrant, so this code
18 * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic
19 * on any exception.
20 *
21 * This file is subject to the terms and conditions of the GNU General Public
22 * License. See the file "COPYING" in the main directory of this archive
23 * for more details.
24 */
25 #include <linux/signal.h>
26 #include <linux/sched.h>
27 #include <linux/kernel.h>
28 #include <linux/errno.h>
29 #include <linux/string.h>
30 #include <linux/types.h>
31 #include <linux/ptrace.h>
32 #include <linux/mman.h>
33 #include <linux/mm.h>
34 #include <linux/smp.h>
35 #include <linux/interrupt.h>
36 #include <asm/tlb.h>
37 #include <asm/io.h>
38 #include <asm/uaccess.h>
39 #include <asm/pgalloc.h>
40 #include <asm/mmu_context.h>
41 #include <cpu/registers.h>
42
43 /* Callable from fault.c, so not static */
__do_tlb_refill(unsigned long address,unsigned long long is_text_not_data,pte_t * pte)44 inline void __do_tlb_refill(unsigned long address,
45 unsigned long long is_text_not_data, pte_t *pte)
46 {
47 unsigned long long ptel;
48 unsigned long long pteh=0;
49 struct tlb_info *tlbp;
50 unsigned long long next;
51
52 /* Get PTEL first */
53 ptel = pte_val(*pte);
54
55 /*
56 * Set PTEH register
57 */
58 pteh = neff_sign_extend(address & MMU_VPN_MASK);
59
60 /* Set the ASID. */
61 pteh |= get_asid() << PTEH_ASID_SHIFT;
62 pteh |= PTEH_VALID;
63
64 /* Set PTEL register, set_pte has performed the sign extension */
65 ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
66
67 tlbp = is_text_not_data ? &(cpu_data->itlb) : &(cpu_data->dtlb);
68 next = tlbp->next;
69 __flush_tlb_slot(next);
70 asm volatile ("putcfg %0,1,%2\n\n\t"
71 "putcfg %0,0,%1\n"
72 : : "r" (next), "r" (pteh), "r" (ptel) );
73
74 next += TLB_STEP;
75 if (next > tlbp->last) next = tlbp->first;
76 tlbp->next = next;
77
78 }
79
handle_vmalloc_fault(struct mm_struct * mm,unsigned long protection_flags,unsigned long long textaccess,unsigned long address)80 static int handle_vmalloc_fault(struct mm_struct *mm,
81 unsigned long protection_flags,
82 unsigned long long textaccess,
83 unsigned long address)
84 {
85 pgd_t *dir;
86 pud_t *pud;
87 pmd_t *pmd;
88 static pte_t *pte;
89 pte_t entry;
90
91 dir = pgd_offset_k(address);
92
93 pud = pud_offset(dir, address);
94 if (pud_none_or_clear_bad(pud))
95 return 0;
96
97 pmd = pmd_offset(pud, address);
98 if (pmd_none_or_clear_bad(pmd))
99 return 0;
100
101 pte = pte_offset_kernel(pmd, address);
102 entry = *pte;
103
104 if (pte_none(entry) || !pte_present(entry))
105 return 0;
106 if ((pte_val(entry) & protection_flags) != protection_flags)
107 return 0;
108
109 __do_tlb_refill(address, textaccess, pte);
110
111 return 1;
112 }
113
handle_tlbmiss(struct mm_struct * mm,unsigned long long protection_flags,unsigned long long textaccess,unsigned long address)114 static int handle_tlbmiss(struct mm_struct *mm,
115 unsigned long long protection_flags,
116 unsigned long long textaccess,
117 unsigned long address)
118 {
119 pgd_t *dir;
120 pud_t *pud;
121 pmd_t *pmd;
122 pte_t *pte;
123 pte_t entry;
124
125 /* NB. The PGD currently only contains a single entry - there is no
126 page table tree stored for the top half of the address space since
127 virtual pages in that region should never be mapped in user mode.
128 (In kernel mode, the only things in that region are the 512Mb super
129 page (locked in), and vmalloc (modules) + I/O device pages (handled
130 by handle_vmalloc_fault), so no PGD for the upper half is required
131 by kernel mode either).
132
133 See how mm->pgd is allocated and initialised in pgd_alloc to see why
134 the next test is necessary. - RPC */
135 if (address >= (unsigned long) TASK_SIZE)
136 /* upper half - never has page table entries. */
137 return 0;
138
139 dir = pgd_offset(mm, address);
140 if (pgd_none(*dir) || !pgd_present(*dir))
141 return 0;
142 if (!pgd_present(*dir))
143 return 0;
144
145 pud = pud_offset(dir, address);
146 if (pud_none(*pud) || !pud_present(*pud))
147 return 0;
148
149 pmd = pmd_offset(pud, address);
150 if (pmd_none(*pmd) || !pmd_present(*pmd))
151 return 0;
152
153 pte = pte_offset_kernel(pmd, address);
154 entry = *pte;
155
156 if (pte_none(entry) || !pte_present(entry))
157 return 0;
158
159 /*
160 * If the page doesn't have sufficient protection bits set to
161 * service the kind of fault being handled, there's not much
162 * point doing the TLB refill. Punt the fault to the general
163 * handler.
164 */
165 if ((pte_val(entry) & protection_flags) != protection_flags)
166 return 0;
167
168 __do_tlb_refill(address, textaccess, pte);
169
170 return 1;
171 }
172
173 /*
174 * Put all this information into one structure so that everything is just
175 * arithmetic relative to a single base address. This reduces the number
176 * of movi/shori pairs needed just to load addresses of static data.
177 */
178 struct expevt_lookup {
179 unsigned short protection_flags[8];
180 unsigned char is_text_access[8];
181 unsigned char is_write_access[8];
182 };
183
184 #define PRU (1<<9)
185 #define PRW (1<<8)
186 #define PRX (1<<7)
187 #define PRR (1<<6)
188
189 #define DIRTY (_PAGE_DIRTY | _PAGE_ACCESSED)
190 #define YOUNG (_PAGE_ACCESSED)
191
192 /* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether
193 the fault happened in user mode or privileged mode. */
194 static struct expevt_lookup expevt_lookup_table = {
195 .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW},
196 .is_text_access = {1, 1, 0, 0, 0, 0, 0, 0}
197 };
198
199 /*
200 This routine handles page faults that can be serviced just by refilling a
201 TLB entry from an existing page table entry. (This case represents a very
202 large majority of page faults.) Return 1 if the fault was successfully
203 handled. Return 0 if the fault could not be handled. (This leads into the
204 general fault handling in fault.c which deals with mapping file-backed
205 pages, stack growth, segmentation faults, swapping etc etc)
206 */
do_fast_page_fault(unsigned long long ssr_md,unsigned long long expevt,unsigned long address)207 asmlinkage int do_fast_page_fault(unsigned long long ssr_md,
208 unsigned long long expevt,
209 unsigned long address)
210 {
211 struct task_struct *tsk;
212 struct mm_struct *mm;
213 unsigned long long textaccess;
214 unsigned long long protection_flags;
215 unsigned long long index;
216 unsigned long long expevt4;
217
218 /* The next few lines implement a way of hashing EXPEVT into a
219 * small array index which can be used to lookup parameters
220 * specific to the type of TLBMISS being handled.
221 *
222 * Note:
223 * ITLBMISS has EXPEVT==0xa40
224 * RTLBMISS has EXPEVT==0x040
225 * WTLBMISS has EXPEVT==0x060
226 */
227 expevt4 = (expevt >> 4);
228 /* TODO : xor ssr_md into this expression too. Then we can check
229 * that PRU is set when it needs to be. */
230 index = expevt4 ^ (expevt4 >> 5);
231 index &= 7;
232 protection_flags = expevt_lookup_table.protection_flags[index];
233 textaccess = expevt_lookup_table.is_text_access[index];
234
235 /* SIM
236 * Note this is now called with interrupts still disabled
237 * This is to cope with being called for a missing IO port
238 * address with interrupts disabled. This should be fixed as
239 * soon as we have a better 'fast path' miss handler.
240 *
241 * Plus take care how you try and debug this stuff.
242 * For example, writing debug data to a port which you
243 * have just faulted on is not going to work.
244 */
245
246 tsk = current;
247 mm = tsk->mm;
248
249 if ((address >= VMALLOC_START && address < VMALLOC_END) ||
250 (address >= IOBASE_VADDR && address < IOBASE_END)) {
251 if (ssr_md)
252 /*
253 * Process-contexts can never have this address
254 * range mapped
255 */
256 if (handle_vmalloc_fault(mm, protection_flags,
257 textaccess, address))
258 return 1;
259 } else if (!in_interrupt() && mm) {
260 if (handle_tlbmiss(mm, protection_flags, textaccess, address))
261 return 1;
262 }
263
264 return 0;
265 }
266