1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc4000.h"
45 #include "xc5000.h"
46 #include "nxt200x.h"
47 #include "cx24123.h"
48 #include "isl6421.h"
49 #include "tuner-simple.h"
50 #include "tda9887.h"
51 #include "s5h1411.h"
52 #include "stv0299.h"
53 #include "z0194a.h"
54 #include "stv0288.h"
55 #include "stb6000.h"
56 #include "cx24116.h"
57 #include "stv0900.h"
58 #include "stb6100.h"
59 #include "stb6100_proc.h"
60 #include "mb86a16.h"
61 #include "ds3000.h"
62
63 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
64 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
65 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
66 MODULE_LICENSE("GPL");
67 MODULE_VERSION(CX88_VERSION);
68
69 static unsigned int debug;
70 module_param(debug, int, 0644);
71 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
72
73 static unsigned int dvb_buf_tscnt = 32;
74 module_param(dvb_buf_tscnt, int, 0644);
75 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
76
77 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
78
79 #define dprintk(level,fmt, arg...) if (debug >= level) \
80 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
81
82 /* ------------------------------------------------------------------ */
83
dvb_buf_setup(struct videobuf_queue * q,unsigned int * count,unsigned int * size)84 static int dvb_buf_setup(struct videobuf_queue *q,
85 unsigned int *count, unsigned int *size)
86 {
87 struct cx8802_dev *dev = q->priv_data;
88
89 dev->ts_packet_size = 188 * 4;
90 dev->ts_packet_count = dvb_buf_tscnt;
91
92 *size = dev->ts_packet_size * dev->ts_packet_count;
93 *count = dvb_buf_tscnt;
94 return 0;
95 }
96
dvb_buf_prepare(struct videobuf_queue * q,struct videobuf_buffer * vb,enum v4l2_field field)97 static int dvb_buf_prepare(struct videobuf_queue *q,
98 struct videobuf_buffer *vb, enum v4l2_field field)
99 {
100 struct cx8802_dev *dev = q->priv_data;
101 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
102 }
103
dvb_buf_queue(struct videobuf_queue * q,struct videobuf_buffer * vb)104 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
105 {
106 struct cx8802_dev *dev = q->priv_data;
107 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
108 }
109
dvb_buf_release(struct videobuf_queue * q,struct videobuf_buffer * vb)110 static void dvb_buf_release(struct videobuf_queue *q,
111 struct videobuf_buffer *vb)
112 {
113 cx88_free_buffer(q, (struct cx88_buffer*)vb);
114 }
115
116 static const struct videobuf_queue_ops dvb_qops = {
117 .buf_setup = dvb_buf_setup,
118 .buf_prepare = dvb_buf_prepare,
119 .buf_queue = dvb_buf_queue,
120 .buf_release = dvb_buf_release,
121 };
122
123 /* ------------------------------------------------------------------ */
124
cx88_dvb_bus_ctrl(struct dvb_frontend * fe,int acquire)125 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
126 {
127 struct cx8802_dev *dev= fe->dvb->priv;
128 struct cx8802_driver *drv = NULL;
129 int ret = 0;
130 int fe_id;
131
132 fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
133 if (!fe_id) {
134 printk(KERN_ERR "%s() No frontend found\n", __func__);
135 return -EINVAL;
136 }
137
138 mutex_lock(&dev->core->lock);
139 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
140 if (drv) {
141 if (acquire){
142 dev->frontends.active_fe_id = fe_id;
143 ret = drv->request_acquire(drv);
144 } else {
145 ret = drv->request_release(drv);
146 dev->frontends.active_fe_id = 0;
147 }
148 }
149 mutex_unlock(&dev->core->lock);
150
151 return ret;
152 }
153
cx88_dvb_gate_ctrl(struct cx88_core * core,int open)154 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
155 {
156 struct videobuf_dvb_frontends *f;
157 struct videobuf_dvb_frontend *fe;
158
159 if (!core->dvbdev)
160 return;
161
162 f = &core->dvbdev->frontends;
163
164 if (!f)
165 return;
166
167 if (f->gate <= 1) /* undefined or fe0 */
168 fe = videobuf_dvb_get_frontend(f, 1);
169 else
170 fe = videobuf_dvb_get_frontend(f, f->gate);
171
172 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
173 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
174 }
175
176 /* ------------------------------------------------------------------ */
177
dvico_fusionhdtv_demod_init(struct dvb_frontend * fe)178 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
179 {
180 static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
181 static const u8 reset [] = { RESET, 0x80 };
182 static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
183 static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
184 static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
185 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
186
187 mt352_write(fe, clock_config, sizeof(clock_config));
188 udelay(200);
189 mt352_write(fe, reset, sizeof(reset));
190 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
191
192 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
193 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
194 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
195 return 0;
196 }
197
dvico_dual_demod_init(struct dvb_frontend * fe)198 static int dvico_dual_demod_init(struct dvb_frontend *fe)
199 {
200 static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
201 static const u8 reset [] = { RESET, 0x80 };
202 static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
203 static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
204 static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
205 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
206
207 mt352_write(fe, clock_config, sizeof(clock_config));
208 udelay(200);
209 mt352_write(fe, reset, sizeof(reset));
210 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
211
212 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
213 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
214 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
215
216 return 0;
217 }
218
dntv_live_dvbt_demod_init(struct dvb_frontend * fe)219 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
220 {
221 static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
222 static const u8 reset [] = { 0x50, 0x80 };
223 static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
224 static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
225 0x00, 0xFF, 0x00, 0x40, 0x40 };
226 static const u8 dntv_extra[] = { 0xB5, 0x7A };
227 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
228
229 mt352_write(fe, clock_config, sizeof(clock_config));
230 udelay(2000);
231 mt352_write(fe, reset, sizeof(reset));
232 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
233
234 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
235 udelay(2000);
236 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
237 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
238
239 return 0;
240 }
241
242 static const struct mt352_config dvico_fusionhdtv = {
243 .demod_address = 0x0f,
244 .demod_init = dvico_fusionhdtv_demod_init,
245 };
246
247 static const struct mt352_config dntv_live_dvbt_config = {
248 .demod_address = 0x0f,
249 .demod_init = dntv_live_dvbt_demod_init,
250 };
251
252 static const struct mt352_config dvico_fusionhdtv_dual = {
253 .demod_address = 0x0f,
254 .demod_init = dvico_dual_demod_init,
255 };
256
257 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
258 .demod_address = (0x1e >> 1),
259 .no_tuner = 1,
260 .if2 = 45600,
261 };
262
263 static struct mb86a16_config twinhan_vp1027 = {
264 .demod_address = 0x08,
265 };
266
267 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
dntv_live_dvbt_pro_demod_init(struct dvb_frontend * fe)268 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
269 {
270 static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
271 static const u8 reset [] = { 0x50, 0x80 };
272 static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
273 static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
274 0x00, 0xFF, 0x00, 0x40, 0x40 };
275 static const u8 dntv_extra[] = { 0xB5, 0x7A };
276 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
277
278 mt352_write(fe, clock_config, sizeof(clock_config));
279 udelay(2000);
280 mt352_write(fe, reset, sizeof(reset));
281 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
282
283 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
284 udelay(2000);
285 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
286 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
287
288 return 0;
289 }
290
291 static const struct mt352_config dntv_live_dvbt_pro_config = {
292 .demod_address = 0x0f,
293 .no_tuner = 1,
294 .demod_init = dntv_live_dvbt_pro_demod_init,
295 };
296 #endif
297
298 static const struct zl10353_config dvico_fusionhdtv_hybrid = {
299 .demod_address = 0x0f,
300 .no_tuner = 1,
301 };
302
303 static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
304 .demod_address = 0x0f,
305 .if2 = 45600,
306 .no_tuner = 1,
307 };
308
309 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
310 .demod_address = 0x0f,
311 .if2 = 4560,
312 .no_tuner = 1,
313 .demod_init = dvico_fusionhdtv_demod_init,
314 };
315
316 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
317 .demod_address = 0x0f,
318 };
319
320 static const struct cx22702_config connexant_refboard_config = {
321 .demod_address = 0x43,
322 .output_mode = CX22702_SERIAL_OUTPUT,
323 };
324
325 static const struct cx22702_config hauppauge_hvr_config = {
326 .demod_address = 0x63,
327 .output_mode = CX22702_SERIAL_OUTPUT,
328 };
329
or51132_set_ts_param(struct dvb_frontend * fe,int is_punctured)330 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
331 {
332 struct cx8802_dev *dev= fe->dvb->priv;
333 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
334 return 0;
335 }
336
337 static const struct or51132_config pchdtv_hd3000 = {
338 .demod_address = 0x15,
339 .set_ts_params = or51132_set_ts_param,
340 };
341
lgdt330x_pll_rf_set(struct dvb_frontend * fe,int index)342 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
343 {
344 struct cx8802_dev *dev= fe->dvb->priv;
345 struct cx88_core *core = dev->core;
346
347 dprintk(1, "%s: index = %d\n", __func__, index);
348 if (index == 0)
349 cx_clear(MO_GP0_IO, 8);
350 else
351 cx_set(MO_GP0_IO, 8);
352 return 0;
353 }
354
lgdt330x_set_ts_param(struct dvb_frontend * fe,int is_punctured)355 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
356 {
357 struct cx8802_dev *dev= fe->dvb->priv;
358 if (is_punctured)
359 dev->ts_gen_cntrl |= 0x04;
360 else
361 dev->ts_gen_cntrl &= ~0x04;
362 return 0;
363 }
364
365 static struct lgdt330x_config fusionhdtv_3_gold = {
366 .demod_address = 0x0e,
367 .demod_chip = LGDT3302,
368 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
369 .set_ts_params = lgdt330x_set_ts_param,
370 };
371
372 static const struct lgdt330x_config fusionhdtv_5_gold = {
373 .demod_address = 0x0e,
374 .demod_chip = LGDT3303,
375 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
376 .set_ts_params = lgdt330x_set_ts_param,
377 };
378
379 static const struct lgdt330x_config pchdtv_hd5500 = {
380 .demod_address = 0x59,
381 .demod_chip = LGDT3303,
382 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
383 .set_ts_params = lgdt330x_set_ts_param,
384 };
385
nxt200x_set_ts_param(struct dvb_frontend * fe,int is_punctured)386 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
387 {
388 struct cx8802_dev *dev= fe->dvb->priv;
389 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
390 return 0;
391 }
392
393 static const struct nxt200x_config ati_hdtvwonder = {
394 .demod_address = 0x0a,
395 .set_ts_params = nxt200x_set_ts_param,
396 };
397
cx24123_set_ts_param(struct dvb_frontend * fe,int is_punctured)398 static int cx24123_set_ts_param(struct dvb_frontend* fe,
399 int is_punctured)
400 {
401 struct cx8802_dev *dev= fe->dvb->priv;
402 dev->ts_gen_cntrl = 0x02;
403 return 0;
404 }
405
kworld_dvbs_100_set_voltage(struct dvb_frontend * fe,fe_sec_voltage_t voltage)406 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
407 fe_sec_voltage_t voltage)
408 {
409 struct cx8802_dev *dev= fe->dvb->priv;
410 struct cx88_core *core = dev->core;
411
412 if (voltage == SEC_VOLTAGE_OFF)
413 cx_write(MO_GP0_IO, 0x000006fb);
414 else
415 cx_write(MO_GP0_IO, 0x000006f9);
416
417 if (core->prev_set_voltage)
418 return core->prev_set_voltage(fe, voltage);
419 return 0;
420 }
421
geniatech_dvbs_set_voltage(struct dvb_frontend * fe,fe_sec_voltage_t voltage)422 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
423 fe_sec_voltage_t voltage)
424 {
425 struct cx8802_dev *dev= fe->dvb->priv;
426 struct cx88_core *core = dev->core;
427
428 if (voltage == SEC_VOLTAGE_OFF) {
429 dprintk(1,"LNB Voltage OFF\n");
430 cx_write(MO_GP0_IO, 0x0000efff);
431 }
432
433 if (core->prev_set_voltage)
434 return core->prev_set_voltage(fe, voltage);
435 return 0;
436 }
437
tevii_dvbs_set_voltage(struct dvb_frontend * fe,fe_sec_voltage_t voltage)438 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
439 fe_sec_voltage_t voltage)
440 {
441 struct cx8802_dev *dev= fe->dvb->priv;
442 struct cx88_core *core = dev->core;
443
444 cx_set(MO_GP0_IO, 0x6040);
445 switch (voltage) {
446 case SEC_VOLTAGE_13:
447 cx_clear(MO_GP0_IO, 0x20);
448 break;
449 case SEC_VOLTAGE_18:
450 cx_set(MO_GP0_IO, 0x20);
451 break;
452 case SEC_VOLTAGE_OFF:
453 cx_clear(MO_GP0_IO, 0x20);
454 break;
455 }
456
457 if (core->prev_set_voltage)
458 return core->prev_set_voltage(fe, voltage);
459 return 0;
460 }
461
vp1027_set_voltage(struct dvb_frontend * fe,fe_sec_voltage_t voltage)462 static int vp1027_set_voltage(struct dvb_frontend *fe,
463 fe_sec_voltage_t voltage)
464 {
465 struct cx8802_dev *dev = fe->dvb->priv;
466 struct cx88_core *core = dev->core;
467
468 switch (voltage) {
469 case SEC_VOLTAGE_13:
470 dprintk(1, "LNB SEC Voltage=13\n");
471 cx_write(MO_GP0_IO, 0x00001220);
472 break;
473 case SEC_VOLTAGE_18:
474 dprintk(1, "LNB SEC Voltage=18\n");
475 cx_write(MO_GP0_IO, 0x00001222);
476 break;
477 case SEC_VOLTAGE_OFF:
478 dprintk(1, "LNB Voltage OFF\n");
479 cx_write(MO_GP0_IO, 0x00001230);
480 break;
481 }
482
483 if (core->prev_set_voltage)
484 return core->prev_set_voltage(fe, voltage);
485 return 0;
486 }
487
488 static const struct cx24123_config geniatech_dvbs_config = {
489 .demod_address = 0x55,
490 .set_ts_params = cx24123_set_ts_param,
491 };
492
493 static const struct cx24123_config hauppauge_novas_config = {
494 .demod_address = 0x55,
495 .set_ts_params = cx24123_set_ts_param,
496 };
497
498 static const struct cx24123_config kworld_dvbs_100_config = {
499 .demod_address = 0x15,
500 .set_ts_params = cx24123_set_ts_param,
501 .lnb_polarity = 1,
502 };
503
504 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
505 .demod_address = 0x32 >> 1,
506 .output_mode = S5H1409_PARALLEL_OUTPUT,
507 .gpio = S5H1409_GPIO_ON,
508 .qam_if = 44000,
509 .inversion = S5H1409_INVERSION_OFF,
510 .status_mode = S5H1409_DEMODLOCKING,
511 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
512 };
513
514 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
515 .demod_address = 0x32 >> 1,
516 .output_mode = S5H1409_SERIAL_OUTPUT,
517 .gpio = S5H1409_GPIO_OFF,
518 .inversion = S5H1409_INVERSION_OFF,
519 .status_mode = S5H1409_DEMODLOCKING,
520 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
521 };
522
523 static const struct s5h1409_config kworld_atsc_120_config = {
524 .demod_address = 0x32 >> 1,
525 .output_mode = S5H1409_SERIAL_OUTPUT,
526 .gpio = S5H1409_GPIO_OFF,
527 .inversion = S5H1409_INVERSION_OFF,
528 .status_mode = S5H1409_DEMODLOCKING,
529 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
530 };
531
532 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
533 .i2c_address = 0x64,
534 .if_khz = 5380,
535 };
536
537 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
538 .demod_address = (0x1e >> 1),
539 .no_tuner = 1,
540 .if2 = 45600,
541 };
542
543 static const struct zl10353_config cx88_geniatech_x8000_mt = {
544 .demod_address = (0x1e >> 1),
545 .no_tuner = 1,
546 .disable_i2c_gate_ctrl = 1,
547 };
548
549 static const struct s5h1411_config dvico_fusionhdtv7_config = {
550 .output_mode = S5H1411_SERIAL_OUTPUT,
551 .gpio = S5H1411_GPIO_ON,
552 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
553 .qam_if = S5H1411_IF_44000,
554 .vsb_if = S5H1411_IF_44000,
555 .inversion = S5H1411_INVERSION_OFF,
556 .status_mode = S5H1411_DEMODLOCKING
557 };
558
559 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
560 .i2c_address = 0xc2 >> 1,
561 .if_khz = 5380,
562 };
563
attach_xc3028(u8 addr,struct cx8802_dev * dev)564 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
565 {
566 struct dvb_frontend *fe;
567 struct videobuf_dvb_frontend *fe0 = NULL;
568 struct xc2028_ctrl ctl;
569 struct xc2028_config cfg = {
570 .i2c_adap = &dev->core->i2c_adap,
571 .i2c_addr = addr,
572 .ctrl = &ctl,
573 };
574
575 /* Get the first frontend */
576 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
577 if (!fe0)
578 return -EINVAL;
579
580 if (!fe0->dvb.frontend) {
581 printk(KERN_ERR "%s/2: dvb frontend not attached. "
582 "Can't attach xc3028\n",
583 dev->core->name);
584 return -EINVAL;
585 }
586
587 /*
588 * Some xc3028 devices may be hidden by an I2C gate. This is known
589 * to happen with some s5h1409-based devices.
590 * Now that I2C gate is open, sets up xc3028 configuration
591 */
592 cx88_setup_xc3028(dev->core, &ctl);
593
594 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
595 if (!fe) {
596 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
597 dev->core->name);
598 dvb_frontend_detach(fe0->dvb.frontend);
599 dvb_unregister_frontend(fe0->dvb.frontend);
600 fe0->dvb.frontend = NULL;
601 return -EINVAL;
602 }
603
604 printk(KERN_INFO "%s/2: xc3028 attached\n",
605 dev->core->name);
606
607 return 0;
608 }
609
attach_xc4000(struct cx8802_dev * dev,struct xc4000_config * cfg)610 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
611 {
612 struct dvb_frontend *fe;
613 struct videobuf_dvb_frontend *fe0 = NULL;
614
615 /* Get the first frontend */
616 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
617 if (!fe0)
618 return -EINVAL;
619
620 if (!fe0->dvb.frontend) {
621 printk(KERN_ERR "%s/2: dvb frontend not attached. "
622 "Can't attach xc4000\n",
623 dev->core->name);
624 return -EINVAL;
625 }
626
627 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
628 cfg);
629 if (!fe) {
630 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
631 dev->core->name);
632 dvb_frontend_detach(fe0->dvb.frontend);
633 dvb_unregister_frontend(fe0->dvb.frontend);
634 fe0->dvb.frontend = NULL;
635 return -EINVAL;
636 }
637
638 printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
639
640 return 0;
641 }
642
cx24116_set_ts_param(struct dvb_frontend * fe,int is_punctured)643 static int cx24116_set_ts_param(struct dvb_frontend *fe,
644 int is_punctured)
645 {
646 struct cx8802_dev *dev = fe->dvb->priv;
647 dev->ts_gen_cntrl = 0x2;
648
649 return 0;
650 }
651
stv0900_set_ts_param(struct dvb_frontend * fe,int is_punctured)652 static int stv0900_set_ts_param(struct dvb_frontend *fe,
653 int is_punctured)
654 {
655 struct cx8802_dev *dev = fe->dvb->priv;
656 dev->ts_gen_cntrl = 0;
657
658 return 0;
659 }
660
cx24116_reset_device(struct dvb_frontend * fe)661 static int cx24116_reset_device(struct dvb_frontend *fe)
662 {
663 struct cx8802_dev *dev = fe->dvb->priv;
664 struct cx88_core *core = dev->core;
665
666 /* Reset the part */
667 /* Put the cx24116 into reset */
668 cx_write(MO_SRST_IO, 0);
669 msleep(10);
670 /* Take the cx24116 out of reset */
671 cx_write(MO_SRST_IO, 1);
672 msleep(10);
673
674 return 0;
675 }
676
677 static const struct cx24116_config hauppauge_hvr4000_config = {
678 .demod_address = 0x05,
679 .set_ts_params = cx24116_set_ts_param,
680 .reset_device = cx24116_reset_device,
681 };
682
683 static const struct cx24116_config tevii_s460_config = {
684 .demod_address = 0x55,
685 .set_ts_params = cx24116_set_ts_param,
686 .reset_device = cx24116_reset_device,
687 };
688
ds3000_set_ts_param(struct dvb_frontend * fe,int is_punctured)689 static int ds3000_set_ts_param(struct dvb_frontend *fe,
690 int is_punctured)
691 {
692 struct cx8802_dev *dev = fe->dvb->priv;
693 dev->ts_gen_cntrl = 4;
694
695 return 0;
696 }
697
698 static struct ds3000_config tevii_ds3000_config = {
699 .demod_address = 0x68,
700 .set_ts_params = ds3000_set_ts_param,
701 };
702
703 static const struct stv0900_config prof_7301_stv0900_config = {
704 .demod_address = 0x6a,
705 /* demod_mode = 0,*/
706 .xtal = 27000000,
707 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
708 .diseqc_mode = 2,/* 2/3 PWM */
709 .tun1_maddress = 0,/* 0x60 */
710 .tun1_adc = 0,/* 2 Vpp */
711 .path1_mode = 3,
712 .set_ts_params = stv0900_set_ts_param,
713 };
714
715 static const struct stb6100_config prof_7301_stb6100_config = {
716 .tuner_address = 0x60,
717 .refclock = 27000000,
718 };
719
720 static const struct stv0299_config tevii_tuner_sharp_config = {
721 .demod_address = 0x68,
722 .inittab = sharp_z0194a_inittab,
723 .mclk = 88000000UL,
724 .invert = 1,
725 .skip_reinit = 0,
726 .lock_output = 1,
727 .volt13_op0_op1 = STV0299_VOLT13_OP1,
728 .min_delay_ms = 100,
729 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
730 .set_ts_params = cx24116_set_ts_param,
731 };
732
733 static const struct stv0288_config tevii_tuner_earda_config = {
734 .demod_address = 0x68,
735 .min_delay_ms = 100,
736 .set_ts_params = cx24116_set_ts_param,
737 };
738
cx8802_alloc_frontends(struct cx8802_dev * dev)739 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
740 {
741 struct cx88_core *core = dev->core;
742 struct videobuf_dvb_frontend *fe = NULL;
743 int i;
744
745 mutex_init(&dev->frontends.lock);
746 INIT_LIST_HEAD(&dev->frontends.felist);
747
748 if (!core->board.num_frontends)
749 return -ENODEV;
750
751 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
752 core->board.num_frontends);
753 for (i = 1; i <= core->board.num_frontends; i++) {
754 fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
755 if (!fe) {
756 printk(KERN_ERR "%s() failed to alloc\n", __func__);
757 videobuf_dvb_dealloc_frontends(&dev->frontends);
758 return -ENOMEM;
759 }
760 }
761 return 0;
762 }
763
764
765
766 static const u8 samsung_smt_7020_inittab[] = {
767 0x01, 0x15,
768 0x02, 0x00,
769 0x03, 0x00,
770 0x04, 0x7D,
771 0x05, 0x0F,
772 0x06, 0x02,
773 0x07, 0x00,
774 0x08, 0x60,
775
776 0x0A, 0xC2,
777 0x0B, 0x00,
778 0x0C, 0x01,
779 0x0D, 0x81,
780 0x0E, 0x44,
781 0x0F, 0x09,
782 0x10, 0x3C,
783 0x11, 0x84,
784 0x12, 0xDA,
785 0x13, 0x99,
786 0x14, 0x8D,
787 0x15, 0xCE,
788 0x16, 0xE8,
789 0x17, 0x43,
790 0x18, 0x1C,
791 0x19, 0x1B,
792 0x1A, 0x1D,
793
794 0x1C, 0x12,
795 0x1D, 0x00,
796 0x1E, 0x00,
797 0x1F, 0x00,
798 0x20, 0x00,
799 0x21, 0x00,
800 0x22, 0x00,
801 0x23, 0x00,
802
803 0x28, 0x02,
804 0x29, 0x28,
805 0x2A, 0x14,
806 0x2B, 0x0F,
807 0x2C, 0x09,
808 0x2D, 0x05,
809
810 0x31, 0x1F,
811 0x32, 0x19,
812 0x33, 0xFC,
813 0x34, 0x13,
814 0xff, 0xff,
815 };
816
817
samsung_smt_7020_tuner_set_params(struct dvb_frontend * fe)818 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
819 {
820 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
821 struct cx8802_dev *dev = fe->dvb->priv;
822 u8 buf[4];
823 u32 div;
824 struct i2c_msg msg = {
825 .addr = 0x61,
826 .flags = 0,
827 .buf = buf,
828 .len = sizeof(buf) };
829
830 div = c->frequency / 125;
831
832 buf[0] = (div >> 8) & 0x7f;
833 buf[1] = div & 0xff;
834 buf[2] = 0x84; /* 0xC4 */
835 buf[3] = 0x00;
836
837 if (c->frequency < 1500000)
838 buf[3] |= 0x10;
839
840 if (fe->ops.i2c_gate_ctrl)
841 fe->ops.i2c_gate_ctrl(fe, 1);
842
843 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
844 return -EIO;
845
846 return 0;
847 }
848
samsung_smt_7020_set_tone(struct dvb_frontend * fe,fe_sec_tone_mode_t tone)849 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
850 fe_sec_tone_mode_t tone)
851 {
852 struct cx8802_dev *dev = fe->dvb->priv;
853 struct cx88_core *core = dev->core;
854
855 cx_set(MO_GP0_IO, 0x0800);
856
857 switch (tone) {
858 case SEC_TONE_ON:
859 cx_set(MO_GP0_IO, 0x08);
860 break;
861 case SEC_TONE_OFF:
862 cx_clear(MO_GP0_IO, 0x08);
863 break;
864 default:
865 return -EINVAL;
866 }
867
868 return 0;
869 }
870
samsung_smt_7020_set_voltage(struct dvb_frontend * fe,fe_sec_voltage_t voltage)871 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
872 fe_sec_voltage_t voltage)
873 {
874 struct cx8802_dev *dev = fe->dvb->priv;
875 struct cx88_core *core = dev->core;
876
877 u8 data;
878 struct i2c_msg msg = {
879 .addr = 8,
880 .flags = 0,
881 .buf = &data,
882 .len = sizeof(data) };
883
884 cx_set(MO_GP0_IO, 0x8000);
885
886 switch (voltage) {
887 case SEC_VOLTAGE_OFF:
888 break;
889 case SEC_VOLTAGE_13:
890 data = ISL6421_EN1 | ISL6421_LLC1;
891 cx_clear(MO_GP0_IO, 0x80);
892 break;
893 case SEC_VOLTAGE_18:
894 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
895 cx_clear(MO_GP0_IO, 0x80);
896 break;
897 default:
898 return -EINVAL;
899 };
900
901 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
902 }
903
samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend * fe,u32 srate,u32 ratio)904 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
905 u32 srate, u32 ratio)
906 {
907 u8 aclk = 0;
908 u8 bclk = 0;
909
910 if (srate < 1500000) {
911 aclk = 0xb7;
912 bclk = 0x47;
913 } else if (srate < 3000000) {
914 aclk = 0xb7;
915 bclk = 0x4b;
916 } else if (srate < 7000000) {
917 aclk = 0xb7;
918 bclk = 0x4f;
919 } else if (srate < 14000000) {
920 aclk = 0xb7;
921 bclk = 0x53;
922 } else if (srate < 30000000) {
923 aclk = 0xb6;
924 bclk = 0x53;
925 } else if (srate < 45000000) {
926 aclk = 0xb4;
927 bclk = 0x51;
928 }
929
930 stv0299_writereg(fe, 0x13, aclk);
931 stv0299_writereg(fe, 0x14, bclk);
932 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
933 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
934 stv0299_writereg(fe, 0x21, ratio & 0xf0);
935
936 return 0;
937 }
938
939
940 static const struct stv0299_config samsung_stv0299_config = {
941 .demod_address = 0x68,
942 .inittab = samsung_smt_7020_inittab,
943 .mclk = 88000000UL,
944 .invert = 0,
945 .skip_reinit = 0,
946 .lock_output = STV0299_LOCKOUTPUT_LK,
947 .volt13_op0_op1 = STV0299_VOLT13_OP1,
948 .min_delay_ms = 100,
949 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
950 };
951
dvb_register(struct cx8802_dev * dev)952 static int dvb_register(struct cx8802_dev *dev)
953 {
954 struct cx88_core *core = dev->core;
955 struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
956 int mfe_shared = 0; /* bus not shared by default */
957 int res = -EINVAL;
958
959 if (0 != core->i2c_rc) {
960 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
961 goto frontend_detach;
962 }
963
964 /* Get the first frontend */
965 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
966 if (!fe0)
967 goto frontend_detach;
968
969 /* multi-frontend gate control is undefined or defaults to fe0 */
970 dev->frontends.gate = 0;
971
972 /* Sets the gate control callback to be used by i2c command calls */
973 core->gate_ctrl = cx88_dvb_gate_ctrl;
974
975 /* init frontend(s) */
976 switch (core->boardnr) {
977 case CX88_BOARD_HAUPPAUGE_DVB_T1:
978 fe0->dvb.frontend = dvb_attach(cx22702_attach,
979 &connexant_refboard_config,
980 &core->i2c_adap);
981 if (fe0->dvb.frontend != NULL) {
982 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
983 0x61, &core->i2c_adap,
984 DVB_PLL_THOMSON_DTT759X))
985 goto frontend_detach;
986 }
987 break;
988 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
989 case CX88_BOARD_CONEXANT_DVB_T1:
990 case CX88_BOARD_KWORLD_DVB_T_CX22702:
991 case CX88_BOARD_WINFAST_DTV1000:
992 fe0->dvb.frontend = dvb_attach(cx22702_attach,
993 &connexant_refboard_config,
994 &core->i2c_adap);
995 if (fe0->dvb.frontend != NULL) {
996 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
997 0x60, &core->i2c_adap,
998 DVB_PLL_THOMSON_DTT7579))
999 goto frontend_detach;
1000 }
1001 break;
1002 case CX88_BOARD_WINFAST_DTV2000H:
1003 case CX88_BOARD_HAUPPAUGE_HVR1100:
1004 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1005 case CX88_BOARD_HAUPPAUGE_HVR1300:
1006 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1007 &hauppauge_hvr_config,
1008 &core->i2c_adap);
1009 if (fe0->dvb.frontend != NULL) {
1010 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1011 &core->i2c_adap, 0x61,
1012 TUNER_PHILIPS_FMD1216ME_MK3))
1013 goto frontend_detach;
1014 }
1015 break;
1016 case CX88_BOARD_WINFAST_DTV2000H_J:
1017 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1018 &hauppauge_hvr_config,
1019 &core->i2c_adap);
1020 if (fe0->dvb.frontend != NULL) {
1021 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1022 &core->i2c_adap, 0x61,
1023 TUNER_PHILIPS_FMD1216MEX_MK3))
1024 goto frontend_detach;
1025 }
1026 break;
1027 case CX88_BOARD_HAUPPAUGE_HVR3000:
1028 /* MFE frontend 1 */
1029 mfe_shared = 1;
1030 dev->frontends.gate = 2;
1031 /* DVB-S init */
1032 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1033 &hauppauge_novas_config,
1034 &dev->core->i2c_adap);
1035 if (fe0->dvb.frontend) {
1036 if (!dvb_attach(isl6421_attach,
1037 fe0->dvb.frontend,
1038 &dev->core->i2c_adap,
1039 0x08, ISL6421_DCL, 0x00))
1040 goto frontend_detach;
1041 }
1042 /* MFE frontend 2 */
1043 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
1044 if (!fe1)
1045 goto frontend_detach;
1046 /* DVB-T init */
1047 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1048 &hauppauge_hvr_config,
1049 &dev->core->i2c_adap);
1050 if (fe1->dvb.frontend) {
1051 fe1->dvb.frontend->id = 1;
1052 if (!dvb_attach(simple_tuner_attach,
1053 fe1->dvb.frontend,
1054 &dev->core->i2c_adap,
1055 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1056 goto frontend_detach;
1057 }
1058 break;
1059 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1060 fe0->dvb.frontend = dvb_attach(mt352_attach,
1061 &dvico_fusionhdtv,
1062 &core->i2c_adap);
1063 if (fe0->dvb.frontend != NULL) {
1064 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1065 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1066 goto frontend_detach;
1067 break;
1068 }
1069 /* ZL10353 replaces MT352 on later cards */
1070 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1071 &dvico_fusionhdtv_plus_v1_1,
1072 &core->i2c_adap);
1073 if (fe0->dvb.frontend != NULL) {
1074 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1075 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1076 goto frontend_detach;
1077 }
1078 break;
1079 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1080 /* The tin box says DEE1601, but it seems to be DTT7579
1081 * compatible, with a slightly different MT352 AGC gain. */
1082 fe0->dvb.frontend = dvb_attach(mt352_attach,
1083 &dvico_fusionhdtv_dual,
1084 &core->i2c_adap);
1085 if (fe0->dvb.frontend != NULL) {
1086 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1087 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1088 goto frontend_detach;
1089 break;
1090 }
1091 /* ZL10353 replaces MT352 on later cards */
1092 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1093 &dvico_fusionhdtv_plus_v1_1,
1094 &core->i2c_adap);
1095 if (fe0->dvb.frontend != NULL) {
1096 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1097 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1098 goto frontend_detach;
1099 }
1100 break;
1101 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1102 fe0->dvb.frontend = dvb_attach(mt352_attach,
1103 &dvico_fusionhdtv,
1104 &core->i2c_adap);
1105 if (fe0->dvb.frontend != NULL) {
1106 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1107 0x61, NULL, DVB_PLL_LG_Z201))
1108 goto frontend_detach;
1109 }
1110 break;
1111 case CX88_BOARD_KWORLD_DVB_T:
1112 case CX88_BOARD_DNTV_LIVE_DVB_T:
1113 case CX88_BOARD_ADSTECH_DVB_T_PCI:
1114 fe0->dvb.frontend = dvb_attach(mt352_attach,
1115 &dntv_live_dvbt_config,
1116 &core->i2c_adap);
1117 if (fe0->dvb.frontend != NULL) {
1118 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1119 0x61, NULL, DVB_PLL_UNKNOWN_1))
1120 goto frontend_detach;
1121 }
1122 break;
1123 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1124 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
1125 /* MT352 is on a secondary I2C bus made from some GPIO lines */
1126 fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
1127 &dev->vp3054->adap);
1128 if (fe0->dvb.frontend != NULL) {
1129 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1130 &core->i2c_adap, 0x61,
1131 TUNER_PHILIPS_FMD1216ME_MK3))
1132 goto frontend_detach;
1133 }
1134 #else
1135 printk(KERN_ERR "%s/2: built without vp3054 support\n",
1136 core->name);
1137 #endif
1138 break;
1139 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1140 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1141 &dvico_fusionhdtv_hybrid,
1142 &core->i2c_adap);
1143 if (fe0->dvb.frontend != NULL) {
1144 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1145 &core->i2c_adap, 0x61,
1146 TUNER_THOMSON_FE6600))
1147 goto frontend_detach;
1148 }
1149 break;
1150 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1151 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1152 &dvico_fusionhdtv_xc3028,
1153 &core->i2c_adap);
1154 if (fe0->dvb.frontend == NULL)
1155 fe0->dvb.frontend = dvb_attach(mt352_attach,
1156 &dvico_fusionhdtv_mt352_xc3028,
1157 &core->i2c_adap);
1158 /*
1159 * On this board, the demod provides the I2C bus pullup.
1160 * We must not permit gate_ctrl to be performed, or
1161 * the xc3028 cannot communicate on the bus.
1162 */
1163 if (fe0->dvb.frontend)
1164 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1165 if (attach_xc3028(0x61, dev) < 0)
1166 goto frontend_detach;
1167 break;
1168 case CX88_BOARD_PCHDTV_HD3000:
1169 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1170 &core->i2c_adap);
1171 if (fe0->dvb.frontend != NULL) {
1172 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1173 &core->i2c_adap, 0x61,
1174 TUNER_THOMSON_DTT761X))
1175 goto frontend_detach;
1176 }
1177 break;
1178 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1179 dev->ts_gen_cntrl = 0x08;
1180
1181 /* Do a hardware reset of chip before using it. */
1182 cx_clear(MO_GP0_IO, 1);
1183 mdelay(100);
1184 cx_set(MO_GP0_IO, 1);
1185 mdelay(200);
1186
1187 /* Select RF connector callback */
1188 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1189 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1190 &fusionhdtv_3_gold,
1191 &core->i2c_adap);
1192 if (fe0->dvb.frontend != NULL) {
1193 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1194 &core->i2c_adap, 0x61,
1195 TUNER_MICROTUNE_4042FI5))
1196 goto frontend_detach;
1197 }
1198 break;
1199 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1200 dev->ts_gen_cntrl = 0x08;
1201
1202 /* Do a hardware reset of chip before using it. */
1203 cx_clear(MO_GP0_IO, 1);
1204 mdelay(100);
1205 cx_set(MO_GP0_IO, 9);
1206 mdelay(200);
1207 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1208 &fusionhdtv_3_gold,
1209 &core->i2c_adap);
1210 if (fe0->dvb.frontend != NULL) {
1211 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1212 &core->i2c_adap, 0x61,
1213 TUNER_THOMSON_DTT761X))
1214 goto frontend_detach;
1215 }
1216 break;
1217 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1218 dev->ts_gen_cntrl = 0x08;
1219
1220 /* Do a hardware reset of chip before using it. */
1221 cx_clear(MO_GP0_IO, 1);
1222 mdelay(100);
1223 cx_set(MO_GP0_IO, 1);
1224 mdelay(200);
1225 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1226 &fusionhdtv_5_gold,
1227 &core->i2c_adap);
1228 if (fe0->dvb.frontend != NULL) {
1229 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1230 &core->i2c_adap, 0x61,
1231 TUNER_LG_TDVS_H06XF))
1232 goto frontend_detach;
1233 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1234 &core->i2c_adap, 0x43))
1235 goto frontend_detach;
1236 }
1237 break;
1238 case CX88_BOARD_PCHDTV_HD5500:
1239 dev->ts_gen_cntrl = 0x08;
1240
1241 /* Do a hardware reset of chip before using it. */
1242 cx_clear(MO_GP0_IO, 1);
1243 mdelay(100);
1244 cx_set(MO_GP0_IO, 1);
1245 mdelay(200);
1246 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1247 &pchdtv_hd5500,
1248 &core->i2c_adap);
1249 if (fe0->dvb.frontend != NULL) {
1250 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1251 &core->i2c_adap, 0x61,
1252 TUNER_LG_TDVS_H06XF))
1253 goto frontend_detach;
1254 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1255 &core->i2c_adap, 0x43))
1256 goto frontend_detach;
1257 }
1258 break;
1259 case CX88_BOARD_ATI_HDTVWONDER:
1260 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1261 &ati_hdtvwonder,
1262 &core->i2c_adap);
1263 if (fe0->dvb.frontend != NULL) {
1264 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1265 &core->i2c_adap, 0x61,
1266 TUNER_PHILIPS_TUV1236D))
1267 goto frontend_detach;
1268 }
1269 break;
1270 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1271 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1272 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1273 &hauppauge_novas_config,
1274 &core->i2c_adap);
1275 if (fe0->dvb.frontend) {
1276 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1277 &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
1278 goto frontend_detach;
1279 }
1280 break;
1281 case CX88_BOARD_KWORLD_DVBS_100:
1282 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1283 &kworld_dvbs_100_config,
1284 &core->i2c_adap);
1285 if (fe0->dvb.frontend) {
1286 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1287 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1288 }
1289 break;
1290 case CX88_BOARD_GENIATECH_DVBS:
1291 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1292 &geniatech_dvbs_config,
1293 &core->i2c_adap);
1294 if (fe0->dvb.frontend) {
1295 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1296 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1297 }
1298 break;
1299 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1300 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1301 &pinnacle_pctv_hd_800i_config,
1302 &core->i2c_adap);
1303 if (fe0->dvb.frontend != NULL) {
1304 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1305 &core->i2c_adap,
1306 &pinnacle_pctv_hd_800i_tuner_config))
1307 goto frontend_detach;
1308 }
1309 break;
1310 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1311 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1312 &dvico_hdtv5_pci_nano_config,
1313 &core->i2c_adap);
1314 if (fe0->dvb.frontend != NULL) {
1315 struct dvb_frontend *fe;
1316 struct xc2028_config cfg = {
1317 .i2c_adap = &core->i2c_adap,
1318 .i2c_addr = 0x61,
1319 };
1320 static struct xc2028_ctrl ctl = {
1321 .fname = XC2028_DEFAULT_FIRMWARE,
1322 .max_len = 64,
1323 .scode_table = XC3028_FE_OREN538,
1324 };
1325
1326 fe = dvb_attach(xc2028_attach,
1327 fe0->dvb.frontend, &cfg);
1328 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1329 fe->ops.tuner_ops.set_config(fe, &ctl);
1330 }
1331 break;
1332 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1333 case CX88_BOARD_WINFAST_DTV1800H:
1334 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1335 &cx88_pinnacle_hybrid_pctv,
1336 &core->i2c_adap);
1337 if (fe0->dvb.frontend) {
1338 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1339 if (attach_xc3028(0x61, dev) < 0)
1340 goto frontend_detach;
1341 }
1342 break;
1343 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1344 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1345 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1346 &cx88_pinnacle_hybrid_pctv,
1347 &core->i2c_adap);
1348 if (fe0->dvb.frontend) {
1349 struct xc4000_config cfg = {
1350 .i2c_address = 0x61,
1351 .default_pm = 0,
1352 .dvb_amplitude = 134,
1353 .set_smoothedcvbs = 1,
1354 .if_khz = 4560
1355 };
1356 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1357 if (attach_xc4000(dev, &cfg) < 0)
1358 goto frontend_detach;
1359 }
1360 break;
1361 case CX88_BOARD_GENIATECH_X8000_MT:
1362 dev->ts_gen_cntrl = 0x00;
1363
1364 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1365 &cx88_geniatech_x8000_mt,
1366 &core->i2c_adap);
1367 if (attach_xc3028(0x61, dev) < 0)
1368 goto frontend_detach;
1369 break;
1370 case CX88_BOARD_KWORLD_ATSC_120:
1371 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1372 &kworld_atsc_120_config,
1373 &core->i2c_adap);
1374 if (attach_xc3028(0x61, dev) < 0)
1375 goto frontend_detach;
1376 break;
1377 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1378 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1379 &dvico_fusionhdtv7_config,
1380 &core->i2c_adap);
1381 if (fe0->dvb.frontend != NULL) {
1382 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1383 &core->i2c_adap,
1384 &dvico_fusionhdtv7_tuner_config))
1385 goto frontend_detach;
1386 }
1387 break;
1388 case CX88_BOARD_HAUPPAUGE_HVR4000:
1389 /* MFE frontend 1 */
1390 mfe_shared = 1;
1391 dev->frontends.gate = 2;
1392 /* DVB-S/S2 Init */
1393 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1394 &hauppauge_hvr4000_config,
1395 &dev->core->i2c_adap);
1396 if (fe0->dvb.frontend) {
1397 if (!dvb_attach(isl6421_attach,
1398 fe0->dvb.frontend,
1399 &dev->core->i2c_adap,
1400 0x08, ISL6421_DCL, 0x00))
1401 goto frontend_detach;
1402 }
1403 /* MFE frontend 2 */
1404 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
1405 if (!fe1)
1406 goto frontend_detach;
1407 /* DVB-T Init */
1408 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1409 &hauppauge_hvr_config,
1410 &dev->core->i2c_adap);
1411 if (fe1->dvb.frontend) {
1412 fe1->dvb.frontend->id = 1;
1413 if (!dvb_attach(simple_tuner_attach,
1414 fe1->dvb.frontend,
1415 &dev->core->i2c_adap,
1416 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1417 goto frontend_detach;
1418 }
1419 break;
1420 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1421 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1422 &hauppauge_hvr4000_config,
1423 &dev->core->i2c_adap);
1424 if (fe0->dvb.frontend) {
1425 if (!dvb_attach(isl6421_attach,
1426 fe0->dvb.frontend,
1427 &dev->core->i2c_adap,
1428 0x08, ISL6421_DCL, 0x00))
1429 goto frontend_detach;
1430 }
1431 break;
1432 case CX88_BOARD_PROF_6200:
1433 case CX88_BOARD_TBS_8910:
1434 case CX88_BOARD_TEVII_S420:
1435 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1436 &tevii_tuner_sharp_config,
1437 &core->i2c_adap);
1438 if (fe0->dvb.frontend != NULL) {
1439 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1440 &core->i2c_adap, DVB_PLL_OPERA1))
1441 goto frontend_detach;
1442 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1443 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1444
1445 } else {
1446 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1447 &tevii_tuner_earda_config,
1448 &core->i2c_adap);
1449 if (fe0->dvb.frontend != NULL) {
1450 if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
1451 &core->i2c_adap))
1452 goto frontend_detach;
1453 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1454 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1455 }
1456 }
1457 break;
1458 case CX88_BOARD_TEVII_S460:
1459 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1460 &tevii_s460_config,
1461 &core->i2c_adap);
1462 if (fe0->dvb.frontend != NULL)
1463 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1464 break;
1465 case CX88_BOARD_TEVII_S464:
1466 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1467 &tevii_ds3000_config,
1468 &core->i2c_adap);
1469 if (fe0->dvb.frontend != NULL)
1470 fe0->dvb.frontend->ops.set_voltage =
1471 tevii_dvbs_set_voltage;
1472 break;
1473 case CX88_BOARD_OMICOM_SS4_PCI:
1474 case CX88_BOARD_TBS_8920:
1475 case CX88_BOARD_PROF_7300:
1476 case CX88_BOARD_SATTRADE_ST4200:
1477 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1478 &hauppauge_hvr4000_config,
1479 &core->i2c_adap);
1480 if (fe0->dvb.frontend != NULL)
1481 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1482 break;
1483 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1484 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1485 &cx88_terratec_cinergy_ht_pci_mkii_config,
1486 &core->i2c_adap);
1487 if (fe0->dvb.frontend) {
1488 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1489 if (attach_xc3028(0x61, dev) < 0)
1490 goto frontend_detach;
1491 }
1492 break;
1493 case CX88_BOARD_PROF_7301:{
1494 struct dvb_tuner_ops *tuner_ops = NULL;
1495
1496 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1497 &prof_7301_stv0900_config,
1498 &core->i2c_adap, 0);
1499 if (fe0->dvb.frontend != NULL) {
1500 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1501 &prof_7301_stb6100_config,
1502 &core->i2c_adap))
1503 goto frontend_detach;
1504
1505 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1506 tuner_ops->set_frequency = stb6100_set_freq;
1507 tuner_ops->get_frequency = stb6100_get_freq;
1508 tuner_ops->set_bandwidth = stb6100_set_bandw;
1509 tuner_ops->get_bandwidth = stb6100_get_bandw;
1510
1511 core->prev_set_voltage =
1512 fe0->dvb.frontend->ops.set_voltage;
1513 fe0->dvb.frontend->ops.set_voltage =
1514 tevii_dvbs_set_voltage;
1515 }
1516 break;
1517 }
1518 case CX88_BOARD_SAMSUNG_SMT_7020:
1519 dev->ts_gen_cntrl = 0x08;
1520
1521 cx_set(MO_GP0_IO, 0x0101);
1522
1523 cx_clear(MO_GP0_IO, 0x01);
1524 mdelay(100);
1525 cx_set(MO_GP0_IO, 0x01);
1526 mdelay(200);
1527
1528 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1529 &samsung_stv0299_config,
1530 &dev->core->i2c_adap);
1531 if (fe0->dvb.frontend) {
1532 fe0->dvb.frontend->ops.tuner_ops.set_params =
1533 samsung_smt_7020_tuner_set_params;
1534 fe0->dvb.frontend->tuner_priv =
1535 &dev->core->i2c_adap;
1536 fe0->dvb.frontend->ops.set_voltage =
1537 samsung_smt_7020_set_voltage;
1538 fe0->dvb.frontend->ops.set_tone =
1539 samsung_smt_7020_set_tone;
1540 }
1541
1542 break;
1543 case CX88_BOARD_TWINHAN_VP1027_DVBS:
1544 dev->ts_gen_cntrl = 0x00;
1545 fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1546 &twinhan_vp1027,
1547 &core->i2c_adap);
1548 if (fe0->dvb.frontend) {
1549 core->prev_set_voltage =
1550 fe0->dvb.frontend->ops.set_voltage;
1551 fe0->dvb.frontend->ops.set_voltage =
1552 vp1027_set_voltage;
1553 }
1554 break;
1555
1556 default:
1557 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1558 core->name);
1559 break;
1560 }
1561
1562 if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
1563 printk(KERN_ERR
1564 "%s/2: frontend initialization failed\n",
1565 core->name);
1566 goto frontend_detach;
1567 }
1568 /* define general-purpose callback pointer */
1569 fe0->dvb.frontend->callback = cx88_tuner_callback;
1570
1571 /* Ensure all frontends negotiate bus access */
1572 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1573 if (fe1)
1574 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1575
1576 /* Put the analog decoder in standby to keep it quiet */
1577 call_all(core, core, s_power, 0);
1578
1579 /* register everything */
1580 res = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1581 &dev->pci->dev, adapter_nr, mfe_shared, NULL);
1582 if (res)
1583 goto frontend_detach;
1584 return res;
1585
1586 frontend_detach:
1587 core->gate_ctrl = NULL;
1588 videobuf_dvb_dealloc_frontends(&dev->frontends);
1589 return res;
1590 }
1591
1592 /* ----------------------------------------------------------- */
1593
1594 /* CX8802 MPEG -> mini driver - We have been given the hardware */
cx8802_dvb_advise_acquire(struct cx8802_driver * drv)1595 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1596 {
1597 struct cx88_core *core = drv->core;
1598 int err = 0;
1599 dprintk( 1, "%s\n", __func__);
1600
1601 switch (core->boardnr) {
1602 case CX88_BOARD_HAUPPAUGE_HVR1300:
1603 /* We arrive here with either the cx23416 or the cx22702
1604 * on the bus. Take the bus from the cx23416 and enable the
1605 * cx22702 demod
1606 */
1607 /* Toggle reset on cx22702 leaving i2c active */
1608 cx_set(MO_GP0_IO, 0x00000080);
1609 udelay(1000);
1610 cx_clear(MO_GP0_IO, 0x00000080);
1611 udelay(50);
1612 cx_set(MO_GP0_IO, 0x00000080);
1613 udelay(1000);
1614 /* enable the cx22702 pins */
1615 cx_clear(MO_GP0_IO, 0x00000004);
1616 udelay(1000);
1617 break;
1618
1619 case CX88_BOARD_HAUPPAUGE_HVR3000:
1620 case CX88_BOARD_HAUPPAUGE_HVR4000:
1621 /* Toggle reset on cx22702 leaving i2c active */
1622 cx_set(MO_GP0_IO, 0x00000080);
1623 udelay(1000);
1624 cx_clear(MO_GP0_IO, 0x00000080);
1625 udelay(50);
1626 cx_set(MO_GP0_IO, 0x00000080);
1627 udelay(1000);
1628 switch (core->dvbdev->frontends.active_fe_id) {
1629 case 1: /* DVB-S/S2 Enabled */
1630 /* tri-state the cx22702 pins */
1631 cx_set(MO_GP0_IO, 0x00000004);
1632 /* Take the cx24116/cx24123 out of reset */
1633 cx_write(MO_SRST_IO, 1);
1634 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1635 break;
1636 case 2: /* DVB-T Enabled */
1637 /* Put the cx24116/cx24123 into reset */
1638 cx_write(MO_SRST_IO, 0);
1639 /* enable the cx22702 pins */
1640 cx_clear(MO_GP0_IO, 0x00000004);
1641 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1642 break;
1643 }
1644 udelay(1000);
1645 break;
1646
1647 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1648 /* set RF input to AIR for DVB-T (GPIO 16) */
1649 cx_write(MO_GP2_IO, 0x0101);
1650 break;
1651
1652 default:
1653 err = -ENODEV;
1654 }
1655 return err;
1656 }
1657
1658 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
cx8802_dvb_advise_release(struct cx8802_driver * drv)1659 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1660 {
1661 struct cx88_core *core = drv->core;
1662 int err = 0;
1663 dprintk( 1, "%s\n", __func__);
1664
1665 switch (core->boardnr) {
1666 case CX88_BOARD_HAUPPAUGE_HVR1300:
1667 /* Do Nothing, leave the cx22702 on the bus. */
1668 break;
1669 case CX88_BOARD_HAUPPAUGE_HVR3000:
1670 case CX88_BOARD_HAUPPAUGE_HVR4000:
1671 break;
1672 default:
1673 err = -ENODEV;
1674 }
1675 return err;
1676 }
1677
cx8802_dvb_probe(struct cx8802_driver * drv)1678 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1679 {
1680 struct cx88_core *core = drv->core;
1681 struct cx8802_dev *dev = drv->core->dvbdev;
1682 int err;
1683 struct videobuf_dvb_frontend *fe;
1684 int i;
1685
1686 dprintk( 1, "%s\n", __func__);
1687 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1688 core->boardnr,
1689 core->name,
1690 core->pci_bus,
1691 core->pci_slot);
1692
1693 err = -ENODEV;
1694 if (!(core->board.mpeg & CX88_MPEG_DVB))
1695 goto fail_core;
1696
1697 /* If vp3054 isn't enabled, a stub will just return 0 */
1698 err = vp3054_i2c_probe(dev);
1699 if (0 != err)
1700 goto fail_core;
1701
1702 /* dvb stuff */
1703 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1704 dev->ts_gen_cntrl = 0x0c;
1705
1706 err = cx8802_alloc_frontends(dev);
1707 if (err)
1708 goto fail_core;
1709
1710 err = -ENODEV;
1711 for (i = 1; i <= core->board.num_frontends; i++) {
1712 fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
1713 if (fe == NULL) {
1714 printk(KERN_ERR "%s() failed to get frontend(%d)\n",
1715 __func__, i);
1716 goto fail_probe;
1717 }
1718 videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
1719 &dev->pci->dev, &dev->slock,
1720 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1721 V4L2_FIELD_TOP,
1722 sizeof(struct cx88_buffer),
1723 dev, NULL);
1724 /* init struct videobuf_dvb */
1725 fe->dvb.name = dev->core->name;
1726 }
1727
1728 err = dvb_register(dev);
1729 if (err)
1730 /* frontends/adapter de-allocated in dvb_register */
1731 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1732 core->name, err);
1733 return err;
1734 fail_probe:
1735 videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
1736 fail_core:
1737 return err;
1738 }
1739
cx8802_dvb_remove(struct cx8802_driver * drv)1740 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1741 {
1742 struct cx88_core *core = drv->core;
1743 struct cx8802_dev *dev = drv->core->dvbdev;
1744
1745 dprintk( 1, "%s\n", __func__);
1746
1747 videobuf_dvb_unregister_bus(&dev->frontends);
1748
1749 vp3054_i2c_remove(dev);
1750
1751 core->gate_ctrl = NULL;
1752
1753 return 0;
1754 }
1755
1756 static struct cx8802_driver cx8802_dvb_driver = {
1757 .type_id = CX88_MPEG_DVB,
1758 .hw_access = CX8802_DRVCTL_SHARED,
1759 .probe = cx8802_dvb_probe,
1760 .remove = cx8802_dvb_remove,
1761 .advise_acquire = cx8802_dvb_advise_acquire,
1762 .advise_release = cx8802_dvb_advise_release,
1763 };
1764
dvb_init(void)1765 static int __init dvb_init(void)
1766 {
1767 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
1768 CX88_VERSION);
1769 return cx8802_register_driver(&cx8802_dvb_driver);
1770 }
1771
dvb_fini(void)1772 static void __exit dvb_fini(void)
1773 {
1774 cx8802_unregister_driver(&cx8802_dvb_driver);
1775 }
1776
1777 module_init(dvb_init);
1778 module_exit(dvb_fini);
1779