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1 /*
2  * AD5686R, AD5685R, AD5684R Digital to analog converters  driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/interrupt.h>
10 #include <linux/fs.h>
11 #include <linux/device.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 
19 #include "../iio.h"
20 #include "../sysfs.h"
21 #include "dac.h"
22 
23 #define AD5686_DAC_CHANNELS			4
24 
25 #define AD5686_ADDR(x)				((x) << 16)
26 #define AD5686_CMD(x)				((x) << 20)
27 
28 #define AD5686_ADDR_DAC(chan)		(0x1 << (chan))
29 #define AD5686_ADDR_ALL_DAC			0xF
30 
31 #define AD5686_CMD_NOOP				0x0
32 #define AD5686_CMD_WRITE_INPUT_N		0x1
33 #define AD5686_CMD_UPDATE_DAC_N			0x2
34 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N	0x3
35 #define AD5686_CMD_POWERDOWN_DAC		0x4
36 #define AD5686_CMD_LDAC_MASK			0x5
37 #define AD5686_CMD_RESET			0x6
38 #define AD5686_CMD_INTERNAL_REFER_SETUP		0x7
39 #define AD5686_CMD_DAISY_CHAIN_ENABLE		0x8
40 #define AD5686_CMD_READBACK_ENABLE		0x9
41 
42 #define AD5686_LDAC_PWRDN_NONE			0x0
43 #define AD5686_LDAC_PWRDN_1K			0x1
44 #define AD5686_LDAC_PWRDN_100K			0x2
45 #define AD5686_LDAC_PWRDN_3STATE		0x3
46 
47 /**
48  * struct ad5686_chip_info - chip specific information
49  * @int_vref_mv:	AD5620/40/60: the internal reference voltage
50  * @channel:		channel specification
51 */
52 
53 struct ad5686_chip_info {
54 	u16				int_vref_mv;
55 	struct iio_chan_spec		channel[AD5686_DAC_CHANNELS];
56 };
57 
58 /**
59  * struct ad5446_state - driver instance specific data
60  * @spi:		spi_device
61  * @chip_info:		chip model specific constants, available modes etc
62  * @reg:		supply regulator
63  * @vref_mv:		actual reference voltage used
64  * @pwr_down_mask:	power down mask
65  * @pwr_down_mode:	current power down mode
66  * @data:		spi transfer buffers
67  */
68 
69 struct ad5686_state {
70 	struct spi_device		*spi;
71 	const struct ad5686_chip_info	*chip_info;
72 	struct regulator		*reg;
73 	unsigned short			vref_mv;
74 	unsigned			pwr_down_mask;
75 	unsigned			pwr_down_mode;
76 	/*
77 	 * DMA (thus cache coherency maintenance) requires the
78 	 * transfer buffers to live in their own cache lines.
79 	 */
80 
81 	union {
82 		u32 d32;
83 		u8 d8[4];
84 	} data[3] ____cacheline_aligned;
85 };
86 
87 /**
88  * ad5686_supported_device_ids:
89  */
90 
91 enum ad5686_supported_device_ids {
92 	ID_AD5684,
93 	ID_AD5685,
94 	ID_AD5686,
95 };
96 #define AD5868_CHANNEL(chan, bits, shift) {			\
97 		.type = IIO_VOLTAGE,				\
98 		.indexed = 1,					\
99 		.output = 1,					\
100 		.channel = chan,				\
101 		.info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,	\
102 		.address = AD5686_ADDR_DAC(chan),			\
103 		.scan_type = IIO_ST('u', bits, 16, shift)	\
104 }
105 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
106 	[ID_AD5684] = {
107 		.channel[0] = AD5868_CHANNEL(0, 12, 4),
108 		.channel[1] = AD5868_CHANNEL(1, 12, 4),
109 		.channel[2] = AD5868_CHANNEL(2, 12, 4),
110 		.channel[3] = AD5868_CHANNEL(3, 12, 4),
111 		.int_vref_mv = 2500,
112 	},
113 	[ID_AD5685] = {
114 		.channel[0] = AD5868_CHANNEL(0, 14, 2),
115 		.channel[1] = AD5868_CHANNEL(1, 14, 2),
116 		.channel[2] = AD5868_CHANNEL(2, 14, 2),
117 		.channel[3] = AD5868_CHANNEL(3, 14, 2),
118 		.int_vref_mv = 2500,
119 	},
120 	[ID_AD5686] = {
121 		.channel[0] = AD5868_CHANNEL(0, 16, 0),
122 		.channel[1] = AD5868_CHANNEL(1, 16, 0),
123 		.channel[2] = AD5868_CHANNEL(2, 16, 0),
124 		.channel[3] = AD5868_CHANNEL(3, 16, 0),
125 		.int_vref_mv = 2500,
126 	},
127 };
128 
ad5686_spi_write(struct ad5686_state * st,u8 cmd,u8 addr,u16 val,u8 shift)129 static int ad5686_spi_write(struct ad5686_state *st,
130 			     u8 cmd, u8 addr, u16 val, u8 shift)
131 {
132 	val <<= shift;
133 
134 	st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
135 			      AD5686_ADDR(addr) |
136 			      val);
137 
138 	return spi_write(st->spi, &st->data[0].d8[1], 3);
139 }
140 
ad5686_spi_read(struct ad5686_state * st,u8 addr)141 static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
142 {
143 	struct spi_transfer t[] = {
144 		{
145 			.tx_buf = &st->data[0].d8[1],
146 			.len = 3,
147 			.cs_change = 1,
148 		}, {
149 			.tx_buf = &st->data[1].d8[1],
150 			.rx_buf = &st->data[2].d8[1],
151 			.len = 3,
152 		},
153 	};
154 	struct spi_message m;
155 	int ret;
156 
157 	spi_message_init(&m);
158 	spi_message_add_tail(&t[0], &m);
159 	spi_message_add_tail(&t[1], &m);
160 
161 	st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
162 			      AD5686_ADDR(addr));
163 	st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
164 
165 	ret = spi_sync(st->spi, &m);
166 	if (ret < 0)
167 		return ret;
168 
169 	return be32_to_cpu(st->data[2].d32);
170 }
171 
ad5686_read_powerdown_mode(struct device * dev,struct device_attribute * attr,char * buf)172 static ssize_t ad5686_read_powerdown_mode(struct device *dev,
173 				      struct device_attribute *attr, char *buf)
174 {
175 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
176 	struct ad5686_state *st = iio_priv(indio_dev);
177 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
178 
179 	char mode[][15] = {"", "1kohm_to_gnd", "100kohm_to_gnd", "three_state"};
180 
181 	return sprintf(buf, "%s\n", mode[(st->pwr_down_mode >>
182 					 (this_attr->address * 2)) & 0x3]);
183 }
184 
ad5686_write_powerdown_mode(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)185 static ssize_t ad5686_write_powerdown_mode(struct device *dev,
186 				       struct device_attribute *attr,
187 				       const char *buf, size_t len)
188 {
189 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
190 	struct ad5686_state *st = iio_priv(indio_dev);
191 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
192 	unsigned mode;
193 
194 	if (sysfs_streq(buf, "1kohm_to_gnd"))
195 		mode = AD5686_LDAC_PWRDN_1K;
196 	else if (sysfs_streq(buf, "100kohm_to_gnd"))
197 		mode = AD5686_LDAC_PWRDN_100K;
198 	else if (sysfs_streq(buf, "three_state"))
199 		mode = AD5686_LDAC_PWRDN_3STATE;
200 	else
201 		return  -EINVAL;
202 
203 	st->pwr_down_mode &= ~(0x3 << (this_attr->address * 2));
204 	st->pwr_down_mode |= (mode << (this_attr->address * 2));
205 
206 	return len;
207 }
208 
ad5686_read_dac_powerdown(struct device * dev,struct device_attribute * attr,char * buf)209 static ssize_t ad5686_read_dac_powerdown(struct device *dev,
210 					   struct device_attribute *attr,
211 					   char *buf)
212 {
213 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
214 	struct ad5686_state *st = iio_priv(indio_dev);
215 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
216 
217 	return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
218 			(0x3 << (this_attr->address * 2))));
219 }
220 
ad5686_write_dac_powerdown(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)221 static ssize_t ad5686_write_dac_powerdown(struct device *dev,
222 					    struct device_attribute *attr,
223 					    const char *buf, size_t len)
224 {
225 	bool readin;
226 	int ret;
227 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
228 	struct ad5686_state *st = iio_priv(indio_dev);
229 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
230 
231 	ret = strtobool(buf, &readin);
232 	if (ret)
233 		return ret;
234 
235 	if (readin == true)
236 		st->pwr_down_mask |= (0x3 << (this_attr->address * 2));
237 	else
238 		st->pwr_down_mask &= ~(0x3 << (this_attr->address * 2));
239 
240 	ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
241 			       st->pwr_down_mask & st->pwr_down_mode, 0);
242 
243 	return ret ? ret : len;
244 }
245 
246 static IIO_CONST_ATTR(out_voltage_powerdown_mode_available,
247 			"1kohm_to_gnd 100kohm_to_gnd three_state");
248 
249 #define IIO_DEV_ATTR_DAC_POWERDOWN_MODE(_num)				\
250 	IIO_DEVICE_ATTR(out_voltage##_num##_powerdown_mode,		\
251 			S_IRUGO | S_IWUSR,				\
252 			ad5686_read_powerdown_mode,			\
253 			ad5686_write_powerdown_mode, _num)
254 
255 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(0);
256 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(1);
257 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(2);
258 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(3);
259 
260 #define IIO_DEV_ATTR_DAC_POWERDOWN(_num)				\
261 	IIO_DEVICE_ATTR(out_voltage##_num##_powerdown,			\
262 			S_IRUGO | S_IWUSR,				\
263 			ad5686_read_dac_powerdown,			\
264 			ad5686_write_dac_powerdown, _num)
265 
266 static IIO_DEV_ATTR_DAC_POWERDOWN(0);
267 static IIO_DEV_ATTR_DAC_POWERDOWN(1);
268 static IIO_DEV_ATTR_DAC_POWERDOWN(2);
269 static IIO_DEV_ATTR_DAC_POWERDOWN(3);
270 
271 static struct attribute *ad5686_attributes[] = {
272 	&iio_dev_attr_out_voltage0_powerdown.dev_attr.attr,
273 	&iio_dev_attr_out_voltage1_powerdown.dev_attr.attr,
274 	&iio_dev_attr_out_voltage2_powerdown.dev_attr.attr,
275 	&iio_dev_attr_out_voltage3_powerdown.dev_attr.attr,
276 	&iio_dev_attr_out_voltage0_powerdown_mode.dev_attr.attr,
277 	&iio_dev_attr_out_voltage1_powerdown_mode.dev_attr.attr,
278 	&iio_dev_attr_out_voltage2_powerdown_mode.dev_attr.attr,
279 	&iio_dev_attr_out_voltage3_powerdown_mode.dev_attr.attr,
280 	&iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
281 	NULL,
282 };
283 
284 static const struct attribute_group ad5686_attribute_group = {
285 	.attrs = ad5686_attributes,
286 };
287 
ad5686_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)288 static int ad5686_read_raw(struct iio_dev *indio_dev,
289 			   struct iio_chan_spec const *chan,
290 			   int *val,
291 			   int *val2,
292 			   long m)
293 {
294 	struct ad5686_state *st = iio_priv(indio_dev);
295 	unsigned long scale_uv;
296 	int ret;
297 
298 	switch (m) {
299 	case 0:
300 		mutex_lock(&indio_dev->mlock);
301 		ret = ad5686_spi_read(st, chan->address);
302 		mutex_unlock(&indio_dev->mlock);
303 		if (ret < 0)
304 			return ret;
305 		*val = ret;
306 		return IIO_VAL_INT;
307 		break;
308 	case IIO_CHAN_INFO_SCALE:
309 		scale_uv = (st->vref_mv * 100000)
310 			>> (chan->scan_type.realbits);
311 		*val =  scale_uv / 100000;
312 		*val2 = (scale_uv % 100000) * 10;
313 		return IIO_VAL_INT_PLUS_MICRO;
314 
315 	}
316 	return -EINVAL;
317 }
318 
ad5686_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)319 static int ad5686_write_raw(struct iio_dev *indio_dev,
320 			       struct iio_chan_spec const *chan,
321 			       int val,
322 			       int val2,
323 			       long mask)
324 {
325 	struct ad5686_state *st = iio_priv(indio_dev);
326 	int ret;
327 
328 	switch (mask) {
329 	case 0:
330 		if (val > (1 << chan->scan_type.realbits) || val < 0)
331 			return -EINVAL;
332 
333 		mutex_lock(&indio_dev->mlock);
334 		ret = ad5686_spi_write(st,
335 				 AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
336 				 chan->address,
337 				 val,
338 				 chan->scan_type.shift);
339 		mutex_unlock(&indio_dev->mlock);
340 		break;
341 	default:
342 		ret = -EINVAL;
343 	}
344 
345 	return ret;
346 }
347 
348 static const struct iio_info ad5686_info = {
349 	.read_raw = ad5686_read_raw,
350 	.write_raw = ad5686_write_raw,
351 	.attrs = &ad5686_attribute_group,
352 	.driver_module = THIS_MODULE,
353 };
354 
ad5686_probe(struct spi_device * spi)355 static int __devinit ad5686_probe(struct spi_device *spi)
356 {
357 	struct ad5686_state *st;
358 	struct iio_dev *indio_dev;
359 	int ret, regdone = 0, voltage_uv = 0;
360 
361 	indio_dev = iio_allocate_device(sizeof(*st));
362 	if (indio_dev == NULL)
363 		return  -ENOMEM;
364 
365 	st = iio_priv(indio_dev);
366 	spi_set_drvdata(spi, indio_dev);
367 
368 	st->reg = regulator_get(&spi->dev, "vcc");
369 	if (!IS_ERR(st->reg)) {
370 		ret = regulator_enable(st->reg);
371 		if (ret)
372 			goto error_put_reg;
373 
374 		voltage_uv = regulator_get_voltage(st->reg);
375 	}
376 
377 	st->chip_info =
378 		&ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
379 
380 	if (voltage_uv)
381 		st->vref_mv = voltage_uv / 1000;
382 	else
383 		st->vref_mv = st->chip_info->int_vref_mv;
384 
385 	st->spi = spi;
386 
387 	indio_dev->dev.parent = &spi->dev;
388 	indio_dev->name = spi_get_device_id(spi)->name;
389 	indio_dev->info = &ad5686_info;
390 	indio_dev->modes = INDIO_DIRECT_MODE;
391 	indio_dev->channels = st->chip_info->channel;
392 	indio_dev->num_channels = AD5686_DAC_CHANNELS;
393 
394 	regdone = 1;
395 	ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
396 				!!voltage_uv, 0);
397 	if (ret)
398 		goto error_disable_reg;
399 
400 	ret = iio_device_register(indio_dev);
401 	if (ret)
402 		goto error_disable_reg;
403 
404 	return 0;
405 
406 error_disable_reg:
407 	if (!IS_ERR(st->reg))
408 		regulator_disable(st->reg);
409 error_put_reg:
410 	if (!IS_ERR(st->reg))
411 		regulator_put(st->reg);
412 
413 	iio_free_device(indio_dev);
414 
415 	return ret;
416 }
417 
ad5686_remove(struct spi_device * spi)418 static int __devexit ad5686_remove(struct spi_device *spi)
419 {
420 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
421 	struct ad5686_state *st = iio_priv(indio_dev);
422 
423 	iio_device_unregister(indio_dev);
424 	if (!IS_ERR(st->reg)) {
425 		regulator_disable(st->reg);
426 		regulator_put(st->reg);
427 	}
428 	iio_free_device(indio_dev);
429 
430 	return 0;
431 }
432 
433 static const struct spi_device_id ad5686_id[] = {
434 	{"ad5684", ID_AD5684},
435 	{"ad5685", ID_AD5685},
436 	{"ad5686", ID_AD5686},
437 	{}
438 };
439 MODULE_DEVICE_TABLE(spi, ad5686_id);
440 
441 static struct spi_driver ad5686_driver = {
442 	.driver = {
443 		   .name = "ad5686",
444 		   .owner = THIS_MODULE,
445 		   },
446 	.probe = ad5686_probe,
447 	.remove = __devexit_p(ad5686_remove),
448 	.id_table = ad5686_id,
449 };
450 module_spi_driver(ad5686_driver);
451 
452 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
453 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
454 MODULE_LICENSE("GPL v2");
455