1 /*
2 * Standalone EHCI usb debug driver
3 *
4 * Originally written by:
5 * Eric W. Biederman" <ebiederm@xmission.com> and
6 * Yinghai Lu <yhlu.kernel@gmail.com>
7 *
8 * Changes for early/late printk and HW errata:
9 * Jason Wessel <jason.wessel@windriver.com>
10 * Copyright (C) 2009 Wind River Systems, Inc.
11 *
12 */
13
14 #include <linux/console.h>
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/pci_regs.h>
18 #include <linux/pci_ids.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/ehci_def.h>
21 #include <linux/delay.h>
22 #include <linux/serial_core.h>
23 #include <linux/kgdb.h>
24 #include <linux/kthread.h>
25 #include <asm/io.h>
26 #include <asm/pci-direct.h>
27 #include <asm/fixmap.h>
28
29 /* The code here is intended to talk directly to the EHCI debug port
30 * and does not require that you have any kind of USB host controller
31 * drivers or USB device drivers compiled into the kernel.
32 *
33 * If you make a change to anything in here, the following test cases
34 * need to pass where a USB debug device works in the following
35 * configurations.
36 *
37 * 1. boot args: earlyprintk=dbgp
38 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
39 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
40 * 2. boot args: earlyprintk=dbgp,keep
41 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
42 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
43 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
44 * o kernel has CONFIG_USB_EHCI_HCD=y and
45 * CONFIG_USB_SERIAL_DEBUG=y
46 * 4. boot args: earlyprintk=vga,dbgp
47 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
48 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
49 *
50 * For the 4th configuration you can turn on or off the DBGP_DEBUG
51 * such that you can debug the dbgp device's driver code.
52 */
53
54 static int dbgp_phys_port = 1;
55
56 static struct ehci_caps __iomem *ehci_caps;
57 static struct ehci_regs __iomem *ehci_regs;
58 static struct ehci_dbg_port __iomem *ehci_debug;
59 static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
60 static unsigned int dbgp_endpoint_out;
61 static unsigned int dbgp_endpoint_in;
62
63 struct ehci_dev {
64 u32 bus;
65 u32 slot;
66 u32 func;
67 };
68
69 static struct ehci_dev ehci_dev;
70
71 #define USB_DEBUG_DEVNUM 127
72
73 #ifdef DBGP_DEBUG
74 #define dbgp_printk printk
dbgp_ehci_status(char * str)75 static void dbgp_ehci_status(char *str)
76 {
77 if (!ehci_debug)
78 return;
79 dbgp_printk("dbgp: %s\n", str);
80 dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
81 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
82 dbgp_printk(" ehci conf flg: %08x\n",
83 readl(&ehci_regs->configured_flag));
84 dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
85 dbgp_printk(" ehci portsc : %08x\n",
86 readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
87 }
88 #else
dbgp_ehci_status(char * str)89 static inline void dbgp_ehci_status(char *str) { }
dbgp_printk(const char * fmt,...)90 static inline void dbgp_printk(const char *fmt, ...) { }
91 #endif
92
dbgp_len_update(u32 x,u32 len)93 static inline u32 dbgp_len_update(u32 x, u32 len)
94 {
95 return (x & ~0x0f) | (len & 0x0f);
96 }
97
98 #ifdef CONFIG_KGDB
99 static struct kgdb_io kgdbdbgp_io_ops;
100 #define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
101 #else
102 #define dbgp_kgdb_mode (0)
103 #endif
104
105 /* Local version of HC_LENGTH macro as ehci struct is not available here */
106 #define EARLY_HC_LENGTH(p) (0x00ff & (p)) /* bits 7 : 0 */
107
108 /*
109 * USB Packet IDs (PIDs)
110 */
111
112 /* token */
113 #define USB_PID_OUT 0xe1
114 #define USB_PID_IN 0x69
115 #define USB_PID_SOF 0xa5
116 #define USB_PID_SETUP 0x2d
117 /* handshake */
118 #define USB_PID_ACK 0xd2
119 #define USB_PID_NAK 0x5a
120 #define USB_PID_STALL 0x1e
121 #define USB_PID_NYET 0x96
122 /* data */
123 #define USB_PID_DATA0 0xc3
124 #define USB_PID_DATA1 0x4b
125 #define USB_PID_DATA2 0x87
126 #define USB_PID_MDATA 0x0f
127 /* Special */
128 #define USB_PID_PREAMBLE 0x3c
129 #define USB_PID_ERR 0x3c
130 #define USB_PID_SPLIT 0x78
131 #define USB_PID_PING 0xb4
132 #define USB_PID_UNDEF_0 0xf0
133
134 #define USB_PID_DATA_TOGGLE 0x88
135 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
136
137 #define PCI_CAP_ID_EHCI_DEBUG 0xa
138
139 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
140 #define HUB_SHORT_RESET_TIME 10
141 #define HUB_LONG_RESET_TIME 200
142 #define HUB_RESET_TIMEOUT 500
143
144 #define DBGP_MAX_PACKET 8
145 #define DBGP_TIMEOUT (250 * 1000)
146 #define DBGP_LOOPS 1000
147
dbgp_pid_write_update(u32 x,u32 tok)148 static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
149 {
150 static int data0 = USB_PID_DATA1;
151 data0 ^= USB_PID_DATA_TOGGLE;
152 return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
153 }
154
dbgp_pid_read_update(u32 x,u32 tok)155 static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
156 {
157 return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
158 }
159
dbgp_wait_until_complete(void)160 static int dbgp_wait_until_complete(void)
161 {
162 u32 ctrl;
163 int loop = DBGP_TIMEOUT;
164
165 do {
166 ctrl = readl(&ehci_debug->control);
167 /* Stop when the transaction is finished */
168 if (ctrl & DBGP_DONE)
169 break;
170 udelay(1);
171 } while (--loop > 0);
172
173 if (!loop)
174 return -DBGP_TIMEOUT;
175
176 /*
177 * Now that we have observed the completed transaction,
178 * clear the done bit.
179 */
180 writel(ctrl | DBGP_DONE, &ehci_debug->control);
181 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
182 }
183
dbgp_mdelay(int ms)184 static inline void dbgp_mdelay(int ms)
185 {
186 int i;
187
188 while (ms--) {
189 for (i = 0; i < 1000; i++)
190 outb(0x1, 0x80);
191 }
192 }
193
dbgp_breath(void)194 static void dbgp_breath(void)
195 {
196 /* Sleep to give the debug port a chance to breathe */
197 }
198
dbgp_wait_until_done(unsigned ctrl,int loop)199 static int dbgp_wait_until_done(unsigned ctrl, int loop)
200 {
201 u32 pids, lpid;
202 int ret;
203
204 retry:
205 writel(ctrl | DBGP_GO, &ehci_debug->control);
206 ret = dbgp_wait_until_complete();
207 pids = readl(&ehci_debug->pids);
208 lpid = DBGP_PID_GET(pids);
209
210 if (ret < 0) {
211 /* A -DBGP_TIMEOUT failure here means the device has
212 * failed, perhaps because it was unplugged, in which
213 * case we do not want to hang the system so the dbgp
214 * will be marked as unsafe to use. EHCI reset is the
215 * only way to recover if you unplug the dbgp device.
216 */
217 if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
218 dbgp_not_safe = 1;
219 if (ret == -DBGP_ERR_BAD && --loop > 0)
220 goto retry;
221 return ret;
222 }
223
224 /*
225 * If the port is getting full or it has dropped data
226 * start pacing ourselves, not necessary but it's friendly.
227 */
228 if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
229 dbgp_breath();
230
231 /* If I get a NACK reissue the transmission */
232 if (lpid == USB_PID_NAK) {
233 if (--loop > 0)
234 goto retry;
235 }
236
237 return ret;
238 }
239
dbgp_set_data(const void * buf,int size)240 static inline void dbgp_set_data(const void *buf, int size)
241 {
242 const unsigned char *bytes = buf;
243 u32 lo, hi;
244 int i;
245
246 lo = hi = 0;
247 for (i = 0; i < 4 && i < size; i++)
248 lo |= bytes[i] << (8*i);
249 for (; i < 8 && i < size; i++)
250 hi |= bytes[i] << (8*(i - 4));
251 writel(lo, &ehci_debug->data03);
252 writel(hi, &ehci_debug->data47);
253 }
254
dbgp_get_data(void * buf,int size)255 static inline void dbgp_get_data(void *buf, int size)
256 {
257 unsigned char *bytes = buf;
258 u32 lo, hi;
259 int i;
260
261 lo = readl(&ehci_debug->data03);
262 hi = readl(&ehci_debug->data47);
263 for (i = 0; i < 4 && i < size; i++)
264 bytes[i] = (lo >> (8*i)) & 0xff;
265 for (; i < 8 && i < size; i++)
266 bytes[i] = (hi >> (8*(i - 4))) & 0xff;
267 }
268
dbgp_bulk_write(unsigned devnum,unsigned endpoint,const char * bytes,int size)269 static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
270 const char *bytes, int size)
271 {
272 int ret;
273 u32 addr;
274 u32 pids, ctrl;
275
276 if (size > DBGP_MAX_PACKET)
277 return -1;
278
279 addr = DBGP_EPADDR(devnum, endpoint);
280
281 pids = readl(&ehci_debug->pids);
282 pids = dbgp_pid_write_update(pids, USB_PID_OUT);
283
284 ctrl = readl(&ehci_debug->control);
285 ctrl = dbgp_len_update(ctrl, size);
286 ctrl |= DBGP_OUT;
287 ctrl |= DBGP_GO;
288
289 dbgp_set_data(bytes, size);
290 writel(addr, &ehci_debug->address);
291 writel(pids, &ehci_debug->pids);
292 ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
293
294 return ret;
295 }
296
dbgp_bulk_read(unsigned devnum,unsigned endpoint,void * data,int size,int loops)297 static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
298 int size, int loops)
299 {
300 u32 pids, addr, ctrl;
301 int ret;
302
303 if (size > DBGP_MAX_PACKET)
304 return -1;
305
306 addr = DBGP_EPADDR(devnum, endpoint);
307
308 pids = readl(&ehci_debug->pids);
309 pids = dbgp_pid_read_update(pids, USB_PID_IN);
310
311 ctrl = readl(&ehci_debug->control);
312 ctrl = dbgp_len_update(ctrl, size);
313 ctrl &= ~DBGP_OUT;
314 ctrl |= DBGP_GO;
315
316 writel(addr, &ehci_debug->address);
317 writel(pids, &ehci_debug->pids);
318 ret = dbgp_wait_until_done(ctrl, loops);
319 if (ret < 0)
320 return ret;
321
322 if (size > ret)
323 size = ret;
324 dbgp_get_data(data, size);
325 return ret;
326 }
327
dbgp_control_msg(unsigned devnum,int requesttype,int request,int value,int index,void * data,int size)328 static int dbgp_control_msg(unsigned devnum, int requesttype,
329 int request, int value, int index, void *data, int size)
330 {
331 u32 pids, addr, ctrl;
332 struct usb_ctrlrequest req;
333 int read;
334 int ret;
335
336 read = (requesttype & USB_DIR_IN) != 0;
337 if (size > (read ? DBGP_MAX_PACKET:0))
338 return -1;
339
340 /* Compute the control message */
341 req.bRequestType = requesttype;
342 req.bRequest = request;
343 req.wValue = cpu_to_le16(value);
344 req.wIndex = cpu_to_le16(index);
345 req.wLength = cpu_to_le16(size);
346
347 pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
348 addr = DBGP_EPADDR(devnum, 0);
349
350 ctrl = readl(&ehci_debug->control);
351 ctrl = dbgp_len_update(ctrl, sizeof(req));
352 ctrl |= DBGP_OUT;
353 ctrl |= DBGP_GO;
354
355 /* Send the setup message */
356 dbgp_set_data(&req, sizeof(req));
357 writel(addr, &ehci_debug->address);
358 writel(pids, &ehci_debug->pids);
359 ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
360 if (ret < 0)
361 return ret;
362
363 /* Read the result */
364 return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
365 }
366
367 /* Find a PCI capability */
find_cap(u32 num,u32 slot,u32 func,int cap)368 static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
369 {
370 u8 pos;
371 int bytes;
372
373 if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
374 PCI_STATUS_CAP_LIST))
375 return 0;
376
377 pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
378 for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
379 u8 id;
380
381 pos &= ~3;
382 id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
383 if (id == 0xff)
384 break;
385 if (id == cap)
386 return pos;
387
388 pos = read_pci_config_byte(num, slot, func,
389 pos+PCI_CAP_LIST_NEXT);
390 }
391 return 0;
392 }
393
__find_dbgp(u32 bus,u32 slot,u32 func)394 static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
395 {
396 u32 class;
397
398 class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
399 if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
400 return 0;
401
402 return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
403 }
404
find_dbgp(int ehci_num,u32 * rbus,u32 * rslot,u32 * rfunc)405 static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
406 {
407 u32 bus, slot, func;
408
409 for (bus = 0; bus < 256; bus++) {
410 for (slot = 0; slot < 32; slot++) {
411 for (func = 0; func < 8; func++) {
412 unsigned cap;
413
414 cap = __find_dbgp(bus, slot, func);
415
416 if (!cap)
417 continue;
418 if (ehci_num-- != 0)
419 continue;
420 *rbus = bus;
421 *rslot = slot;
422 *rfunc = func;
423 return cap;
424 }
425 }
426 }
427 return 0;
428 }
429
dbgp_ehci_startup(void)430 static int dbgp_ehci_startup(void)
431 {
432 u32 ctrl, cmd, status;
433 int loop;
434
435 /* Claim ownership, but do not enable yet */
436 ctrl = readl(&ehci_debug->control);
437 ctrl |= DBGP_OWNER;
438 ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
439 writel(ctrl, &ehci_debug->control);
440 udelay(1);
441
442 dbgp_ehci_status("EHCI startup");
443 /* Start the ehci running */
444 cmd = readl(&ehci_regs->command);
445 cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
446 cmd |= CMD_RUN;
447 writel(cmd, &ehci_regs->command);
448
449 /* Ensure everything is routed to the EHCI */
450 writel(FLAG_CF, &ehci_regs->configured_flag);
451
452 /* Wait until the controller is no longer halted */
453 loop = 1000;
454 do {
455 status = readl(&ehci_regs->status);
456 if (!(status & STS_HALT))
457 break;
458 udelay(1);
459 } while (--loop > 0);
460
461 if (!loop) {
462 dbgp_printk("ehci can not be started\n");
463 return -ENODEV;
464 }
465 dbgp_printk("ehci started\n");
466 return 0;
467 }
468
dbgp_ehci_controller_reset(void)469 static int dbgp_ehci_controller_reset(void)
470 {
471 int loop = 250 * 1000;
472 u32 cmd;
473
474 /* Reset the EHCI controller */
475 cmd = readl(&ehci_regs->command);
476 cmd |= CMD_RESET;
477 writel(cmd, &ehci_regs->command);
478 do {
479 cmd = readl(&ehci_regs->command);
480 } while ((cmd & CMD_RESET) && (--loop > 0));
481
482 if (!loop) {
483 dbgp_printk("can not reset ehci\n");
484 return -1;
485 }
486 dbgp_ehci_status("ehci reset done");
487 return 0;
488 }
489 static int ehci_wait_for_port(int port);
490 /* Return 0 on success
491 * Return -ENODEV for any general failure
492 * Return -EIO if wait for port fails
493 */
dbgp_external_startup(void)494 int dbgp_external_startup(void)
495 {
496 int devnum;
497 struct usb_debug_descriptor dbgp_desc;
498 int ret;
499 u32 ctrl, portsc, cmd;
500 int dbg_port = dbgp_phys_port;
501 int tries = 3;
502 int reset_port_tries = 1;
503 int try_hard_once = 1;
504
505 try_port_reset_again:
506 ret = dbgp_ehci_startup();
507 if (ret)
508 return ret;
509
510 /* Wait for a device to show up in the debug port */
511 ret = ehci_wait_for_port(dbg_port);
512 if (ret < 0) {
513 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
514 if (!(portsc & PORT_CONNECT) && try_hard_once) {
515 /* Last ditch effort to try to force enable
516 * the debug device by using the packet test
517 * ehci command to try and wake it up. */
518 try_hard_once = 0;
519 cmd = readl(&ehci_regs->command);
520 cmd &= ~CMD_RUN;
521 writel(cmd, &ehci_regs->command);
522 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
523 portsc |= PORT_TEST_PKT;
524 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
525 dbgp_ehci_status("Trying to force debug port online");
526 mdelay(50);
527 dbgp_ehci_controller_reset();
528 goto try_port_reset_again;
529 } else if (reset_port_tries--) {
530 goto try_port_reset_again;
531 }
532 dbgp_printk("No device found in debug port\n");
533 return -EIO;
534 }
535 dbgp_ehci_status("wait for port done");
536
537 /* Enable the debug port */
538 ctrl = readl(&ehci_debug->control);
539 ctrl |= DBGP_CLAIM;
540 writel(ctrl, &ehci_debug->control);
541 ctrl = readl(&ehci_debug->control);
542 if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
543 dbgp_printk("No device in debug port\n");
544 writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
545 return -ENODEV;
546 }
547 dbgp_ehci_status("debug ported enabled");
548
549 /* Completely transfer the debug device to the debug controller */
550 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
551 portsc &= ~PORT_PE;
552 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
553
554 dbgp_mdelay(100);
555
556 try_again:
557 /* Find the debug device and make it device number 127 */
558 for (devnum = 0; devnum <= 127; devnum++) {
559 ret = dbgp_control_msg(devnum,
560 USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
561 USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
562 &dbgp_desc, sizeof(dbgp_desc));
563 if (ret > 0)
564 break;
565 }
566 if (devnum > 127) {
567 dbgp_printk("Could not find attached debug device\n");
568 goto err;
569 }
570 if (ret < 0) {
571 dbgp_printk("Attached device is not a debug device\n");
572 goto err;
573 }
574 dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
575 dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
576
577 /* Move the device to 127 if it isn't already there */
578 if (devnum != USB_DEBUG_DEVNUM) {
579 ret = dbgp_control_msg(devnum,
580 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
581 USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
582 if (ret < 0) {
583 dbgp_printk("Could not move attached device to %d\n",
584 USB_DEBUG_DEVNUM);
585 goto err;
586 }
587 devnum = USB_DEBUG_DEVNUM;
588 dbgp_printk("debug device renamed to 127\n");
589 }
590
591 /* Enable the debug interface */
592 ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
593 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
594 USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
595 if (ret < 0) {
596 dbgp_printk(" Could not enable the debug device\n");
597 goto err;
598 }
599 dbgp_printk("debug interface enabled\n");
600 /* Perform a small write to get the even/odd data state in sync
601 */
602 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
603 if (ret < 0) {
604 dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
605 goto err;
606 }
607 dbgp_printk("small write done\n");
608 dbgp_not_safe = 0;
609
610 return 0;
611 err:
612 if (tries--)
613 goto try_again;
614 return -ENODEV;
615 }
616 EXPORT_SYMBOL_GPL(dbgp_external_startup);
617
ehci_reset_port(int port)618 static int ehci_reset_port(int port)
619 {
620 u32 portsc;
621 u32 delay_time, delay;
622 int loop;
623
624 dbgp_ehci_status("reset port");
625 /* Reset the usb debug port */
626 portsc = readl(&ehci_regs->port_status[port - 1]);
627 portsc &= ~PORT_PE;
628 portsc |= PORT_RESET;
629 writel(portsc, &ehci_regs->port_status[port - 1]);
630
631 delay = HUB_ROOT_RESET_TIME;
632 for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
633 delay_time += delay) {
634 dbgp_mdelay(delay);
635 portsc = readl(&ehci_regs->port_status[port - 1]);
636 if (!(portsc & PORT_RESET))
637 break;
638 }
639 if (portsc & PORT_RESET) {
640 /* force reset to complete */
641 loop = 100 * 1000;
642 writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
643 &ehci_regs->port_status[port - 1]);
644 do {
645 udelay(1);
646 portsc = readl(&ehci_regs->port_status[port-1]);
647 } while ((portsc & PORT_RESET) && (--loop > 0));
648 }
649
650 /* Device went away? */
651 if (!(portsc & PORT_CONNECT))
652 return -ENOTCONN;
653
654 /* bomb out completely if something weird happened */
655 if ((portsc & PORT_CSC))
656 return -EINVAL;
657
658 /* If we've finished resetting, then break out of the loop */
659 if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
660 return 0;
661 return -EBUSY;
662 }
663
ehci_wait_for_port(int port)664 static int ehci_wait_for_port(int port)
665 {
666 u32 status;
667 int ret, reps;
668
669 for (reps = 0; reps < 300; reps++) {
670 status = readl(&ehci_regs->status);
671 if (status & STS_PCD)
672 break;
673 dbgp_mdelay(1);
674 }
675 ret = ehci_reset_port(port);
676 if (ret == 0)
677 return 0;
678 return -ENOTCONN;
679 }
680
681 typedef void (*set_debug_port_t)(int port);
682
default_set_debug_port(int port)683 static void __init default_set_debug_port(int port)
684 {
685 }
686
687 static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
688
nvidia_set_debug_port(int port)689 static void __init nvidia_set_debug_port(int port)
690 {
691 u32 dword;
692 dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
693 0x74);
694 dword &= ~(0x0f<<12);
695 dword |= ((port & 0x0f)<<12);
696 write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
697 dword);
698 dbgp_printk("set debug port to %d\n", port);
699 }
700
detect_set_debug_port(void)701 static void __init detect_set_debug_port(void)
702 {
703 u32 vendorid;
704
705 vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
706 0x00);
707
708 if ((vendorid & 0xffff) == 0x10de) {
709 dbgp_printk("using nvidia set_debug_port\n");
710 set_debug_port = nvidia_set_debug_port;
711 }
712 }
713
714 /* The code in early_ehci_bios_handoff() is derived from the usb pci
715 * quirk initialization, but altered so as to use the early PCI
716 * routines. */
717 #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
718 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
early_ehci_bios_handoff(void)719 static void __init early_ehci_bios_handoff(void)
720 {
721 u32 hcc_params = readl(&ehci_caps->hcc_params);
722 int offset = (hcc_params >> 8) & 0xff;
723 u32 cap;
724 int msec;
725
726 if (!offset)
727 return;
728
729 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
730 ehci_dev.func, offset);
731 dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
732
733 if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
734 dbgp_printk("dbgp: BIOS handoff\n");
735 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
736 ehci_dev.func, offset + 3, 1);
737 }
738
739 /* if boot firmware now owns EHCI, spin till it hands it over. */
740 msec = 1000;
741 while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
742 mdelay(10);
743 msec -= 10;
744 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
745 ehci_dev.func, offset);
746 }
747
748 if (cap & EHCI_USBLEGSUP_BIOS) {
749 /* well, possibly buggy BIOS... try to shut it down,
750 * and hope nothing goes too wrong */
751 dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
752 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
753 ehci_dev.func, offset + 2, 0);
754 }
755
756 /* just in case, always disable EHCI SMIs */
757 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
758 offset + EHCI_USBLEGCTLSTS, 0);
759 }
760
ehci_setup(void)761 static int __init ehci_setup(void)
762 {
763 u32 ctrl, portsc, hcs_params;
764 u32 debug_port, new_debug_port = 0, n_ports;
765 int ret, i;
766 int port_map_tried;
767 int playtimes = 3;
768
769 early_ehci_bios_handoff();
770
771 try_next_time:
772 port_map_tried = 0;
773
774 try_next_port:
775
776 hcs_params = readl(&ehci_caps->hcs_params);
777 debug_port = HCS_DEBUG_PORT(hcs_params);
778 dbgp_phys_port = debug_port;
779 n_ports = HCS_N_PORTS(hcs_params);
780
781 dbgp_printk("debug_port: %d\n", debug_port);
782 dbgp_printk("n_ports: %d\n", n_ports);
783 dbgp_ehci_status("");
784
785 for (i = 1; i <= n_ports; i++) {
786 portsc = readl(&ehci_regs->port_status[i-1]);
787 dbgp_printk("portstatus%d: %08x\n", i, portsc);
788 }
789
790 if (port_map_tried && (new_debug_port != debug_port)) {
791 if (--playtimes) {
792 set_debug_port(new_debug_port);
793 goto try_next_time;
794 }
795 return -1;
796 }
797
798 /* Only reset the controller if it is not already in the
799 * configured state */
800 if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
801 if (dbgp_ehci_controller_reset() != 0)
802 return -1;
803 } else {
804 dbgp_ehci_status("ehci skip - already configured");
805 }
806
807 ret = dbgp_external_startup();
808 if (ret == -EIO)
809 goto next_debug_port;
810
811 if (ret < 0) {
812 /* Things didn't work so remove my claim */
813 ctrl = readl(&ehci_debug->control);
814 ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
815 writel(ctrl, &ehci_debug->control);
816 return -1;
817 }
818 return 0;
819
820 next_debug_port:
821 port_map_tried |= (1<<(debug_port - 1));
822 new_debug_port = ((debug_port-1+1)%n_ports) + 1;
823 if (port_map_tried != ((1<<n_ports) - 1)) {
824 set_debug_port(new_debug_port);
825 goto try_next_port;
826 }
827 if (--playtimes) {
828 set_debug_port(new_debug_port);
829 goto try_next_time;
830 }
831
832 return -1;
833 }
834
early_dbgp_init(char * s)835 int __init early_dbgp_init(char *s)
836 {
837 u32 debug_port, bar, offset;
838 u32 bus, slot, func, cap;
839 void __iomem *ehci_bar;
840 u32 dbgp_num;
841 u32 bar_val;
842 char *e;
843 int ret;
844 u8 byte;
845
846 if (!early_pci_allowed())
847 return -1;
848
849 dbgp_num = 0;
850 if (*s)
851 dbgp_num = simple_strtoul(s, &e, 10);
852 dbgp_printk("dbgp_num: %d\n", dbgp_num);
853
854 cap = find_dbgp(dbgp_num, &bus, &slot, &func);
855 if (!cap)
856 return -1;
857
858 dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
859 func);
860
861 debug_port = read_pci_config(bus, slot, func, cap);
862 bar = (debug_port >> 29) & 0x7;
863 bar = (bar * 4) + 0xc;
864 offset = (debug_port >> 16) & 0xfff;
865 dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
866 if (bar != PCI_BASE_ADDRESS_0) {
867 dbgp_printk("only debug ports on bar 1 handled.\n");
868
869 return -1;
870 }
871
872 bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
873 dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
874 if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
875 dbgp_printk("only simple 32bit mmio bars supported\n");
876
877 return -1;
878 }
879
880 /* double check if the mem space is enabled */
881 byte = read_pci_config_byte(bus, slot, func, 0x04);
882 if (!(byte & 0x2)) {
883 byte |= 0x02;
884 write_pci_config_byte(bus, slot, func, 0x04, byte);
885 dbgp_printk("mmio for ehci enabled\n");
886 }
887
888 /*
889 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
890 * than enough. 1K is the biggest I have seen.
891 */
892 set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
893 ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
894 ehci_bar += bar_val & ~PAGE_MASK;
895 dbgp_printk("ehci_bar: %p\n", ehci_bar);
896
897 ehci_caps = ehci_bar;
898 ehci_regs = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
899 ehci_debug = ehci_bar + offset;
900 ehci_dev.bus = bus;
901 ehci_dev.slot = slot;
902 ehci_dev.func = func;
903
904 detect_set_debug_port();
905
906 ret = ehci_setup();
907 if (ret < 0) {
908 dbgp_printk("ehci_setup failed\n");
909 ehci_debug = NULL;
910
911 return -1;
912 }
913 dbgp_ehci_status("early_init_complete");
914
915 return 0;
916 }
917
early_dbgp_write(struct console * con,const char * str,u32 n)918 static void early_dbgp_write(struct console *con, const char *str, u32 n)
919 {
920 int chunk, ret;
921 char buf[DBGP_MAX_PACKET];
922 int use_cr = 0;
923 u32 cmd, ctrl;
924 int reset_run = 0;
925
926 if (!ehci_debug || dbgp_not_safe)
927 return;
928
929 cmd = readl(&ehci_regs->command);
930 if (unlikely(!(cmd & CMD_RUN))) {
931 /* If the ehci controller is not in the run state do extended
932 * checks to see if the acpi or some other initialization also
933 * reset the ehci debug port */
934 ctrl = readl(&ehci_debug->control);
935 if (!(ctrl & DBGP_ENABLED)) {
936 dbgp_not_safe = 1;
937 dbgp_external_startup();
938 } else {
939 cmd |= CMD_RUN;
940 writel(cmd, &ehci_regs->command);
941 reset_run = 1;
942 }
943 }
944 while (n > 0) {
945 for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
946 str++, chunk++, n--) {
947 if (!use_cr && *str == '\n') {
948 use_cr = 1;
949 buf[chunk] = '\r';
950 str--;
951 n++;
952 continue;
953 }
954 if (use_cr)
955 use_cr = 0;
956 buf[chunk] = *str;
957 }
958 if (chunk > 0) {
959 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
960 dbgp_endpoint_out, buf, chunk);
961 }
962 }
963 if (unlikely(reset_run)) {
964 cmd = readl(&ehci_regs->command);
965 cmd &= ~CMD_RUN;
966 writel(cmd, &ehci_regs->command);
967 }
968 }
969
970 struct console early_dbgp_console = {
971 .name = "earlydbg",
972 .write = early_dbgp_write,
973 .flags = CON_PRINTBUFFER,
974 .index = -1,
975 };
976
dbgp_reset_prep(void)977 int dbgp_reset_prep(void)
978 {
979 u32 ctrl;
980
981 dbgp_not_safe = 1;
982 if (!ehci_debug)
983 return 0;
984
985 if ((early_dbgp_console.index != -1 &&
986 !(early_dbgp_console.flags & CON_BOOT)) ||
987 dbgp_kgdb_mode)
988 return 1;
989 /* This means the console is not initialized, or should get
990 * shutdown so as to allow for reuse of the usb device, which
991 * means it is time to shutdown the usb debug port. */
992 ctrl = readl(&ehci_debug->control);
993 if (ctrl & DBGP_ENABLED) {
994 ctrl &= ~(DBGP_CLAIM);
995 writel(ctrl, &ehci_debug->control);
996 }
997 return 0;
998 }
999 EXPORT_SYMBOL_GPL(dbgp_reset_prep);
1000
1001 #ifdef CONFIG_KGDB
1002
1003 static char kgdbdbgp_buf[DBGP_MAX_PACKET];
1004 static int kgdbdbgp_buf_sz;
1005 static int kgdbdbgp_buf_idx;
1006 static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
1007
kgdbdbgp_read_char(void)1008 static int kgdbdbgp_read_char(void)
1009 {
1010 int ret;
1011
1012 if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
1013 char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
1014 return ch;
1015 }
1016
1017 ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
1018 &kgdbdbgp_buf, DBGP_MAX_PACKET,
1019 kgdbdbgp_loop_cnt);
1020 if (ret <= 0)
1021 return NO_POLL_CHAR;
1022 kgdbdbgp_buf_sz = ret;
1023 kgdbdbgp_buf_idx = 1;
1024 return kgdbdbgp_buf[0];
1025 }
1026
kgdbdbgp_write_char(u8 chr)1027 static void kgdbdbgp_write_char(u8 chr)
1028 {
1029 early_dbgp_write(NULL, &chr, 1);
1030 }
1031
1032 static struct kgdb_io kgdbdbgp_io_ops = {
1033 .name = "kgdbdbgp",
1034 .read_char = kgdbdbgp_read_char,
1035 .write_char = kgdbdbgp_write_char,
1036 };
1037
1038 static int kgdbdbgp_wait_time;
1039
kgdbdbgp_parse_config(char * str)1040 static int __init kgdbdbgp_parse_config(char *str)
1041 {
1042 char *ptr;
1043
1044 if (!ehci_debug) {
1045 if (early_dbgp_init(str))
1046 return -1;
1047 }
1048 ptr = strchr(str, ',');
1049 if (ptr) {
1050 ptr++;
1051 kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
1052 }
1053 kgdb_register_io_module(&kgdbdbgp_io_ops);
1054 kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
1055
1056 return 0;
1057 }
1058 early_param("kgdbdbgp", kgdbdbgp_parse_config);
1059
kgdbdbgp_reader_thread(void * ptr)1060 static int kgdbdbgp_reader_thread(void *ptr)
1061 {
1062 int ret;
1063
1064 while (readl(&ehci_debug->control) & DBGP_ENABLED) {
1065 kgdbdbgp_loop_cnt = 1;
1066 ret = kgdbdbgp_read_char();
1067 kgdbdbgp_loop_cnt = DBGP_LOOPS;
1068 if (ret != NO_POLL_CHAR) {
1069 if (ret == 0x3 || ret == '$') {
1070 if (ret == '$')
1071 kgdbdbgp_buf_idx--;
1072 kgdb_breakpoint();
1073 }
1074 continue;
1075 }
1076 schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
1077 }
1078 return 0;
1079 }
1080
kgdbdbgp_start_thread(void)1081 static int __init kgdbdbgp_start_thread(void)
1082 {
1083 if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
1084 kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
1085
1086 return 0;
1087 }
1088 module_init(kgdbdbgp_start_thread);
1089 #endif /* CONFIG_KGDB */
1090