Lines Matching refs:val
120 static int lgdt3306a_write_reg(struct lgdt3306a_state *state, u16 reg, u8 val) in lgdt3306a_write_reg() argument
123 u8 buf[] = { reg >> 8, reg & 0xff, val }; in lgdt3306a_write_reg()
129 dbg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val); in lgdt3306a_write_reg()
144 static int lgdt3306a_read_reg(struct lgdt3306a_state *state, u16 reg, u8 *val) in lgdt3306a_read_reg() argument
152 .flags = I2C_M_RD, .buf = val, .len = 1 }, in lgdt3306a_read_reg()
165 dbg_reg("reg: 0x%04x, val: 0x%02x\n", reg, *val); in lgdt3306a_read_reg()
182 u8 val; in lgdt3306a_set_reg_bit() local
187 ret = lgdt3306a_read_reg(state, reg, &val); in lgdt3306a_set_reg_bit()
191 val &= ~(1 << bit); in lgdt3306a_set_reg_bit()
192 val |= (onoff & 1) << bit; in lgdt3306a_set_reg_bit()
194 ret = lgdt3306a_write_reg(state, reg, val); in lgdt3306a_set_reg_bit()
223 u8 val; in lgdt3306a_mpeg_mode() local
241 ret = lgdt3306a_read_reg(state, 0x0070, &val); in lgdt3306a_mpeg_mode()
245 val |= 0x10; /* TPCLKSUPB=0x10 */ in lgdt3306a_mpeg_mode()
248 val &= ~0x10; in lgdt3306a_mpeg_mode()
250 ret = lgdt3306a_write_reg(state, 0x0070, val); in lgdt3306a_mpeg_mode()
261 u8 val; in lgdt3306a_mpeg_mode_polarity() local
266 ret = lgdt3306a_read_reg(state, 0x0070, &val); in lgdt3306a_mpeg_mode_polarity()
270 val &= ~0x06; /* TPCLKPOL=0x04, TPVALPOL=0x02 */ in lgdt3306a_mpeg_mode_polarity()
273 val |= 0x04; in lgdt3306a_mpeg_mode_polarity()
275 val |= 0x02; in lgdt3306a_mpeg_mode_polarity()
277 ret = lgdt3306a_write_reg(state, 0x0070, val); in lgdt3306a_mpeg_mode_polarity()
287 u8 val; in lgdt3306a_mpeg_tristate() local
293 ret = lgdt3306a_read_reg(state, 0x0070, &val); in lgdt3306a_mpeg_tristate()
300 val &= ~0xa8; in lgdt3306a_mpeg_tristate()
301 ret = lgdt3306a_write_reg(state, 0x0070, val); in lgdt3306a_mpeg_tristate()
316 ret = lgdt3306a_read_reg(state, 0x0070, &val); in lgdt3306a_mpeg_tristate()
320 val |= 0xa8; /* enable bus */ in lgdt3306a_mpeg_tristate()
321 ret = lgdt3306a_write_reg(state, 0x0070, val); in lgdt3306a_mpeg_tristate()
380 u8 val; in lgdt3306a_set_vsb() local
386 ret = lgdt3306a_read_reg(state, 0x0002, &val); in lgdt3306a_set_vsb()
387 val &= 0xf7; /* SPECINVAUTO Off */ in lgdt3306a_set_vsb()
388 val |= 0x04; /* SPECINV On */ in lgdt3306a_set_vsb()
389 ret = lgdt3306a_write_reg(state, 0x0002, val); in lgdt3306a_set_vsb()
399 ret = lgdt3306a_read_reg(state, 0x0009, &val); in lgdt3306a_set_vsb()
400 val &= 0xe3; in lgdt3306a_set_vsb()
401 val |= 0x0c; /* STDOPDETTMODE[2:0]=3 */ in lgdt3306a_set_vsb()
402 ret = lgdt3306a_write_reg(state, 0x0009, val); in lgdt3306a_set_vsb()
407 ret = lgdt3306a_read_reg(state, 0x0009, &val); in lgdt3306a_set_vsb()
408 val &= 0xfc; /* STDOPDETCMODE[1:0]=0 */ in lgdt3306a_set_vsb()
409 ret = lgdt3306a_write_reg(state, 0x0009, val); in lgdt3306a_set_vsb()
414 ret = lgdt3306a_read_reg(state, 0x000d, &val); in lgdt3306a_set_vsb()
415 val &= 0xbf; /* SAMPLING4XFEN=0 */ in lgdt3306a_set_vsb()
416 ret = lgdt3306a_write_reg(state, 0x000d, val); in lgdt3306a_set_vsb()
476 ret = lgdt3306a_read_reg(state, 0x001e, &val); in lgdt3306a_set_vsb()
477 val &= 0x0f; in lgdt3306a_set_vsb()
478 val |= 0xa0; in lgdt3306a_set_vsb()
479 ret = lgdt3306a_write_reg(state, 0x001e, val); in lgdt3306a_set_vsb()
485 ret = lgdt3306a_read_reg(state, 0x211f, &val); in lgdt3306a_set_vsb()
486 val &= 0xef; in lgdt3306a_set_vsb()
487 ret = lgdt3306a_write_reg(state, 0x211f, val); in lgdt3306a_set_vsb()
491 ret = lgdt3306a_read_reg(state, 0x1061, &val); in lgdt3306a_set_vsb()
492 val &= 0xf8; in lgdt3306a_set_vsb()
493 val |= 0x04; in lgdt3306a_set_vsb()
494 ret = lgdt3306a_write_reg(state, 0x1061, val); in lgdt3306a_set_vsb()
496 ret = lgdt3306a_read_reg(state, 0x103d, &val); in lgdt3306a_set_vsb()
497 val &= 0xcf; in lgdt3306a_set_vsb()
498 ret = lgdt3306a_write_reg(state, 0x103d, val); in lgdt3306a_set_vsb()
502 ret = lgdt3306a_read_reg(state, 0x2141, &val); in lgdt3306a_set_vsb()
503 val &= 0x3f; in lgdt3306a_set_vsb()
504 ret = lgdt3306a_write_reg(state, 0x2141, val); in lgdt3306a_set_vsb()
506 ret = lgdt3306a_read_reg(state, 0x2135, &val); in lgdt3306a_set_vsb()
507 val &= 0x0f; in lgdt3306a_set_vsb()
508 val |= 0x70; in lgdt3306a_set_vsb()
509 ret = lgdt3306a_write_reg(state, 0x2135, val); in lgdt3306a_set_vsb()
511 ret = lgdt3306a_read_reg(state, 0x0003, &val); in lgdt3306a_set_vsb()
512 val &= 0xf7; in lgdt3306a_set_vsb()
513 ret = lgdt3306a_write_reg(state, 0x0003, val); in lgdt3306a_set_vsb()
515 ret = lgdt3306a_read_reg(state, 0x001c, &val); in lgdt3306a_set_vsb()
516 val &= 0x7f; in lgdt3306a_set_vsb()
517 ret = lgdt3306a_write_reg(state, 0x001c, val); in lgdt3306a_set_vsb()
520 ret = lgdt3306a_read_reg(state, 0x2179, &val); in lgdt3306a_set_vsb()
521 val &= 0xf8; in lgdt3306a_set_vsb()
522 ret = lgdt3306a_write_reg(state, 0x2179, val); in lgdt3306a_set_vsb()
524 ret = lgdt3306a_read_reg(state, 0x217a, &val); in lgdt3306a_set_vsb()
525 val &= 0xf8; in lgdt3306a_set_vsb()
526 ret = lgdt3306a_write_reg(state, 0x217a, val); in lgdt3306a_set_vsb()
540 u8 val; in lgdt3306a_set_qam() local
551 ret = lgdt3306a_read_reg(state, 0x0002, &val); in lgdt3306a_set_qam()
552 val &= 0xfb; /* SPECINV Off */ in lgdt3306a_set_qam()
553 val |= 0x08; /* SPECINVAUTO On */ in lgdt3306a_set_qam()
554 ret = lgdt3306a_write_reg(state, 0x0002, val); in lgdt3306a_set_qam()
559 ret = lgdt3306a_read_reg(state, 0x0009, &val); in lgdt3306a_set_qam()
560 val &= 0xe3; /* STDOPDETTMODE[2:0]=0 VSB Off */ in lgdt3306a_set_qam()
561 ret = lgdt3306a_write_reg(state, 0x0009, val); in lgdt3306a_set_qam()
566 ret = lgdt3306a_read_reg(state, 0x0009, &val); in lgdt3306a_set_qam()
567 val &= 0xfc; in lgdt3306a_set_qam()
568 val |= 0x02; /* STDOPDETCMODE[1:0]=1=Manual 2=Auto */ in lgdt3306a_set_qam()
569 ret = lgdt3306a_write_reg(state, 0x0009, val); in lgdt3306a_set_qam()
574 ret = lgdt3306a_read_reg(state, 0x101a, &val); in lgdt3306a_set_qam()
575 val &= 0xf8; in lgdt3306a_set_qam()
577 val |= 0x02; /* QMDQMODE[2:0]=2=QAM64 */ in lgdt3306a_set_qam()
579 val |= 0x04; /* QMDQMODE[2:0]=4=QAM256 */ in lgdt3306a_set_qam()
581 ret = lgdt3306a_write_reg(state, 0x101a, val); in lgdt3306a_set_qam()
586 ret = lgdt3306a_read_reg(state, 0x000d, &val); in lgdt3306a_set_qam()
587 val &= 0xbf; in lgdt3306a_set_qam()
588 val |= 0x40; /* SAMPLING4XFEN=1 */ in lgdt3306a_set_qam()
589 ret = lgdt3306a_write_reg(state, 0x000d, val); in lgdt3306a_set_qam()
594 ret = lgdt3306a_read_reg(state, 0x0024, &val); in lgdt3306a_set_qam()
595 val &= 0x00; in lgdt3306a_set_qam()
596 ret = lgdt3306a_write_reg(state, 0x0024, val); in lgdt3306a_set_qam()
817 u8 val; in lgdt3306a_init() local
867 ret = lgdt3306a_read_reg(state, 0x0005, &val); in lgdt3306a_init()
870 val &= 0xc0; in lgdt3306a_init()
871 val |= 0x25; in lgdt3306a_init()
872 ret = lgdt3306a_write_reg(state, 0x0005, val); in lgdt3306a_init()
880 ret = lgdt3306a_read_reg(state, 0x000d, &val); in lgdt3306a_init()
883 val &= 0xc0; in lgdt3306a_init()
884 val |= 0x18; in lgdt3306a_init()
885 ret = lgdt3306a_write_reg(state, 0x000d, val); in lgdt3306a_init()
891 ret = lgdt3306a_read_reg(state, 0x0005, &val); in lgdt3306a_init()
894 val &= 0xc0; in lgdt3306a_init()
895 val |= 0x25; in lgdt3306a_init()
896 ret = lgdt3306a_write_reg(state, 0x0005, val); in lgdt3306a_init()
904 ret = lgdt3306a_read_reg(state, 0x000d, &val); in lgdt3306a_init()
907 val &= 0xc0; in lgdt3306a_init()
908 val |= 0x19; in lgdt3306a_init()
909 ret = lgdt3306a_write_reg(state, 0x000d, val); in lgdt3306a_init()
928 ret = lgdt3306a_read_reg(state, 0x103c, &val); in lgdt3306a_init()
929 val &= 0x0f; in lgdt3306a_init()
930 val |= 0x20; /* SAMGSAUTOSTL_V[3:0] = 2 */ in lgdt3306a_init()
931 ret = lgdt3306a_write_reg(state, 0x103c, val); in lgdt3306a_init()
934 ret = lgdt3306a_read_reg(state, 0x103d, &val); in lgdt3306a_init()
935 val &= 0xfc; in lgdt3306a_init()
936 val |= 0x03; in lgdt3306a_init()
937 ret = lgdt3306a_write_reg(state, 0x103d, val); in lgdt3306a_init()
940 ret = lgdt3306a_read_reg(state, 0x1036, &val); in lgdt3306a_init()
941 val &= 0xf0; in lgdt3306a_init()
942 val |= 0x0c; in lgdt3306a_init()
943 ret = lgdt3306a_write_reg(state, 0x1036, val); in lgdt3306a_init()
946 ret = lgdt3306a_read_reg(state, 0x211f, &val); in lgdt3306a_init()
947 val &= 0xef; /* do not use imaginary of CIR */ in lgdt3306a_init()
948 ret = lgdt3306a_write_reg(state, 0x211f, val); in lgdt3306a_init()
951 ret = lgdt3306a_read_reg(state, 0x2849, &val); in lgdt3306a_init()
952 val &= 0xef; /* NOUSENOSIGDET=0, enable no signal detector */ in lgdt3306a_init()
953 ret = lgdt3306a_write_reg(state, 0x2849, val); in lgdt3306a_init()
1071 u8 val; in lgdt3306a_monitor_vsb() local
1076 ret = lgdt3306a_read_reg(state, 0x21a1, &val); in lgdt3306a_monitor_vsb()
1079 snrRef = val & 0x3f; in lgdt3306a_monitor_vsb()
1085 ret = lgdt3306a_read_reg(state, 0x2191, &val); in lgdt3306a_monitor_vsb()
1088 nCombDet = (val & 0x80) >> 7; in lgdt3306a_monitor_vsb()
1090 ret = lgdt3306a_read_reg(state, 0x2180, &val); in lgdt3306a_monitor_vsb()
1093 fbDlyCir = (val & 0x03) << 8; in lgdt3306a_monitor_vsb()
1095 ret = lgdt3306a_read_reg(state, 0x2181, &val); in lgdt3306a_monitor_vsb()
1098 fbDlyCir |= val; in lgdt3306a_monitor_vsb()
1104 ret = lgdt3306a_read_reg(state, 0x1061, &val); in lgdt3306a_monitor_vsb()
1107 val &= 0xf8; in lgdt3306a_monitor_vsb()
1112 val |= 0x00; /* final bandwidth = 0 */ in lgdt3306a_monitor_vsb()
1114 val |= 0x04; /* final bandwidth = 4 */ in lgdt3306a_monitor_vsb()
1116 ret = lgdt3306a_write_reg(state, 0x1061, val); in lgdt3306a_monitor_vsb()
1121 ret = lgdt3306a_read_reg(state, 0x0024, &val); in lgdt3306a_monitor_vsb()
1124 val &= 0x0f; in lgdt3306a_monitor_vsb()
1126 val |= 0x50; in lgdt3306a_monitor_vsb()
1128 ret = lgdt3306a_write_reg(state, 0x0024, val); in lgdt3306a_monitor_vsb()
1133 ret = lgdt3306a_read_reg(state, 0x103d, &val); in lgdt3306a_monitor_vsb()
1136 val &= 0xcf; in lgdt3306a_monitor_vsb()
1137 val |= 0x20; in lgdt3306a_monitor_vsb()
1138 ret = lgdt3306a_write_reg(state, 0x103d, val); in lgdt3306a_monitor_vsb()
1146 u8 val = 0; in lgdt3306a_check_oper_mode() local
1149 ret = lgdt3306a_read_reg(state, 0x0081, &val); in lgdt3306a_check_oper_mode()
1153 if (val & 0x80) { in lgdt3306a_check_oper_mode()
1157 if (val & 0x08) { in lgdt3306a_check_oper_mode()
1158 ret = lgdt3306a_read_reg(state, 0x00a6, &val); in lgdt3306a_check_oper_mode()
1161 val = val >> 2; in lgdt3306a_check_oper_mode()
1162 if (val & 0x01) { in lgdt3306a_check_oper_mode()
1178 u8 val = 0; in lgdt3306a_check_lock_status() local
1188 ret = lgdt3306a_read_reg(state, 0x00a6, &val); in lgdt3306a_check_lock_status()
1192 if ((val & 0x80) == 0x80) in lgdt3306a_check_lock_status()
1202 ret = lgdt3306a_read_reg(state, 0x0080, &val); in lgdt3306a_check_lock_status()
1206 if ((val & 0x40) == 0x40) in lgdt3306a_check_lock_status()
1218 ret = lgdt3306a_read_reg(state, 0x1094, &val); in lgdt3306a_check_lock_status()
1222 if ((val & 0x80) == 0x80) in lgdt3306a_check_lock_status()
1236 ret = lgdt3306a_read_reg(state, 0x0080, &val); in lgdt3306a_check_lock_status()
1240 if ((val & 0x10) == 0x10) in lgdt3306a_check_lock_status()
1263 u8 val = 0; in lgdt3306a_check_neverlock_status() local
1267 ret = lgdt3306a_read_reg(state, 0x0080, &val); in lgdt3306a_check_neverlock_status()
1270 lockStatus = (enum lgdt3306a_neverlock_status)(val & 0x03); in lgdt3306a_check_neverlock_status()
1279 u8 val = 0; in lgdt3306a_pre_monitoring() local
1289 ret = lgdt3306a_read_reg(state, 0x21a1, &val); in lgdt3306a_pre_monitoring()
1292 snrRef = val & 0x3f; in lgdt3306a_pre_monitoring()
1295 ret = lgdt3306a_read_reg(state, 0x2199, &val); in lgdt3306a_pre_monitoring()
1298 mainStrong = (val & 0x40) >> 6; in lgdt3306a_pre_monitoring()
1300 ret = lgdt3306a_read_reg(state, 0x0090, &val); in lgdt3306a_pre_monitoring()
1303 aiccrejStatus = (val & 0xf0) >> 4; in lgdt3306a_pre_monitoring()
1313 ret = lgdt3306a_read_reg(state, 0x2135, &val); in lgdt3306a_pre_monitoring()
1316 val &= 0x0f; in lgdt3306a_pre_monitoring()
1317 val |= 0xa0; in lgdt3306a_pre_monitoring()
1318 ret = lgdt3306a_write_reg(state, 0x2135, val); in lgdt3306a_pre_monitoring()
1322 ret = lgdt3306a_read_reg(state, 0x2141, &val); in lgdt3306a_pre_monitoring()
1325 val &= 0x3f; in lgdt3306a_pre_monitoring()
1326 val |= 0x80; in lgdt3306a_pre_monitoring()
1327 ret = lgdt3306a_write_reg(state, 0x2141, val); in lgdt3306a_pre_monitoring()
1335 ret = lgdt3306a_read_reg(state, 0x2135, &val); in lgdt3306a_pre_monitoring()
1338 val &= 0x0f; in lgdt3306a_pre_monitoring()
1339 val |= 0x70; in lgdt3306a_pre_monitoring()
1340 ret = lgdt3306a_write_reg(state, 0x2135, val); in lgdt3306a_pre_monitoring()
1344 ret = lgdt3306a_read_reg(state, 0x2141, &val); in lgdt3306a_pre_monitoring()
1347 val &= 0x3f; in lgdt3306a_pre_monitoring()
1348 val |= 0x40; in lgdt3306a_pre_monitoring()
1349 ret = lgdt3306a_write_reg(state, 0x2141, val); in lgdt3306a_pre_monitoring()
1424 u8 val; in lgdt3306a_get_packet_error() local
1427 ret = lgdt3306a_read_reg(state, 0x00fa, &val); in lgdt3306a_get_packet_error()
1431 return val; in lgdt3306a_get_packet_error()
1786 u8 val; in lgdt3306a_attach() local
1806 ret = lgdt3306a_read_reg(state, 0x0000, &val); in lgdt3306a_attach()
1809 if ((val & 0x74) != 0x74) { in lgdt3306a_attach()
1810 pr_warn("expected 0x74, got 0x%x\n", (val & 0x74)); in lgdt3306a_attach()
1816 ret = lgdt3306a_read_reg(state, 0x0001, &val); in lgdt3306a_attach()
1819 if ((val & 0xf6) != 0xc6) { in lgdt3306a_attach()
1820 pr_warn("expected 0xc6, got 0x%x\n", (val & 0xf6)); in lgdt3306a_attach()
1826 ret = lgdt3306a_read_reg(state, 0x0002, &val); in lgdt3306a_attach()
1829 if ((val & 0x73) != 0x03) { in lgdt3306a_attach()
1830 pr_warn("expected 0x03, got 0x%x\n", (val & 0x73)); in lgdt3306a_attach()