212 	u32 mask, val;  in rsnd_adg_set_cmd_timsel_gen2()  local
220 	mask = 0x0f1f	<< shift;  in rsnd_adg_set_cmd_timsel_gen2()
222 	rsnd_mod_bset(adg_mod, CMDOUT_TIMSEL, mask, val);  in rsnd_adg_set_cmd_timsel_gen2()
236 	u32 mask, en;  in rsnd_adg_set_src_timesel_gen2()  local
248 	mask = 0x0f1f	<< shift;  in rsnd_adg_set_src_timesel_gen2()
252 		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL0,  mask, in);  in rsnd_adg_set_src_timesel_gen2()
253 		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL0, mask, out);  in rsnd_adg_set_src_timesel_gen2()
256 		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL1,  mask, in);  in rsnd_adg_set_src_timesel_gen2()
257 		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL1, mask, out);  in rsnd_adg_set_src_timesel_gen2()
260 		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL2,  mask, in);  in rsnd_adg_set_src_timesel_gen2()
261 		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL2, mask, out);  in rsnd_adg_set_src_timesel_gen2()
264 		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL3,  mask, in);  in rsnd_adg_set_src_timesel_gen2()
265 		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL3, mask, out);  in rsnd_adg_set_src_timesel_gen2()
268 		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL4,  mask, in);  in rsnd_adg_set_src_timesel_gen2()
269 		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL4, mask, out);  in rsnd_adg_set_src_timesel_gen2()
286 	u32 mask = 0xFF << shift;  in rsnd_adg_set_ssi_clk()  local
301 		rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL0, mask, val);  in rsnd_adg_set_ssi_clk()
304 		rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL1, mask, val);  in rsnd_adg_set_ssi_clk()
307 		rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL2, mask, val);  in rsnd_adg_set_ssi_clk()