| /arch/h8300/include/asm/ |
| D | bitops.h | 40 #define H8300_GEN_BITOP(FNAME, OP) \ argument
48 __asm__(OP " %1,%0" : "+WU"(*b_addr) : "i"(nr & 7)); \
50 __asm__(OP " %s1,%0" : "+WU"(*b_addr) : "r"(bit)); \
94 #define H8300_GEN_TEST_BITOP(FNNAME, OP) \ argument
107 OP " %4,%1\n\t" \
116 OP " %s3,%1\n\t" \
136 OP " %3,%1\n\t" \
142 OP " %s3,%1\n\t" \
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| /arch/ia64/lib/ |
| D | idiv64.S | 22 # define OP mod macro
24 # define OP div macro
39 #define NAME PASTE(PASTE(__,SGN),PASTE(OP,di3))
|
| D | idiv32.S | 22 # define OP mod macro
24 # define OP div macro
41 #define NAME PASTE(PASTE(__,SGN),PASTE(OP,si3))
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| /arch/tile/include/asm/ |
| D | futex.h | 41 #define __futex_asm(OP) \ argument
42 asm("1: {" #OP " %1, %3, %4; movei %0, 0 }\n" \
|
| D | uaccess.h | 122 #define __get_user_asm(OP, x, ptr, ret) \ argument
123 asm volatile("1: {" #OP " %1, %2; movei %0, 0 }\n" \
215 #define __put_user_asm(OP, x, ptr, ret) \ argument
216 asm volatile("1: {" #OP " %1, %2; movei %0, 0 }\n" \
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| /arch/powerpc/xmon/ |
| D | ppc-opc.c | 2311 #define OP(x) ((((unsigned long)(x)) & 0x3f) << 26) macro
2312 #define OP_MASK OP (0x3f)
2317 #define OPTO(x,to) (OP (x) | ((((unsigned long)(to)) & 0x1f) << 21))
2323 #define OPL(x,l) (OP (x) | ((((unsigned long)(l)) & 1) << 21))
2328 #define OPVUP(x,vup) (OP (x) | ((((unsigned long)(vup)) & 0xff) << 8))
2338 #define A(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1) | (((unsigned long)(rc)) &…
2354 #define B(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 1) | ((lk) & 1))
2375 #define BD15(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 0xf) << 22) | ((lk) & 1))
2391 #define BD24(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 25) | ((lk) & 1))
2429 #define CTX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7))
[all …]
|
| /arch/sh/include/asm/ |
| D | sfp-machine.h | 57 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| /arch/alpha/include/asm/ |
| D | sfp-machine.h | 55 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| /arch/sparc/include/asm/ |
| D | sfp-machine_64.h | 59 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| D | sfp-machine_32.h | 61 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| /arch/sh/math-emu/ |
| D | math.c | 76 #define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) argument
99 #define ARITH_X(SZ,OP,M,N) do{ \ argument
102 FP_##OP##_##SZ(Fr, Fn, Fm); \
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| /arch/sparc/net/ |
| D | bpf_jit_comp_32.c | 28 #define OP(X) ((X) << 30) macro
32 #define F1(X) OP(X)
33 #define F2(X, Y) (OP(X) | OP2(Y))
34 #define F3(X, Y) (OP(X) | OP3(Y))
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| D | bpf_jit_comp_64.c | 61 #define OP(X) ((X) << 30) macro
66 #define F1(X) OP(X)
67 #define F2(X, Y) (OP(X) | OP2(Y))
68 #define F3(X, Y) (OP(X) | OP3(Y))
|
| /arch/powerpc/perf/ |
| D | isa207-common.c | 230 dsrc->val |= (val == 1) ? P(OP, LOAD) : P(OP, STORE); in isa207_get_mem_data_src()
|
| /arch/powerpc/include/asm/ |
| D | sfp-machine.h | 144 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| D | cpm2.h | 76 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument
77 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
|
| /arch/mn10300/mm/ |
| D | misalignment.c | 818 #define ASSERTCMP(X, OP, Y) \ argument
820 if (unlikely(!((X) OP (Y)))) { \
824 printk(KERN_ERR "0x%lx " #OP " 0x%lx is false\n", \
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| /arch/x86/events/intel/ |
| D | ds.c | 55 #define OP_LH (P(OP, LOAD) | P(LVL, HIT))
62 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
102 u64 val = P(OP, STORE) | P(SNOOP, NA) | P(LVL, L1) | P(TLB, L2); in precise_store_data()
|
| /arch/arm/mach-tegra/ |
| D | sleep-tegra30.S | 508 mov32 r2, 0x800A00AB @ DEV_SELECTION=2, MA=10, OP=0xAB
518 mov32 r2, 0x400A00AB @ DEV_SELECTION=1, MA=10, OP=0xAB
|
| /arch/sparc/kernel/ |
| D | fpu_traps.S | 223 cmp %g1, 2 ! Unfinished FP-OP
|
| /arch/arm64/boot/dts/hisilicon/ |
| D | hi6220-hikey.dts | 37 * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
|