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Searched refs:PSR_T_BIT (Results 1 – 23 of 23) sorted by relevance

/arch/arm/include/asm/
Dptrace.h35 (((regs)->ARM_cpsr & PSR_T_BIT))
43 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
80 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT; in valid_user_regs()
Dunified.h44 #define PSR_ISETSTATE PSR_T_BIT
Defi.h40 PSR_T_BIT | MODE_MASK)
Dprocessor.h64 regs->ARM_cpsr |= PSR_T_BIT; \
Dkvm_emulate.h92 *vcpu_cpsr(vcpu) |= PSR_T_BIT; in vcpu_set_thumb()
Dassembler.h351 THUMB( orr \reg , \reg , #PSR_T_BIT )
/arch/arm/include/uapi/asm/
Dptrace.h67 #define PSR_T_BIT V7M_PSR_T_BIT macro
70 #define PSR_T_BIT V4_PSR_T_BIT macro
/arch/arm/kvm/
Demulate.c202 *vcpu_cpsr(vcpu) &= ~(PSR_IT_MASK | PSR_J_BIT | PSR_E_BIT | PSR_T_BIT); in kvm_update_psr()
205 *vcpu_cpsr(vcpu) |= PSR_T_BIT; in kvm_update_psr()
225 bool is_thumb = (cpsr & PSR_T_BIT); in kvm_inject_undefined()
Dinit.S132 THUMB( orr r0, r0, #PSR_T_BIT )
/arch/arm/mm/
Dabort-macro.S14 tst \psr, #PSR_T_BIT
Dabort-ev6.S32 tsteq r5, #PSR_T_BIT @ Thumb?
Dabort-lv4t.S19 tst r5, #PSR_T_BIT @ check for thumb mode
/arch/arm/probes/
Ddecode.h75 cpsr |= PSR_T_BIT; in bx_write_pc()
78 cpsr &= ~PSR_T_BIT; in bx_write_pc()
Ddecode-arm.c81 regs->ARM_cpsr |= PSR_T_BIT; in simulate_blx1()
94 regs->ARM_cpsr &= ~PSR_T_BIT; in simulate_blx2bx()
96 regs->ARM_cpsr |= PSR_T_BIT; in simulate_blx2bx()
/arch/arm/kernel/
Dptrace.c225 .cpsr_mask = PSR_T_BIT,
233 .cpsr_mask = PSR_T_BIT,
234 .cpsr_val = PSR_T_BIT,
241 .cpsr_mask = PSR_T_BIT,
242 .cpsr_val = PSR_T_BIT,
Dswp_emulate.c248 .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
Dentry-common.S188 tst saved_psr, #PSR_T_BIT
203 tst saved_psr, #PSR_T_BIT @ this is SPSR from save_user_regs
Dsignal.c411 cpsr |= PSR_T_BIT; in setup_return()
413 cpsr &= ~PSR_T_BIT; in setup_return()
Dtraps.c718 .cpsr_mask = PSR_T_BIT,
/arch/arm/probes/kprobes/
Dcore.c541 cpsr |= PSR_T_BIT; in setjmp_pre_handler()
543 cpsr &= ~PSR_T_BIT; in setjmp_pre_handler()
Dopt-arm.c77 " tst r1, #"__stringify(PSR_T_BIT)"\n"
Dactions-thumb.c100 regs->ARM_cpsr &= ~PSR_T_BIT; in t32_simulate_branch()
/arch/arm/kvm/hyp/
Dhyp-entry.S175 THUMB( orr lr, lr, #PSR_T_BIT )