Home
last modified time | relevance | path

Searched refs:PTE_SHIFT (Results 1 – 13 of 13) sorted by relevance

/arch/sh/include/asm/
Dpgtable-2level.h16 #define PTE_SHIFT PAGE_SHIFT macro
17 #define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE)
20 #define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
/arch/powerpc/include/asm/
Dpage_32.h26 #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2 - 2) /* 1/4 of a page */ macro
28 #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ macro
Dmmu-44x.h150 #define PPC44x_PTE_ADD_SHIFT (32 - PGDIR_SHIFT + PTE_SHIFT + PTE_T_LOG2)
151 #define PPC44x_PTE_ADD_MASK_BIT (32 - PTE_T_LOG2 - PTE_SHIFT)
Dhighmem.h48 #define PKMAP_ORDER PTE_SHIFT
/arch/microblaze/include/asm/
Dhighmem.h44 #define PKMAP_ORDER PTE_SHIFT
Dpage.h38 #define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */ macro
Dpgtable.h142 #define PMD_SHIFT (PAGE_SHIFT + PTE_SHIFT)
155 #define PTRS_PER_PTE (1 << PTE_SHIFT)
/arch/powerpc/include/asm/nohash/32/
Dpgtable.h21 #define PTE_INDEX_SIZE PTE_SHIFT
/arch/x86/include/asm/
Dpgtable.h1154 #define PTE_SHIFT ilog2(PTRS_PER_PTE) macro
1157 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; in page_level_shift()
/arch/microblaze/kernel/
Dhw_exception_handler.S641 bsrli r6, r3, PTE_SHIFT /* Compute PTE address */
742 bsrli r6, r3, PTE_SHIFT /* Compute PTE address */
813 bsrli r6, r3, PTE_SHIFT /* Compute PTE address */
Dhead.S183 addik r12, r12, CONFIG_LOWMEM_SIZE >> PTE_SHIFT /* that's the pad */
/arch/powerpc/include/asm/book3s/32/
Dpgtable.h13 #define PTE_INDEX_SIZE PTE_SHIFT
/arch/parisc/include/asm/
Dpgtable.h186 #define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT) macro