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Searched refs:bwl (Results 1 – 7 of 7) sorted by relevance

/arch/x86/include/asm/
Dio.h269 #define BUILDIO(bwl, bw, type) \ argument
270 static inline void out##bwl(unsigned type value, int port) \
272 asm volatile("out" #bwl " %" #bw "0, %w1" \
276 static inline unsigned type in##bwl(int port) \
279 asm volatile("in" #bwl " %w1, %" #bw "0" \
284 static inline void out##bwl##_p(unsigned type value, int port) \
286 out##bwl(value, port); \
290 static inline unsigned type in##bwl##_p(int port) \
292 unsigned type value = in##bwl(port); \
297 static inline void outs##bwl(int port, const void *addr, unsigned long count) \
[all …]
/arch/m68k/include/asm/
Duaccess_no.h66 #define __put_user_asm(err,x,ptr,bwl) \ argument
67 __asm__ ("move" #bwl " %0,%1" \
100 #define __get_user_asm(err,x,ptr,bwl,reg) \ argument
101 __asm__ ("move" #bwl " %1,%0" \
Duaccess_mm.h38 #define __put_user_asm(res, x, ptr, bwl, reg, err) \ argument
40 "1: "MOVES"."#bwl" %2,%1\n" \
109 #define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({ \ argument
112 "1: "MOVES"."#bwl" %2,%1\n" \
/arch/frv/include/asm/
Duaccess.h135 #define __put_user_asm(err,x,ptr,bwl,con) \ argument
137 asm(" st"bwl"%I0 %1,%M0 \n" \
224 #define __get_user_asm(err,x,ptr,bwl,con) \ argument
225 asm(" ld"bwl"%I1 %M1,%0 \n" \
/arch/blackfin/kernel/
Dbfin_dma.c601 #define MAKE_DMA_IO(io, bwl, isize, dmasize, cnst) \ argument
602 void dma_##io##s##bwl(unsigned long addr, cnst void *buf, unsigned DMA_MMR_SIZE_TYPE len) \
606 EXPORT_SYMBOL(dma_##io##s##bwl)
/arch/arm/mach-ixp4xx/
DKconfig207 into the kernel and we can use the standard read[bwl]/write[bwl]
/arch/blackfin/
DKconfig944 bool "ins[bwl] low overhead, higher interrupt latency"