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Searched refs:cache_levels (Results 1 – 3 of 3) sorted by relevance

/arch/arm/kvm/
Dcoproc.c63 static u32 cache_levels; variable
865 ctype = (cache_levels >> (level * 3)) & 7; in is_valid_cache()
1339 asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (cache_levels)); in kvm_coproc_table_init()
1341 if (((cache_levels >> (i*3)) & 7) == 0) in kvm_coproc_table_init()
1344 cache_levels &= (1 << (i*3))-1; in kvm_coproc_table_init()
/arch/arm64/kvm/
Dsys_regs.c79 static u32 cache_levels; variable
1920 ctype = (cache_levels >> (level * 3)) & 7; in is_valid_cache()
2197 cache_levels = clidr.val; in kvm_sys_reg_table_init()
2199 if (((cache_levels >> (i*3)) & 7) == 0) in kvm_sys_reg_table_init()
2202 cache_levels &= (1 << (i*3))-1; in kvm_sys_reg_table_init()
/arch/ia64/include/asm/
Dpal.h993 static inline long ia64_pal_cache_summary(unsigned long *cache_levels, in ia64_pal_cache_summary() argument
998 if (cache_levels) in ia64_pal_cache_summary()
999 *cache_levels = iprv.v0; in ia64_pal_cache_summary()