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Searched refs:current_cpu_data (Results 1 – 25 of 62) sorted by relevance

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/arch/sh/kernel/cpu/
Dinit.c131 waysize = current_cpu_data.dcache.sets; in cache_init()
142 waysize <<= current_cpu_data.dcache.entry_shift; in cache_init()
150 ways = current_cpu_data.dcache.ways; in cache_init()
158 addr += current_cpu_data.dcache.linesz) in cache_init()
161 addrstart += current_cpu_data.dcache.way_incr; in cache_init()
173 if (current_cpu_data.dcache.ways > 1) in cache_init()
207 l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache); in detect_cache_shape()
209 if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED) in detect_cache_shape()
212 l1i_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.icache); in detect_cache_shape()
214 if (current_cpu_data.flags & CPU_HAS_L2_CACHE) in detect_cache_shape()
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/arch/mips/mm/
Dc-tx39.c295 unsigned long ic_lsize = current_cpu_data.icache.linesz; in tx39_flush_cache_sigtramp()
296 unsigned long dc_lsize = current_cpu_data.dcache.linesz; in tx39_flush_cache_sigtramp()
323 current_cpu_data.icache.linesz = 16; in tx39_probe_cache()
326 current_cpu_data.icache.ways = 1; in tx39_probe_cache()
327 current_cpu_data.dcache.ways = 1; in tx39_probe_cache()
328 current_cpu_data.dcache.linesz = 4; in tx39_probe_cache()
332 current_cpu_data.icache.ways = 2; in tx39_probe_cache()
333 current_cpu_data.dcache.ways = 2; in tx39_probe_cache()
334 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache()
339 current_cpu_data.icache.ways = 1; in tx39_probe_cache()
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Dtlb-r4k.c75 if (current_cpu_data.tlbsizevtlb) { in local_flush_tlb_all()
80 ftlbhighset = current_cpu_data.tlbsizevtlb + in local_flush_tlb_all()
81 current_cpu_data.tlbsizeftlbsets; in local_flush_tlb_all()
82 for (entry = current_cpu_data.tlbsizevtlb; in local_flush_tlb_all()
90 while (entry < current_cpu_data.tlbsize) { in local_flush_tlb_all()
137 if (size <= (current_cpu_data.tlbsizeftlbsets ? in local_flush_tlb_range()
138 current_cpu_data.tlbsize / 8 : in local_flush_tlb_range()
139 current_cpu_data.tlbsize / 2)) { in local_flush_tlb_range()
180 if (size <= (current_cpu_data.tlbsizeftlbsets ? in local_flush_tlb_kernel_range()
181 current_cpu_data.tlbsize / 8 : in local_flush_tlb_kernel_range()
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Dtlb-r3k.c47 old_ctx = read_c0_entryhi() & cpu_asid_mask(&current_cpu_data); in local_flush_tlb_from()
49 while (entry < current_cpu_data.tlbsize) { in local_flush_tlb_from()
85 unsigned long asid_mask = cpu_asid_mask(&current_cpu_data); in local_flush_tlb_range()
98 if (size <= current_cpu_data.tlbsize) { in local_flush_tlb_range()
135 if (size <= current_cpu_data.tlbsize) { in local_flush_tlb_kernel_range()
164 unsigned long asid_mask = cpu_asid_mask(&current_cpu_data); in local_flush_tlb_page()
196 unsigned long asid_mask = cpu_asid_mask(&current_cpu_data); in __update_tlb()
235 unsigned long asid_mask = cpu_asid_mask(&current_cpu_data); in add_wired_entry()
Dc-r4k.c264 unsigned long end = start + current_cpu_data.icache.waysize; in tx49_blast_icache32()
265 unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; in tx49_blast_icache32()
266 unsigned long ws_end = current_cpu_data.icache.ways << in tx49_blast_icache32()
267 current_cpu_data.icache.waybit; in tx49_blast_icache32()
293 unsigned long indexmask = current_cpu_data.icache.waysize - 1; in tx49_blast_icache32_page_indexed()
296 unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; in tx49_blast_icache32_page_indexed()
297 unsigned long ws_end = current_cpu_data.icache.ways << in tx49_blast_icache32_page_indexed()
298 current_cpu_data.icache.waybit; in tx49_blast_icache32_page_indexed()
1189 struct cpuinfo_mips *c = &current_cpu_data; in probe_pcache()
1583 struct cpuinfo_mips *c = &current_cpu_data; in probe_vcache()
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/arch/sh/mm/
Dcache-sh7705.c36 ways = current_cpu_data.dcache.ways; in cache_wback_all()
37 waysize = current_cpu_data.dcache.sets; in cache_wback_all()
38 waysize <<= current_cpu_data.dcache.entry_shift; in cache_wback_all()
47 addr += current_cpu_data.dcache.linesz) { in cache_wback_all()
58 addrstart += current_cpu_data.dcache.way_incr; in cache_wback_all()
104 ways = current_cpu_data.dcache.ways; in __flush_dcache_page()
105 waysize = current_cpu_data.dcache.sets; in __flush_dcache_page()
106 waysize <<= current_cpu_data.dcache.entry_shift; in __flush_dcache_page()
115 addr += current_cpu_data.dcache.linesz) { in __flush_dcache_page()
125 addrstart += current_cpu_data.dcache.way_incr; in __flush_dcache_page()
Dcache-sh3.c47 for (j = 0; j < current_cpu_data.dcache.ways; j++) { in sh3__flush_wback_region()
51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask); in sh3__flush_wback_region()
63 addrstart += current_cpu_data.dcache.way_incr; in sh3__flush_wback_region()
88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC; in sh3__flush_purge_region()
Dcache-sh4.c154 (current_cpu_data.dcache.sets << in flush_dcache_all()
155 current_cpu_data.dcache.entry_shift) * in flush_dcache_all()
156 current_cpu_data.dcache.ways; in flush_dcache_all()
158 entry_offset = 1 << current_cpu_data.dcache.entry_shift; in flush_dcache_all()
242 map_coherent = (current_cpu_data.dcache.n_aliases && in sh4_flush_cache_page()
Dcache-sh2a.c61 nr_ways = current_cpu_data.dcache.ways; in sh2a__flush_wback_region()
69 end = begin + (nr_ways * current_cpu_data.dcache.way_size); in sh2a__flush_wback_region()
108 int nr_ways = current_cpu_data.dcache.ways; in sh2a__flush_purge_region()
Dcache-debugfs.c49 cache = &current_cpu_data.dcache; in cache_seq_show()
52 cache = &current_cpu_data.icache; in cache_seq_show()
/arch/sh/include/asm/
Dbugs.h27 current_cpu_data.loops_per_jiffy = loops_per_jiffy; in check_bugs()
29 switch (current_cpu_data.family) { in check_bugs()
69 printk("CPU: %s\n", get_cpu_subtype(&current_cpu_data)); in check_bugs()
/arch/mips/include/asm/
Dr4kcache.h584 unsigned long end = start + current_cpu_data.desc.waysize; \
585 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
586 unsigned long ws_end = current_cpu_data.desc.ways << \
587 current_cpu_data.desc.waybit; \
616 unsigned long indexmask = current_cpu_data.desc.waysize - 1; \
619 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
620 unsigned long ws_end = current_cpu_data.desc.ways << \
621 current_cpu_data.desc.waybit; \
756 unsigned long end = start + current_cpu_data.desc.waysize; \
757 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
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/arch/m32r/lib/
Ddelay.c81 : "r" (current_cpu_data.loops_per_jiffy) in __const_udelay()
108 : "r" (current_cpu_data.loops_per_jiffy) in __const_udelay()
/arch/mips/vr41xx/common/
Dinit.c46 if (current_cpu_data.processor_id == PRID_VR4131_REV2_0 || in plat_time_init()
47 current_cpu_data.processor_id == PRID_VR4131_REV2_1) in plat_time_init()
/arch/mips/kernel/
Dwatch.c21 switch (current_cpu_data.watch_reg_use_cnt) { in mips_install_watch_registers()
54 switch (current_cpu_data.watch_reg_use_cnt) { in mips_read_watch_registers()
70 if (current_cpu_data.watch_reg_use_cnt == 1 && in mips_read_watch_registers()
88 switch (current_cpu_data.watch_reg_count) { in mips_clear_watch_registers()
Dmips-cpc.c101 curr_core = cpu_core(&current_cpu_data); in mips_cpc_lock_other()
121 curr_core = cpu_core(&current_cpu_data); in mips_cpc_unlock_other()
Dsmp-cps.c197 atomic_set(&mips_cps_core_bootcfg[cpu_core(&current_cpu_data)].vpe_mask, in cps_prepare_cpus()
198 1 << cpu_vpe_id(&current_cpu_data)); in cps_prepare_cpus()
292 unsigned core = cpu_core(&current_cpu_data); in remote_vpe_boot()
295 mips_cps_boot_vpes(core_cfg, cpu_vpe_id(&current_cpu_data)); in remote_vpe_boot()
414 core_cfg = &mips_cps_core_bootcfg[cpu_core(&current_cpu_data)]; in cps_cpu_disable()
415 atomic_sub(1 << cpu_vpe_id(&current_cpu_data), &core_cfg->vpe_mask); in cps_cpu_disable()
Dcacheinfo.c33 struct cpuinfo_mips *c = &current_cpu_data; in __init_cache_level()
85 struct cpuinfo_mips *c = &current_cpu_data; in __populate_cache_leaves()
/arch/mips/lib/
Dr3k_dump_tlb.c35 asid_mask = cpu_asid_mask(&current_cpu_data); in dump_tlb()
75 dump_tlb(0, current_cpu_data.tlbsize - 1); in dump_tlb_all()
/arch/m32r/include/asm/
Dprocessor.h48 #define current_cpu_data cpu_data[smp_processor_id()] macro
51 #define current_cpu_data boot_cpu_data macro
Dbugs.h17 current_cpu_data.loops_per_jiffy = loops_per_jiffy; in check_bugs()
/arch/mips/bcm47xx/
Dprom.c60 struct cpuinfo_mips *c = &current_cpu_data; in prom_init_mem()
133 temp_tlb_entry = current_cpu_data.tlbsize - 1; in early_tlb_init()
/arch/mn10300/include/asm/
Dprocessor.h61 #define current_cpu_data cpu_data[smp_processor_id()] macro
64 #define current_cpu_data boot_cpu_data macro
/arch/mips/loongson32/common/
Dsetup.c21 unsigned int processor_id = (&current_cpu_data)->processor_id; in get_system_type()
/arch/mips/loongson64/common/
Dplatform.c22 struct cpuinfo_mips *c = &current_cpu_data; in loongson2_cpufreq_init()

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