| /arch/m68k/coldfire/ |
| D | intc-simr.c | 38 static inline unsigned int irq2ebit(unsigned int irq) in irq2ebit() argument
40 return irqebitmap[irq - EINT0]; in irq2ebit()
54 static inline unsigned int irq2ebit(unsigned int irq) in irq2ebit() argument
56 return irq - EINT0; in irq2ebit()
69 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_mask() local
71 if (MCFINTC2_SIMR && (irq > 128)) in intc_irq_mask()
72 __raw_writeb(irq - 128, MCFINTC2_SIMR); in intc_irq_mask()
73 else if (MCFINTC1_SIMR && (irq > 64)) in intc_irq_mask()
74 __raw_writeb(irq - 64, MCFINTC1_SIMR); in intc_irq_mask()
76 __raw_writeb(irq, MCFINTC0_SIMR); in intc_irq_mask()
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| D | intc-2.c | 52 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_mask() local
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_mask()
61 imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL; in intc_irq_mask()
62 imrbit = 0x1 << (irq & 0x1f); in intc_irq_mask()
70 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_unmask() local
75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_unmask()
79 imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL); in intc_irq_unmask()
80 imrbit = 0x1 << (irq & 0x1f); in intc_irq_unmask()
83 if ((irq & 0x20) == 0) in intc_irq_unmask()
98 unsigned int irq = d->irq; in intc_irq_ack() local
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| D | intc-5272.c | 83 unsigned int irq = d->irq; in intc_irq_mask() local
85 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { in intc_irq_mask()
87 irq -= MCFINT_VECBASE; in intc_irq_mask()
88 v = 0x8 << intc_irqmap[irq].index; in intc_irq_mask()
89 writel(v, intc_irqmap[irq].icr); in intc_irq_mask()
95 unsigned int irq = d->irq; in intc_irq_unmask() local
97 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { in intc_irq_unmask()
99 irq -= MCFINT_VECBASE; in intc_irq_unmask()
100 v = 0xd << intc_irqmap[irq].index; in intc_irq_unmask()
101 writel(v, intc_irqmap[irq].icr); in intc_irq_unmask()
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| D | intc-525x.c | 25 int irq = d->irq - MCF_IRQ_GPIO0; in intc2_irq_gpio_mask() local
28 imr &= ~(0x001 << irq); in intc2_irq_gpio_mask()
30 imr &= ~(0x100 << irq); in intc2_irq_gpio_mask()
38 int irq = d->irq - MCF_IRQ_GPIO0; in intc2_irq_gpio_unmask() local
41 imr |= (0x001 << irq); in intc2_irq_gpio_unmask()
43 imr |= (0x100 << irq); in intc2_irq_gpio_unmask()
51 int irq = d->irq - MCF_IRQ_GPIO0; in intc2_irq_gpio_ack() local
54 imr |= (0x001 << irq); in intc2_irq_gpio_ack()
56 imr |= (0x100 << irq); in intc2_irq_gpio_ack()
77 int irq; in mcf_intc2_init() local
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| /arch/mn10300/kernel/ |
| D | irq.c | 42 unsigned int irq = d->irq; in mn10300_cpupic_ack() local
47 GxICR_u8(irq) = GxICR_DETECT; in mn10300_cpupic_ack()
48 tmp = GxICR(irq); in mn10300_cpupic_ack()
52 static void __mask_and_set_icr(unsigned int irq, in __mask_and_set_icr() argument
59 tmp = GxICR(irq); in __mask_and_set_icr()
60 GxICR(irq) = (tmp & mask) | set; in __mask_and_set_icr()
61 tmp = GxICR(irq); in __mask_and_set_icr()
67 __mask_and_set_icr(d->irq, GxICR_LEVEL, 0); in mn10300_cpupic_mask()
72 unsigned int irq = d->irq; in mn10300_cpupic_mask_ack() local
79 if (!test_and_clear_bit(irq, irq_affinity_request)) { in mn10300_cpupic_mask_ack()
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| /arch/m68k/include/asm/ |
| D | atariints.h | 115 static inline int get_mfp_bit( unsigned irq, int type ) in get_mfp_bit() argument
119 mask = 1 << (irq & 7); in get_mfp_bit()
121 ((irq & 8) >> 2) + (((irq-8) & 16) << 3); in get_mfp_bit()
125 static inline void set_mfp_bit( unsigned irq, int type ) in set_mfp_bit() argument
129 mask = 1 << (irq & 7); in set_mfp_bit()
131 ((irq & 8) >> 2) + (((irq-8) & 16) << 3); in set_mfp_bit()
136 static inline void clear_mfp_bit( unsigned irq, int type ) in clear_mfp_bit() argument
140 mask = ~(1 << (irq & 7)); in clear_mfp_bit()
142 ((irq & 8) >> 2) + (((irq-8) & 16) << 3); in clear_mfp_bit()
157 static inline void atari_enable_irq( unsigned irq ) in atari_enable_irq() argument
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| /arch/mips/pci/ |
| D | fixup-rbtx4938.c | 18 int irq = tx4938_pcic1_map_irq(dev, slot); in rbtx4938_pci_map_irq() local
20 if (irq >= 0) in rbtx4938_pci_map_irq()
21 return irq; in rbtx4938_pci_map_irq()
22 irq = pin; in rbtx4938_pci_map_irq()
24 irq--; /* 0-3 */ in rbtx4938_pci_map_irq()
28 irq = (irq + 0 + slot) % 4; in rbtx4938_pci_map_irq()
32 irq = (irq + 33 - slot) % 4; in rbtx4938_pci_map_irq()
34 irq = (irq + 3 + slot) % 4; in rbtx4938_pci_map_irq()
36 irq++; /* 1-4 */ in rbtx4938_pci_map_irq()
38 switch (irq) { in rbtx4938_pci_map_irq()
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| D | fixup-jmr3927.c | 36 unsigned char irq = pin; in jmr3927_pci_map_irq() local
39 irq--; /* 0-3 */ in jmr3927_pci_map_irq()
44 irq = (irq + 2) % 4; in jmr3927_pci_map_irq()
49 irq = (irq + 0) % 4; in jmr3927_pci_map_irq()
53 irq = (irq + 33 - slot) % 4; in jmr3927_pci_map_irq()
55 irq = (irq + 3 + slot) % 4; in jmr3927_pci_map_irq()
57 irq++; /* 1-4 */ in jmr3927_pci_map_irq()
59 switch (irq) { in jmr3927_pci_map_irq()
61 irq = JMR3927_IRQ_IOC_PCIA; in jmr3927_pci_map_irq()
64 irq = JMR3927_IRQ_IOC_PCIB; in jmr3927_pci_map_irq()
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| D | fixup-rbtx4927.c | 41 unsigned char irq = pin; in rbtx4927_pci_map_irq() local
44 irq--; /* 0-3 */ in rbtx4927_pci_map_irq()
48 irq = (irq + 0 + slot) % 4; in rbtx4927_pci_map_irq()
52 irq = (irq + 33 - slot) % 4; in rbtx4927_pci_map_irq()
54 irq = (irq + 3 + slot) % 4; in rbtx4927_pci_map_irq()
56 irq++; /* 1-4 */ in rbtx4927_pci_map_irq()
58 switch (irq) { in rbtx4927_pci_map_irq()
60 irq = RBTX4927_IRQ_IOC_PCIA; in rbtx4927_pci_map_irq()
63 irq = RBTX4927_IRQ_IOC_PCIB; in rbtx4927_pci_map_irq()
66 irq = RBTX4927_IRQ_IOC_PCIC; in rbtx4927_pci_map_irq()
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| /arch/m68k/mac/ |
| D | macints.c | 178 int irq = data->irq; in mac_irq_enable() local
179 int irq_src = IRQ_SRC(irq); in mac_irq_enable()
186 oss_irq_enable(irq); in mac_irq_enable()
188 via_irq_enable(irq); in mac_irq_enable()
195 psc_irq_enable(irq); in mac_irq_enable()
197 oss_irq_enable(irq); in mac_irq_enable()
201 baboon_irq_enable(irq); in mac_irq_enable()
208 int irq = data->irq; in mac_irq_disable() local
209 int irq_src = IRQ_SRC(irq); in mac_irq_disable()
216 oss_irq_disable(irq); in mac_irq_disable()
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| /arch/arm/mach-netx/ |
| D | generic.c | 74 unsigned int irq = NETX_IRQ_HIF_CHAINED(0); in netx_hif_demux_handler() local
82 DEBUG_IRQ("handling irq %d\n", irq); in netx_hif_demux_handler()
83 generic_handle_irq(irq); in netx_hif_demux_handler()
85 irq++; in netx_hif_demux_handler()
93 unsigned int val, irq; in netx_hif_irq_type() local
97 irq = d->irq - NETX_IRQ_HIF_CHAINED(0); in netx_hif_irq_type()
101 val |= (1 << 26) << irq; in netx_hif_irq_type()
105 val &= ~((1 << 26) << irq); in netx_hif_irq_type()
109 val &= ~((1 << 26) << irq); in netx_hif_irq_type()
113 val |= (1 << 26) << irq; in netx_hif_irq_type()
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| /arch/ia64/kernel/ |
| D | msi_ia64.c | 22 unsigned int irq = idata->irq; in ia64_set_msi_irq_affinity() local
24 if (irq_prepare_move(irq, cpu)) in ia64_set_msi_irq_affinity()
36 data |= MSI_DATA_VECTOR(irq_to_vector(irq)); in ia64_set_msi_irq_affinity()
39 pci_write_msi_msg(irq, &msg); in ia64_set_msi_irq_affinity()
50 int irq, vector; in ia64_setup_msi_irq() local
52 irq = create_irq(); in ia64_setup_msi_irq()
53 if (irq < 0) in ia64_setup_msi_irq()
54 return irq; in ia64_setup_msi_irq()
56 irq_set_msi_desc(irq, desc); in ia64_setup_msi_irq()
57 dest_phys_id = cpu_physical_id(cpumask_any_and(&(irq_to_domain(irq)), in ia64_setup_msi_irq()
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| D | iosapic.c | 182 int irq; in __gsi_to_irq() local
186 for (irq = 0; irq < NR_IRQS; irq++) { in __gsi_to_irq()
187 info = &iosapic_intr_info[irq]; in __gsi_to_irq()
190 return irq; in __gsi_to_irq()
199 int irq; in gsi_to_irq() local
202 irq = __gsi_to_irq(gsi); in gsi_to_irq()
204 return irq; in gsi_to_irq()
207 static struct iosapic_rte_info *find_rte(unsigned int irq, unsigned int gsi) in find_rte() argument
211 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) in find_rte()
218 set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask) in set_rte() argument
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| D | irq.c | 33 void ack_bad_irq(unsigned int irq) in ack_bad_irq() argument
35 printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id()); in ack_bad_irq()
39 ia64_vector __ia64_irq_to_vector(int irq) in __ia64_irq_to_vector() argument
41 return irq_cfg[irq].vector; in __ia64_irq_to_vector()
68 void set_irq_affinity_info (unsigned int irq, int hwid, int redir) in set_irq_affinity_info() argument
70 if (irq < NR_IRQS) { in set_irq_affinity_info()
71 cpumask_copy(irq_get_affinity_mask(irq), in set_irq_affinity_info()
73 irq_redir[irq] = (char) (redir & 0xff); in set_irq_affinity_info()
104 int irq, new_cpu; in migrate_irqs() local
106 for (irq=0; irq < NR_IRQS; irq++) { in migrate_irqs()
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| D | irq_ia64.c | 99 int irq; in find_unassigned_irq() local
101 for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) in find_unassigned_irq()
102 if (irq_status[irq] == IRQ_UNUSED) in find_unassigned_irq()
103 return irq; in find_unassigned_irq()
126 static int __bind_irq_vector(int irq, int vector, cpumask_t domain) in __bind_irq_vector() argument
130 struct irq_cfg *cfg = &irq_cfg[irq]; in __bind_irq_vector()
132 BUG_ON((unsigned)irq >= NR_IRQS); in __bind_irq_vector()
143 per_cpu(vector_irq, cpu)[vector] = irq; in __bind_irq_vector()
146 irq_status[irq] = IRQ_USED; in __bind_irq_vector()
151 int bind_irq_vector(int irq, int vector, cpumask_t domain) in bind_irq_vector() argument
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| /arch/m68k/q40/ |
| D | q40ints.c | 45 unsigned int irq = data->irq; in q40_irq_startup() local
48 switch (irq) { in q40_irq_startup()
52 irq); in q40_irq_startup()
130 static irqreturn_t q40_timer_int(int irq, void *dev_id) in q40_timer_int() argument
172 struct IRQ_TABLE{ unsigned mask; int irq ;}; member
180 { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
181 { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
182 { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
183 { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
184 { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
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| /arch/blackfin/mach-common/ |
| D | ints-priority.c | 117 bfin_irq_flags &= ~(1 << d->irq); in bfin_core_mask_irq()
124 bfin_irq_flags |= 1 << d->irq; in bfin_core_unmask_irq()
140 void bfin_internal_mask_irq(unsigned int irq) in bfin_internal_mask_irq() argument
144 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_mask_irq()
145 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_mask_irq()
154 ~(1 << BFIN_SYSIRQ(irq))); in bfin_internal_mask_irq()
161 bfin_internal_mask_irq(d->irq); in bfin_internal_mask_irq_chip()
165 void bfin_internal_unmask_irq_affinity(unsigned int irq, in bfin_internal_unmask_irq_affinity() argument
168 void bfin_internal_unmask_irq(unsigned int irq) in bfin_internal_unmask_irq_affinity()
174 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_unmask_irq_affinity()
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| /arch/arm/mach-rpc/ |
| D | irq.c | 15 mask = 1 << d->irq; in iomd_ack_irq_a()
25 mask = 1 << d->irq; in iomd_mask_irq_a()
34 mask = 1 << d->irq; in iomd_unmask_irq_a()
49 mask = 1 << (d->irq & 7); in iomd_mask_irq_b()
58 mask = 1 << (d->irq & 7); in iomd_unmask_irq_b()
73 mask = 1 << (d->irq & 7); in iomd_mask_irq_dma()
82 mask = 1 << (d->irq & 7); in iomd_unmask_irq_dma()
97 mask = 1 << (d->irq & 7); in iomd_mask_irq_fiq()
106 mask = 1 << (d->irq & 7); in iomd_unmask_irq_fiq()
121 unsigned int irq, clr, set; in rpc_init_irq() local
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| /arch/powerpc/platforms/4xx/ |
| D | hsta_msi.c | 45 int irq, hwirq; in hsta_setup_msi_irqs() local
55 irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1); in hsta_setup_msi_irqs()
56 if (irq < 0) { in hsta_setup_msi_irqs()
59 return irq; in hsta_setup_msi_irqs()
62 hwirq = ppc4xx_hsta_msi.irq_map[irq]; in hsta_setup_msi_irqs()
64 pr_err("%s: Failed mapping irq %d\n", __func__, irq); in hsta_setup_msi_irqs()
72 addr = ppc4xx_hsta_msi.address + irq*0x10; in hsta_setup_msi_irqs()
86 msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1); in hsta_setup_msi_irqs()
97 int irq; in hsta_find_hwirq_offset() local
100 for (irq = 0; irq < ppc4xx_hsta_msi.irq_count; irq++) in hsta_find_hwirq_offset()
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| /arch/um/kernel/ |
| D | irq.c | 50 do_IRQ(irq_fd->irq, regs); in sigio_handler()
60 static int activate_fd(int irq, int fd, int type, void *dev_id) in activate_fd() argument
83 .irq = irq, in activate_fd()
92 printk(KERN_ERR "Irqs : %d, %d\n", irq_fd->irq, irq); in activate_fd()
163 int irq; member
167 static int same_irq_and_dev(struct irq_fd *irq, void *d) in same_irq_and_dev() argument
171 return ((irq->irq == data->irq) && (irq->id == data->dev)); in same_irq_and_dev()
174 static void free_irq_by_irq_and_dev(unsigned int irq, void *dev) in free_irq_by_irq_and_dev() argument
176 struct irq_and_dev data = ((struct irq_and_dev) { .irq = irq, in free_irq_by_irq_and_dev()
182 static int same_fd(struct irq_fd *irq, void *fd) in same_fd() argument
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| /arch/alpha/kernel/ |
| D | sys_rawhide.c | 62 unsigned int irq = d->irq; in rawhide_enable_irq() local
64 irq -= 16; in rawhide_enable_irq()
65 hose = irq / 24; in rawhide_enable_irq()
69 irq -= hose * 24; in rawhide_enable_irq()
70 mask = 1 << irq; in rawhide_enable_irq()
83 unsigned int irq = d->irq; in rawhide_disable_irq() local
85 irq -= 16; in rawhide_disable_irq()
86 hose = irq / 24; in rawhide_disable_irq()
90 irq -= hose * 24; in rawhide_disable_irq()
91 mask = ~(1 << irq) | hose_irq_masks[hose]; in rawhide_disable_irq()
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| /arch/unicore32/kernel/ |
| D | irq.c | 42 #define GPIO_MASK(irq) (1 << (irq - IRQ_GPIO0)) argument
48 if (d->irq < IRQ_GPIOHIGH) in puv3_gpio_type()
49 mask = 1 << d->irq; in puv3_gpio_type()
51 mask = GPIO_MASK(d->irq); in puv3_gpio_type()
79 writel((1 << d->irq), GPIO_GEDR); in puv3_low_gpio_ack()
84 writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR); in puv3_low_gpio_mask()
89 writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR); in puv3_low_gpio_unmask()
95 writel(readl(PM_PWER) | (1 << d->irq), PM_PWER); in puv3_low_gpio_wake()
97 writel(readl(PM_PWER) & ~(1 << d->irq), PM_PWER); in puv3_low_gpio_wake()
117 unsigned int mask, irq; in puv3_gpio_handler() local
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| /arch/sh/boards/mach-dreamcast/ |
| D | irq.c | 66 unsigned int irq = data->irq; in disable_systemasic_irq() local
67 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); in disable_systemasic_irq()
71 mask &= ~(1 << EVENT_BIT(irq)); in disable_systemasic_irq()
78 unsigned int irq = data->irq; in enable_systemasic_irq() local
79 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); in enable_systemasic_irq()
83 mask |= (1 << EVENT_BIT(irq)); in enable_systemasic_irq()
90 unsigned int irq = data->irq; in mask_ack_systemasic_irq() local
91 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); in mask_ack_systemasic_irq()
93 outl((1 << EVENT_BIT(irq)), esr); in mask_ack_systemasic_irq()
106 int systemasic_irq_demux(int irq) in systemasic_irq_demux() argument
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| /arch/s390/kernel/ |
| D | irq.c | 35 int irq; member
51 {.irq = EXT_INTERRUPT, .name = "EXT"},
52 {.irq = IO_INTERRUPT, .name = "I/O"},
53 {.irq = THIN_INTERRUPT, .name = "AIO"},
62 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
63 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
64 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
65 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
66 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
67 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
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| /arch/mips/pnx833x/common/ |
| D | interrupts.c | 106 unsigned int irq = PNX833X_REGFIELD(PIC_INT_SRC, INT_SRC); in pic_dispatch() local
108 if ((irq >= 1) && (irq < (PNX833X_PIC_NUM_IRQ))) { in pic_dispatch()
110 PNX833X_PIC_INT_PRIORITY = irq_prio[irq]; in pic_dispatch()
112 if (irq == PNX833X_PIC_GPIO_INT) { in pic_dispatch()
121 do_IRQ(irq + PNX833X_PIC_IRQ_BASE); in pic_dispatch()
126 printk(KERN_ERR "plat_irq_dispatch: unexpected irq %u\n", irq); in pic_dispatch()
142 static inline void pnx833x_hard_enable_pic_irq(unsigned int irq) in pnx833x_hard_enable_pic_irq() argument
147 PNX833X_PIC_INT_REG(irq) = irq_prio[irq]; in pnx833x_hard_enable_pic_irq()
150 static inline void pnx833x_hard_disable_pic_irq(unsigned int irq) in pnx833x_hard_disable_pic_irq() argument
153 PNX833X_PIC_INT_REG(irq) = 0; in pnx833x_hard_disable_pic_irq()
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