/arch/mips/mm/ |
D | c-octeon.c | 197 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon() 202 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon() 204 c->dcache.linesz = 128; in probe_octeon() 211 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon() 217 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon() 221 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon() 223 c->dcache.linesz = 128; in probe_octeon() 226 dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon() 231 c->icache.linesz = 128; in probe_octeon() 235 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon() [all …]
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D | c-r4k.c | 1202 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); in probe_pcache() 1207 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1217 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); in probe_pcache() 1222 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1231 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); in probe_pcache() 1236 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1252 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); in probe_pcache() 1257 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1269 c->icache.linesz = 64; in probe_pcache() 1274 c->dcache.linesz = 32; in probe_pcache() [all …]
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D | c-tx39.c | 295 unsigned long ic_lsize = current_cpu_data.icache.linesz; in tx39_flush_cache_sigtramp() 296 unsigned long dc_lsize = current_cpu_data.dcache.linesz; in tx39_flush_cache_sigtramp() 323 current_cpu_data.icache.linesz = 16; in tx39_probe_cache() 328 current_cpu_data.dcache.linesz = 4; in tx39_probe_cache() 334 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache() 341 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache() 422 current_cpu_data.icache.waysize / current_cpu_data.icache.linesz; in tx39_cache_init() 424 current_cpu_data.dcache.waysize / current_cpu_data.dcache.linesz; in tx39_cache_init() 433 icache_size >> 10, current_cpu_data.icache.linesz); in tx39_cache_init() 435 dcache_size >> 10, current_cpu_data.dcache.linesz); in tx39_cache_init()
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D | sc-mips.c | 143 c->scache.linesz = 2 << tmp; in mips_sc_is_activated() 166 c->scache.linesz = 2 << line_sz; in mips_sc_probe_cm3() 171 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe_cm3() 174 if (c->scache.linesz) { in mips_sc_probe_cm3() 223 c->scache.waysize = c->scache.sets * c->scache.linesz; in mips_sc_probe()
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D | sc-rm7k.c | 237 c->scache.linesz = sc_lsize; in rm7k_sc_init() 241 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); in rm7k_sc_init() 267 c->tcache.linesz = tc_lsize; in rm7k_sc_init()
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/arch/sh/kernel/cpu/ |
D | init.c | 158 addr += current_cpu_data.dcache.linesz) in cache_init() 203 CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways) 310 current_cpu_data.icache.linesz; in cpu_init() 313 current_cpu_data.icache.linesz; in cpu_init() 317 current_cpu_data.dcache.linesz; in cpu_init() 320 current_cpu_data.dcache.linesz; in cpu_init()
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D | proc.c | 71 cache_size = info.ways * info.sets * info.linesz; in show_cacheinfo()
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/arch/sh/kernel/cpu/sh4/ |
D | probe.c | 42 boot_cpu_data.icache.linesz = L1_CACHE_BYTES; in cpu_probe() 51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 248 boot_cpu_data.scache.linesz = L1_CACHE_BYTES; in cpu_probe() 252 boot_cpu_data.scache.linesz); in cpu_probe() 255 (boot_cpu_data.scache.linesz * in cpu_probe() 260 boot_cpu_data.scache.linesz); in cpu_probe()
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/arch/sh/kernel/cpu/sh5/ |
D | probe.c | 44 boot_cpu_data.icache.linesz = L1_CACHE_BYTES; in cpu_probe() 48 boot_cpu_data.icache.linesz; in cpu_probe()
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/arch/sh/kernel/cpu/sh2/ |
D | probe.c | 41 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 62 boot_cpu_data.dcache.linesz = 32; in cpu_probe()
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/arch/mips/kernel/ |
D | cacheinfo.c | 23 leaf->coherency_line_size = c->cache.linesz; \ 26 leaf->size = c->cache.linesz * c->cache.sets * \
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D | pm-cps.c | 224 uasm_i_addiu(pp, t0, t0, cache->linesz); in cps_gen_cache_routine() 226 uasm_i_cache(pp, op, i * cache->linesz, t0); in cps_gen_cache_routine() 232 uasm_i_addiu(pp, t0, t0, unroll_lines * cache->linesz); in cps_gen_cache_routine() 247 unsigned line_size = cpu_info->dcache.linesz; in cps_gen_flush_fsb()
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D | traps.c | 638 regs->regs[rt] = min(current_cpu_data.dcache.linesz, in simulate_rdhwr() 639 current_cpu_data.icache.linesz); in simulate_rdhwr()
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/arch/sh/include/asm/ |
D | cache.h | 24 unsigned int linesz; /* Cache line size (bytes) */ member
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/arch/sh/mm/ |
D | cache-sh7705.c | 47 addr += current_cpu_data.dcache.linesz) { in cache_wback_all() 115 addr += current_cpu_data.dcache.linesz) { in __flush_dcache_page()
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D | cache-debugfs.c | 76 addr += cache->linesz, line++) { in cache_seq_show()
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/arch/sh/kernel/cpu/sh2a/ |
D | probe.c | 50 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe()
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/arch/mips/include/asm/ |
D | cpu-features.h | 423 #define cpu_dcache_line_size() cpu_data[0].dcache.linesz 426 #define cpu_icache_line_size() cpu_data[0].icache.linesz 429 #define cpu_scache_line_size() cpu_data[0].scache.linesz 432 #define cpu_tcache_line_size() cpu_data[0].tcache.linesz
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D | cpu-info.h | 27 unsigned char linesz; /* Size of line in bytes */ member
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/arch/sh/kernel/cpu/sh3/ |
D | probe.c | 55 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe()
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/arch/mips/txx9/generic/ |
D | setup.c | 154 unsigned int linesz = 32; in early_flush_dcache() local 159 for (addr = INDEX_BASE; addr < end; addr += linesz) { in early_flush_dcache() 203 unsigned int linesz = 16; in early_flush_dcache() local 208 for (addr = INDEX_BASE; addr < end; addr += linesz) { in early_flush_dcache()
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/arch/mips/kvm/ |
D | emulate.c | 2534 arch->gprs[rt] = min(current_cpu_data.dcache.linesz, in kvm_mips_handle_ri() 2535 current_cpu_data.icache.linesz); in kvm_mips_handle_ri()
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